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authorZhang Wei <wei.zhang@freescale.com>2008-04-17 23:17:25 -0400
committerDan Williams <dan.j.williams@intel.com>2008-04-17 16:22:15 -0400
commit411e23dbe9c5867045f34ba83ee84b31b5b9950c (patch)
treebbdf0ce4244c52e1256082711da17c8775a2f48f /drivers/dma
parent4b119e21d0c66c22e8ca03df05d9de623d0eb50f (diff)
fsldma: Remove CONFIG_FSL_DMA_SELFTEST, keep fsl_dma_self_test() running always.
Always enabling the fsl_dma_self_test() to ensure the DMA controller should works well after the driver probed. Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/Kconfig8
-rw-r--r--drivers/dma/fsldma.c13
2 files changed, 3 insertions, 18 deletions
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 27340a7b19dd..6239c3df30ac 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -46,14 +46,6 @@ config FSL_DMA
46 MPC8560/40, MPC8555, MPC8548 and MPC8641 processors. 46 MPC8560/40, MPC8555, MPC8548 and MPC8641 processors.
47 The MPC8349, MPC8360 is also supported. 47 The MPC8349, MPC8360 is also supported.
48 48
49config FSL_DMA_SELFTEST
50 bool "Enable the self test for each DMA channel"
51 depends on FSL_DMA
52 default y
53 ---help---
54 Enable the self test for each DMA channel. A self test will be
55 performed after the channel probed to ensure the DMA works well.
56
57config DMA_ENGINE 49config DMA_ENGINE
58 bool 50 bool
59 51
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index df163687c91a..9854ebbaee31 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -776,15 +776,13 @@ static void dma_do_tasklet(unsigned long data)
776 fsl_chan_ld_cleanup(fsl_chan); 776 fsl_chan_ld_cleanup(fsl_chan);
777} 777}
778 778
779#ifdef FSL_DMA_CALLBACKTEST 779static void fsl_dma_callback_test(void *param)
780static void fsl_dma_callback_test(struct fsl_dma_chan *fsl_chan)
781{ 780{
781 struct fsl_dma_chan *fsl_chan = param;
782 if (fsl_chan) 782 if (fsl_chan)
783 dev_info(fsl_chan->dev, "selftest: callback is ok!\n"); 783 dev_dbg(fsl_chan->dev, "selftest: callback is ok!\n");
784} 784}
785#endif
786 785
787#ifdef CONFIG_FSL_DMA_SELFTEST
788static int fsl_dma_self_test(struct fsl_dma_chan *fsl_chan) 786static int fsl_dma_self_test(struct fsl_dma_chan *fsl_chan)
789{ 787{
790 struct dma_chan *chan; 788 struct dma_chan *chan;
@@ -875,13 +873,11 @@ static int fsl_dma_self_test(struct fsl_dma_chan *fsl_chan)
875 cookie = fsl_dma_tx_submit(tx3); 873 cookie = fsl_dma_tx_submit(tx3);
876 cookie = fsl_dma_tx_submit(tx2); 874 cookie = fsl_dma_tx_submit(tx2);
877 875
878#ifdef FSL_DMA_CALLBACKTEST
879 if (dma_has_cap(DMA_INTERRUPT, ((struct fsl_dma_device *) 876 if (dma_has_cap(DMA_INTERRUPT, ((struct fsl_dma_device *)
880 dev_get_drvdata(fsl_chan->dev->parent))->common.cap_mask)) { 877 dev_get_drvdata(fsl_chan->dev->parent))->common.cap_mask)) {
881 tx3->callback = fsl_dma_callback_test; 878 tx3->callback = fsl_dma_callback_test;
882 tx3->callback_param = fsl_chan; 879 tx3->callback_param = fsl_chan;
883 } 880 }
884#endif
885 fsl_dma_memcpy_issue_pending(chan); 881 fsl_dma_memcpy_issue_pending(chan);
886 msleep(2); 882 msleep(2);
887 883
@@ -906,7 +902,6 @@ out:
906 kfree(src); 902 kfree(src);
907 return err; 903 return err;
908} 904}
909#endif
910 905
911static int __devinit of_fsl_dma_chan_probe(struct of_device *dev, 906static int __devinit of_fsl_dma_chan_probe(struct of_device *dev,
912 const struct of_device_id *match) 907 const struct of_device_id *match)
@@ -997,11 +992,9 @@ static int __devinit of_fsl_dma_chan_probe(struct of_device *dev,
997 } 992 }
998 } 993 }
999 994
1000#ifdef CONFIG_FSL_DMA_SELFTEST
1001 err = fsl_dma_self_test(new_fsl_chan); 995 err = fsl_dma_self_test(new_fsl_chan);
1002 if (err) 996 if (err)
1003 goto err; 997 goto err;
1004#endif
1005 998
1006 dev_info(&dev->dev, "#%d (%s), irq %d\n", new_fsl_chan->id, 999 dev_info(&dev->dev, "#%d (%s), irq %d\n", new_fsl_chan->id,
1007 match->compatible, new_fsl_chan->irq); 1000 match->compatible, new_fsl_chan->irq);