aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/dma
diff options
context:
space:
mode:
authorDan Williams <dan.j.williams@intel.com>2009-09-16 18:16:50 -0400
committerDan Williams <dan.j.williams@intel.com>2009-09-16 18:16:50 -0400
commit376ec37667b510453f5a62fcd95d762786e6a0a9 (patch)
tree7352166b585463ce53633e379b96196dff72014f /drivers/dma
parent6c910a78e495b4c1778a8b136b37fe3c05712730 (diff)
ioat2: clarify ring size limits
With the addition of ioat_max_alloc_order it is not clear what the maximum allocation order is, so document that in the modinfo. Also take an opportunity to kill a stray semicolon. Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/ioat/dma_v2.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c
index 5d6ac49e0d32..8fd0b59f1902 100644
--- a/drivers/dma/ioat/dma_v2.c
+++ b/drivers/dma/ioat/dma_v2.c
@@ -42,18 +42,19 @@
42int ioat_ring_alloc_order = 8; 42int ioat_ring_alloc_order = 8;
43module_param(ioat_ring_alloc_order, int, 0644); 43module_param(ioat_ring_alloc_order, int, 0644);
44MODULE_PARM_DESC(ioat_ring_alloc_order, 44MODULE_PARM_DESC(ioat_ring_alloc_order,
45 "ioat2+: allocate 2^n descriptors per channel (default: n=8)"); 45 "ioat2+: allocate 2^n descriptors per channel"
46 " (default: 8 max: 16)");
46static int ioat_ring_max_alloc_order = IOAT_MAX_ORDER; 47static int ioat_ring_max_alloc_order = IOAT_MAX_ORDER;
47module_param(ioat_ring_max_alloc_order, int, 0644); 48module_param(ioat_ring_max_alloc_order, int, 0644);
48MODULE_PARM_DESC(ioat_ring_max_alloc_order, 49MODULE_PARM_DESC(ioat_ring_max_alloc_order,
49 "ioat2+: upper limit for dynamic ring resizing (default: n=16)"); 50 "ioat2+: upper limit for ring size (default: 16)");
50 51
51void __ioat2_issue_pending(struct ioat2_dma_chan *ioat) 52void __ioat2_issue_pending(struct ioat2_dma_chan *ioat)
52{ 53{
53 void * __iomem reg_base = ioat->base.reg_base; 54 void * __iomem reg_base = ioat->base.reg_base;
54 55
55 ioat->pending = 0; 56 ioat->pending = 0;
56 ioat->dmacount += ioat2_ring_pending(ioat);; 57 ioat->dmacount += ioat2_ring_pending(ioat);
57 ioat->issued = ioat->head; 58 ioat->issued = ioat->head;
58 /* make descriptor updates globally visible before notifying channel */ 59 /* make descriptor updates globally visible before notifying channel */
59 wmb(); 60 wmb();