diff options
author | Laxman Dewangan <ldewangan@nvidia.com> | 2013-01-09 04:56:22 -0500 |
---|---|---|
committer | Vinod Koul <vinod.koul@intel.com> | 2013-01-09 09:13:32 -0500 |
commit | b9bb37f5486ba05d2b557dbf1aeb754fef618985 (patch) | |
tree | 25abbffc56fbe2ebe2fc843f97d53f06aa08e54d /drivers/dma/tegra20-apb-dma.c | |
parent | bef2a8d3f6cb91bc8743bdd63d3eb6a37bf27b12 (diff) |
dma: tegra: implement flags parameters for cyclic transfer
The flag parameter is added in the cyclic transfer request.
Use the flag option of:
- DMA_PREP_INTERRUPT for enabling interrupt.
- DMA_CTRL_ACK for deciding whether ack is requred or not for
descriptor.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
CC: <stable@vger.kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/tegra20-apb-dma.c')
-rw-r--r-- | drivers/dma/tegra20-apb-dma.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c index efdfffa13349..bf58bb8b0206 100644 --- a/drivers/dma/tegra20-apb-dma.c +++ b/drivers/dma/tegra20-apb-dma.c | |||
@@ -266,6 +266,7 @@ static struct tegra_dma_desc *tegra_dma_desc_get( | |||
266 | if (async_tx_test_ack(&dma_desc->txd)) { | 266 | if (async_tx_test_ack(&dma_desc->txd)) { |
267 | list_del(&dma_desc->node); | 267 | list_del(&dma_desc->node); |
268 | spin_unlock_irqrestore(&tdc->lock, flags); | 268 | spin_unlock_irqrestore(&tdc->lock, flags); |
269 | dma_desc->txd.flags = 0; | ||
269 | return dma_desc; | 270 | return dma_desc; |
270 | } | 271 | } |
271 | } | 272 | } |
@@ -1050,7 +1051,9 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic( | |||
1050 | TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT; | 1051 | TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT; |
1051 | ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32; | 1052 | ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32; |
1052 | 1053 | ||
1053 | csr |= TEGRA_APBDMA_CSR_FLOW | TEGRA_APBDMA_CSR_IE_EOC; | 1054 | csr |= TEGRA_APBDMA_CSR_FLOW; |
1055 | if (flags & DMA_PREP_INTERRUPT) | ||
1056 | csr |= TEGRA_APBDMA_CSR_IE_EOC; | ||
1054 | csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT; | 1057 | csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT; |
1055 | 1058 | ||
1056 | apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1; | 1059 | apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1; |
@@ -1095,7 +1098,8 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic( | |||
1095 | mem += len; | 1098 | mem += len; |
1096 | } | 1099 | } |
1097 | sg_req->last_sg = true; | 1100 | sg_req->last_sg = true; |
1098 | dma_desc->txd.flags = 0; | 1101 | if (flags & DMA_CTRL_ACK) |
1102 | dma_desc->txd.flags = DMA_CTRL_ACK; | ||
1099 | 1103 | ||
1100 | /* | 1104 | /* |
1101 | * Make sure that mode should not be conflicting with currently | 1105 | * Make sure that mode should not be conflicting with currently |