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authorLinus Walleij <linus.walleij@stericsson.com>2010-06-20 17:24:52 -0400
committerDan Williams <dan.j.williams@intel.com>2010-06-22 21:01:53 -0400
commitef1872ec652b3bc472d6c0995d0b64d5058878ea (patch)
tree2de7cbca0012ab6931b8321c922311f70bbb4bb0 /drivers/dma/ste_dma40_ll.h
parent941b77a3b6946dd6223a029007f695aa841b6d34 (diff)
DMAENGINE: ste_dma40: only write phy channel config first time
We only need to write the configuration to a physical channel if it is free, else it is already written. Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ste_dma40_ll.h')
-rw-r--r--drivers/dma/ste_dma40_ll.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/dma/ste_dma40_ll.h b/drivers/dma/ste_dma40_ll.h
index 2029280cb332..c081f28ec1e3 100644
--- a/drivers/dma/ste_dma40_ll.h
+++ b/drivers/dma/ste_dma40_ll.h
@@ -13,6 +13,9 @@
13#define D40_DREG_PCDELTA (8 * 4) 13#define D40_DREG_PCDELTA (8 * 4)
14#define D40_LLI_ALIGN 16 /* LLI alignment must be 16 bytes. */ 14#define D40_LLI_ALIGN 16 /* LLI alignment must be 16 bytes. */
15 15
16#define D40_LCPA_CHAN_SIZE 32
17#define D40_LCPA_CHAN_DST_DELTA 16
18
16#define D40_TYPE_TO_GROUP(type) (type / 16) 19#define D40_TYPE_TO_GROUP(type) (type / 16)
17#define D40_TYPE_TO_EVENT(type) (type % 16) 20#define D40_TYPE_TO_EVENT(type) (type % 16)
18 21