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authorLee Jones <lee.jones@linaro.org>2013-05-15 05:51:30 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-05-23 15:13:28 -0400
commitef9c89b3ec6916dd0b7db1563d51d85af3e7f031 (patch)
treea097bcac1b646facb58e317024f2ba3b903e7429 /drivers/dma/ste_dma40.c
parentb722487507b757b03e4e9cbb215f8965fa9b5e47 (diff)
dmaengine: ste_dma40: Only use addresses passed as configuration information
Addresses are passed in from the client's driver via the invocation of dmaengine_slave_config(), so there's no need to fetch them from platform data too, hardwired or otherwise. This is a great step forward, as it elevates a large burden from platform data in the way of a look-up table. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/dma/ste_dma40.c')
-rw-r--r--drivers/dma/ste_dma40.c51
1 files changed, 11 insertions, 40 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index ba84df8fc9d8..57a127e5c896 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -1774,22 +1774,6 @@ static int d40_validate_conf(struct d40_chan *d40c,
1774 res = -EINVAL; 1774 res = -EINVAL;
1775 } 1775 }
1776 1776
1777 if (conf->dir == STEDMA40_MEM_TO_PERIPH &&
1778 d40c->base->plat_data->dev_tx[conf->dev_type] == 0 &&
1779 d40c->runtime_addr == 0) {
1780 chan_err(d40c, "Invalid TX channel address (%d)\n",
1781 conf->dev_type);
1782 res = -EINVAL;
1783 }
1784
1785 if (conf->dir == STEDMA40_PERIPH_TO_MEM &&
1786 d40c->base->plat_data->dev_rx[conf->dev_type] == 0 &&
1787 d40c->runtime_addr == 0) {
1788 chan_err(d40c, "Invalid RX channel address (%d)\n",
1789 conf->dev_type);
1790 res = -EINVAL;
1791 }
1792
1793 if (conf->dir == STEDMA40_PERIPH_TO_PERIPH) { 1777 if (conf->dir == STEDMA40_PERIPH_TO_PERIPH) {
1794 /* 1778 /*
1795 * DMAC HW supports it. Will be added to this driver, 1779 * DMAC HW supports it. Will be added to this driver,
@@ -2327,14 +2311,10 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src,
2327 if (sg_next(&sg_src[sg_len - 1]) == sg_src) 2311 if (sg_next(&sg_src[sg_len - 1]) == sg_src)
2328 desc->cyclic = true; 2312 desc->cyclic = true;
2329 2313
2330 if (direction != DMA_TRANS_NONE) { 2314 if (direction == DMA_DEV_TO_MEM)
2331 dma_addr_t dev_addr = d40_get_dev_addr(chan, direction); 2315 src_dev_addr = chan->runtime_addr;
2332 2316 else if (direction == DMA_MEM_TO_DEV)
2333 if (direction == DMA_DEV_TO_MEM) 2317 dst_dev_addr = chan->runtime_addr;
2334 src_dev_addr = dev_addr;
2335 else if (direction == DMA_MEM_TO_DEV)
2336 dst_dev_addr = dev_addr;
2337 }
2338 2318
2339 if (chan_is_logical(chan)) 2319 if (chan_is_logical(chan))
2340 ret = d40_prep_sg_log(chan, desc, sg_src, sg_dst, 2320 ret = d40_prep_sg_log(chan, desc, sg_src, sg_dst,
@@ -2782,15 +2762,8 @@ static int d40_set_runtime_config(struct dma_chan *chan,
2782 dst_maxburst = config->dst_maxburst; 2762 dst_maxburst = config->dst_maxburst;
2783 2763
2784 if (config->direction == DMA_DEV_TO_MEM) { 2764 if (config->direction == DMA_DEV_TO_MEM) {
2785 dma_addr_t dev_addr_rx =
2786 d40c->base->plat_data->dev_rx[cfg->dev_type];
2787
2788 config_addr = config->src_addr; 2765 config_addr = config->src_addr;
2789 if (dev_addr_rx) 2766
2790 dev_dbg(d40c->base->dev,
2791 "channel has a pre-wired RX address %08x "
2792 "overriding with %08x\n",
2793 dev_addr_rx, config_addr);
2794 if (cfg->dir != STEDMA40_PERIPH_TO_MEM) 2767 if (cfg->dir != STEDMA40_PERIPH_TO_MEM)
2795 dev_dbg(d40c->base->dev, 2768 dev_dbg(d40c->base->dev,
2796 "channel was not configured for peripheral " 2769 "channel was not configured for peripheral "
@@ -2805,15 +2778,8 @@ static int d40_set_runtime_config(struct dma_chan *chan,
2805 dst_maxburst = src_maxburst; 2778 dst_maxburst = src_maxburst;
2806 2779
2807 } else if (config->direction == DMA_MEM_TO_DEV) { 2780 } else if (config->direction == DMA_MEM_TO_DEV) {
2808 dma_addr_t dev_addr_tx =
2809 d40c->base->plat_data->dev_tx[cfg->dev_type];
2810
2811 config_addr = config->dst_addr; 2781 config_addr = config->dst_addr;
2812 if (dev_addr_tx) 2782
2813 dev_dbg(d40c->base->dev,
2814 "channel has a pre-wired TX address %08x "
2815 "overriding with %08x\n",
2816 dev_addr_tx, config_addr);
2817 if (cfg->dir != STEDMA40_MEM_TO_PERIPH) 2783 if (cfg->dir != STEDMA40_MEM_TO_PERIPH)
2818 dev_dbg(d40c->base->dev, 2784 dev_dbg(d40c->base->dev,
2819 "channel was not configured for memory " 2785 "channel was not configured for memory "
@@ -2833,6 +2799,11 @@ static int d40_set_runtime_config(struct dma_chan *chan,
2833 return -EINVAL; 2799 return -EINVAL;
2834 } 2800 }
2835 2801
2802 if (config_addr <= 0) {
2803 dev_err(d40c->base->dev, "no address supplied\n");
2804 return -EINVAL;
2805 }
2806
2836 if (src_maxburst * src_addr_width != dst_maxburst * dst_addr_width) { 2807 if (src_maxburst * src_addr_width != dst_maxburst * dst_addr_width) {
2837 dev_err(d40c->base->dev, 2808 dev_err(d40c->base->dev,
2838 "src/dst width/maxburst mismatch: %d*%d != %d*%d\n", 2809 "src/dst width/maxburst mismatch: %d*%d != %d*%d\n",