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authorRussell King - ARM Linux <linux@arm.linux.org.uk>2012-03-06 17:34:06 -0500
committerVinod Koul <vinod.koul@linux.intel.com>2012-03-13 02:06:06 -0400
commit4d4e58de32a192fea65ab84509d17d199bd291c8 (patch)
treebe35531778c9cc6bee73beb94d07e176a6f3599d /drivers/dma/ste_dma40.c
parent08714f60b0fc6ea3a060b69b32e77139f14e6045 (diff)
dmaengine: move last completed cookie into generic dma_chan structure
Every DMA engine implementation declares a last completed dma cookie in their private dma channel structures. This is pointless, and forces driver specific code. Move this out into the common dma_chan structure. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Diffstat (limited to 'drivers/dma/ste_dma40.c')
-rw-r--r--drivers/dma/ste_dma40.c10
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index cc5ecbc067a3..cfca2a06d1af 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -220,8 +220,6 @@ struct d40_base;
220 * 220 *
221 * @lock: A spinlock to protect this struct. 221 * @lock: A spinlock to protect this struct.
222 * @log_num: The logical number, if any of this channel. 222 * @log_num: The logical number, if any of this channel.
223 * @completed: Starts with 1, after first interrupt it is set to dma engine's
224 * current cookie.
225 * @pending_tx: The number of pending transfers. Used between interrupt handler 223 * @pending_tx: The number of pending transfers. Used between interrupt handler
226 * and tasklet. 224 * and tasklet.
227 * @busy: Set to true when transfer is ongoing on this channel. 225 * @busy: Set to true when transfer is ongoing on this channel.
@@ -250,8 +248,6 @@ struct d40_base;
250struct d40_chan { 248struct d40_chan {
251 spinlock_t lock; 249 spinlock_t lock;
252 int log_num; 250 int log_num;
253 /* ID of the most recent completed transfer */
254 int completed;
255 int pending_tx; 251 int pending_tx;
256 bool busy; 252 bool busy;
257 struct d40_phy_res *phy_chan; 253 struct d40_phy_res *phy_chan;
@@ -1357,7 +1353,7 @@ static void dma_tasklet(unsigned long data)
1357 goto err; 1353 goto err;
1358 1354
1359 if (!d40d->cyclic) 1355 if (!d40d->cyclic)
1360 d40c->completed = d40d->txd.cookie; 1356 d40c->chan.completed_cookie = d40d->txd.cookie;
1361 1357
1362 /* 1358 /*
1363 * If terminating a channel pending_tx is set to zero. 1359 * If terminating a channel pending_tx is set to zero.
@@ -2182,7 +2178,7 @@ static int d40_alloc_chan_resources(struct dma_chan *chan)
2182 bool is_free_phy; 2178 bool is_free_phy;
2183 spin_lock_irqsave(&d40c->lock, flags); 2179 spin_lock_irqsave(&d40c->lock, flags);
2184 2180
2185 d40c->completed = chan->cookie = 1; 2181 chan->completed_cookie = chan->cookie = 1;
2186 2182
2187 /* If no dma configuration is set use default configuration (memcpy) */ 2183 /* If no dma configuration is set use default configuration (memcpy) */
2188 if (!d40c->configured) { 2184 if (!d40c->configured) {
@@ -2351,7 +2347,7 @@ static enum dma_status d40_tx_status(struct dma_chan *chan,
2351 return -EINVAL; 2347 return -EINVAL;
2352 } 2348 }
2353 2349
2354 last_complete = d40c->completed; 2350 last_complete = chan->completed_cookie;
2355 last_used = chan->cookie; 2351 last_used = chan->cookie;
2356 2352
2357 if (d40_is_paused(d40c)) 2353 if (d40_is_paused(d40c))