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authorVinod Koul <vinod.koul@linux.intel.com>2011-11-17 04:24:38 -0500
committerVinod Koul <vinod.koul@linux.intel.com>2011-11-17 04:24:57 -0500
commite0d23ef29ed637dc6bd739f590985746d9ad9caa (patch)
treec5b5856dc88582697997bb10ccacad6fc2535465 /drivers/dma/ste_dma40.c
parentca7fe2db892dcf91b2c72ee352eda4ff867903a7 (diff)
parent55ba4e5ed4ac57b60fe56acfd324f6a87123cc34 (diff)
Merge branch 'dma_slave_direction' into next_test_dirn
resolved conflicts: drivers/media/video/mx3_camera.c
Diffstat (limited to 'drivers/dma/ste_dma40.c')
-rw-r--r--drivers/dma/ste_dma40.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 13259cad0ceb..15b311d54b74 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -217,7 +217,7 @@ struct d40_chan {
217 struct d40_log_lli_full *lcpa; 217 struct d40_log_lli_full *lcpa;
218 /* Runtime reconfiguration */ 218 /* Runtime reconfiguration */
219 dma_addr_t runtime_addr; 219 dma_addr_t runtime_addr;
220 enum dma_data_direction runtime_direction; 220 enum dma_transfer_direction runtime_direction;
221}; 221};
222 222
223/** 223/**
@@ -1855,7 +1855,7 @@ err:
1855} 1855}
1856 1856
1857static dma_addr_t 1857static dma_addr_t
1858d40_get_dev_addr(struct d40_chan *chan, enum dma_data_direction direction) 1858d40_get_dev_addr(struct d40_chan *chan, enum dma_transfer_direction direction)
1859{ 1859{
1860 struct stedma40_platform_data *plat = chan->base->plat_data; 1860 struct stedma40_platform_data *plat = chan->base->plat_data;
1861 struct stedma40_chan_cfg *cfg = &chan->dma_cfg; 1861 struct stedma40_chan_cfg *cfg = &chan->dma_cfg;
@@ -1864,9 +1864,9 @@ d40_get_dev_addr(struct d40_chan *chan, enum dma_data_direction direction)
1864 if (chan->runtime_addr) 1864 if (chan->runtime_addr)
1865 return chan->runtime_addr; 1865 return chan->runtime_addr;
1866 1866
1867 if (direction == DMA_FROM_DEVICE) 1867 if (direction == DMA_DEV_TO_MEM)
1868 addr = plat->dev_rx[cfg->src_dev_type]; 1868 addr = plat->dev_rx[cfg->src_dev_type];
1869 else if (direction == DMA_TO_DEVICE) 1869 else if (direction == DMA_MEM_TO_DEV)
1870 addr = plat->dev_tx[cfg->dst_dev_type]; 1870 addr = plat->dev_tx[cfg->dst_dev_type];
1871 1871
1872 return addr; 1872 return addr;
@@ -1875,7 +1875,7 @@ d40_get_dev_addr(struct d40_chan *chan, enum dma_data_direction direction)
1875static struct dma_async_tx_descriptor * 1875static struct dma_async_tx_descriptor *
1876d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src, 1876d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src,
1877 struct scatterlist *sg_dst, unsigned int sg_len, 1877 struct scatterlist *sg_dst, unsigned int sg_len,
1878 enum dma_data_direction direction, unsigned long dma_flags) 1878 enum dma_transfer_direction direction, unsigned long dma_flags)
1879{ 1879{
1880 struct d40_chan *chan = container_of(dchan, struct d40_chan, chan); 1880 struct d40_chan *chan = container_of(dchan, struct d40_chan, chan);
1881 dma_addr_t src_dev_addr = 0; 1881 dma_addr_t src_dev_addr = 0;
@@ -1902,9 +1902,9 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src,
1902 if (direction != DMA_NONE) { 1902 if (direction != DMA_NONE) {
1903 dma_addr_t dev_addr = d40_get_dev_addr(chan, direction); 1903 dma_addr_t dev_addr = d40_get_dev_addr(chan, direction);
1904 1904
1905 if (direction == DMA_FROM_DEVICE) 1905 if (direction == DMA_DEV_TO_MEM)
1906 src_dev_addr = dev_addr; 1906 src_dev_addr = dev_addr;
1907 else if (direction == DMA_TO_DEVICE) 1907 else if (direction == DMA_MEM_TO_DEV)
1908 dst_dev_addr = dev_addr; 1908 dst_dev_addr = dev_addr;
1909 } 1909 }
1910 1910
@@ -2108,10 +2108,10 @@ d40_prep_memcpy_sg(struct dma_chan *chan,
2108static struct dma_async_tx_descriptor *d40_prep_slave_sg(struct dma_chan *chan, 2108static struct dma_async_tx_descriptor *d40_prep_slave_sg(struct dma_chan *chan,
2109 struct scatterlist *sgl, 2109 struct scatterlist *sgl,
2110 unsigned int sg_len, 2110 unsigned int sg_len,
2111 enum dma_data_direction direction, 2111 enum dma_transfer_direction direction,
2112 unsigned long dma_flags) 2112 unsigned long dma_flags)
2113{ 2113{
2114 if (direction != DMA_FROM_DEVICE && direction != DMA_TO_DEVICE) 2114 if (direction != DMA_DEV_TO_MEM && direction != DMA_MEM_TO_DEV)
2115 return NULL; 2115 return NULL;
2116 2116
2117 return d40_prep_sg(chan, sgl, sgl, sg_len, direction, dma_flags); 2117 return d40_prep_sg(chan, sgl, sgl, sg_len, direction, dma_flags);
@@ -2120,7 +2120,7 @@ static struct dma_async_tx_descriptor *d40_prep_slave_sg(struct dma_chan *chan,
2120static struct dma_async_tx_descriptor * 2120static struct dma_async_tx_descriptor *
2121dma40_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t dma_addr, 2121dma40_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t dma_addr,
2122 size_t buf_len, size_t period_len, 2122 size_t buf_len, size_t period_len,
2123 enum dma_data_direction direction) 2123 enum dma_transfer_direction direction)
2124{ 2124{
2125 unsigned int periods = buf_len / period_len; 2125 unsigned int periods = buf_len / period_len;
2126 struct dma_async_tx_descriptor *txd; 2126 struct dma_async_tx_descriptor *txd;
@@ -2269,7 +2269,7 @@ static int d40_set_runtime_config(struct dma_chan *chan,
2269 dst_addr_width = config->dst_addr_width; 2269 dst_addr_width = config->dst_addr_width;
2270 dst_maxburst = config->dst_maxburst; 2270 dst_maxburst = config->dst_maxburst;
2271 2271
2272 if (config->direction == DMA_FROM_DEVICE) { 2272 if (config->direction == DMA_DEV_TO_MEM) {
2273 dma_addr_t dev_addr_rx = 2273 dma_addr_t dev_addr_rx =
2274 d40c->base->plat_data->dev_rx[cfg->src_dev_type]; 2274 d40c->base->plat_data->dev_rx[cfg->src_dev_type];
2275 2275
@@ -2292,7 +2292,7 @@ static int d40_set_runtime_config(struct dma_chan *chan,
2292 if (dst_maxburst == 0) 2292 if (dst_maxburst == 0)
2293 dst_maxburst = src_maxburst; 2293 dst_maxburst = src_maxburst;
2294 2294
2295 } else if (config->direction == DMA_TO_DEVICE) { 2295 } else if (config->direction == DMA_MEM_TO_DEV) {
2296 dma_addr_t dev_addr_tx = 2296 dma_addr_t dev_addr_tx =
2297 d40c->base->plat_data->dev_tx[cfg->dst_dev_type]; 2297 d40c->base->plat_data->dev_tx[cfg->dst_dev_type];
2298 2298
@@ -2357,7 +2357,7 @@ static int d40_set_runtime_config(struct dma_chan *chan,
2357 "configured channel %s for %s, data width %d/%d, " 2357 "configured channel %s for %s, data width %d/%d, "
2358 "maxburst %d/%d elements, LE, no flow control\n", 2358 "maxburst %d/%d elements, LE, no flow control\n",
2359 dma_chan_name(chan), 2359 dma_chan_name(chan),
2360 (config->direction == DMA_FROM_DEVICE) ? "RX" : "TX", 2360 (config->direction == DMA_DEV_TO_MEM) ? "RX" : "TX",
2361 src_addr_width, dst_addr_width, 2361 src_addr_width, dst_addr_width,
2362 src_maxburst, dst_maxburst); 2362 src_maxburst, dst_maxburst);
2363 2363