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authorLinus Torvalds <torvalds@linux-foundation.org>2010-05-21 20:05:46 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-05-21 20:05:46 -0400
commit6f68fbaafbaa033205cd131d3e1f3c4b914e9b78 (patch)
tree56b434496064ed170f94381e3ec4c6c340b71376 /drivers/dma/shdma.c
parent6e4513972a5ad28517477d21f301a02ac7a0df76 (diff)
parent0b28330e39bbe0ffee4c56b09fc415fcec595ea3 (diff)
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: DMAENGINE: extend the control command to include an arg async_tx: trim dma_async_tx_descriptor in 'no channel switch' case DMAENGINE: DMA40 fix for allocation of logical channel 0 DMAENGINE: DMA40 support paused channel status dmaengine: mpc512x: Use resource_size DMA ENGINE: Do not reset 'private' of channel ioat: Remove duplicated devm_kzalloc() calls for ioatdma_device ioat3: disable cacheline-unaligned transfers for raid operations ioat2,3: convert to producer/consumer locking ioat: convert to circ_buf DMAENGINE: Support for ST-Ericssons DMA40 block v3 async_tx: use of kzalloc/kfree requires the include of slab.h dmaengine: provide helper for setting txstate DMAENGINE: generic channel status v2 DMAENGINE: generic slave control v2 dma: timb-dma: Update comment and fix compiler warning dma: Add timb-dma DMAENGINE: COH 901 318 fix bytesleft DMAENGINE: COH 901 318 rename confusing vars
Diffstat (limited to 'drivers/dma/shdma.c')
-rw-r--r--drivers/dma/shdma.c27
1 files changed, 14 insertions, 13 deletions
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 323afef77802..a1727522343e 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -597,12 +597,17 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_slave_sg(
597 direction, flags); 597 direction, flags);
598} 598}
599 599
600static void sh_dmae_terminate_all(struct dma_chan *chan) 600static int sh_dmae_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
601 unsigned long arg)
601{ 602{
602 struct sh_dmae_chan *sh_chan = to_sh_chan(chan); 603 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
603 604
605 /* Only supports DMA_TERMINATE_ALL */
606 if (cmd != DMA_TERMINATE_ALL)
607 return -ENXIO;
608
604 if (!chan) 609 if (!chan)
605 return; 610 return -EINVAL;
606 611
607 dmae_halt(sh_chan); 612 dmae_halt(sh_chan);
608 613
@@ -618,6 +623,8 @@ static void sh_dmae_terminate_all(struct dma_chan *chan)
618 spin_unlock_bh(&sh_chan->desc_lock); 623 spin_unlock_bh(&sh_chan->desc_lock);
619 624
620 sh_dmae_chan_ld_cleanup(sh_chan, true); 625 sh_dmae_chan_ld_cleanup(sh_chan, true);
626
627 return 0;
621} 628}
622 629
623static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all) 630static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all)
@@ -749,10 +756,9 @@ static void sh_dmae_memcpy_issue_pending(struct dma_chan *chan)
749 sh_chan_xfer_ld_queue(sh_chan); 756 sh_chan_xfer_ld_queue(sh_chan);
750} 757}
751 758
752static enum dma_status sh_dmae_is_complete(struct dma_chan *chan, 759static enum dma_status sh_dmae_tx_status(struct dma_chan *chan,
753 dma_cookie_t cookie, 760 dma_cookie_t cookie,
754 dma_cookie_t *done, 761 struct dma_tx_state *txstate)
755 dma_cookie_t *used)
756{ 762{
757 struct sh_dmae_chan *sh_chan = to_sh_chan(chan); 763 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
758 dma_cookie_t last_used; 764 dma_cookie_t last_used;
@@ -764,12 +770,7 @@ static enum dma_status sh_dmae_is_complete(struct dma_chan *chan,
764 last_used = chan->cookie; 770 last_used = chan->cookie;
765 last_complete = sh_chan->completed_cookie; 771 last_complete = sh_chan->completed_cookie;
766 BUG_ON(last_complete < 0); 772 BUG_ON(last_complete < 0);
767 773 dma_set_tx_state(txstate, last_complete, last_used, 0);
768 if (done)
769 *done = last_complete;
770
771 if (used)
772 *used = last_used;
773 774
774 spin_lock_bh(&sh_chan->desc_lock); 775 spin_lock_bh(&sh_chan->desc_lock);
775 776
@@ -1041,12 +1042,12 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
1041 = sh_dmae_alloc_chan_resources; 1042 = sh_dmae_alloc_chan_resources;
1042 shdev->common.device_free_chan_resources = sh_dmae_free_chan_resources; 1043 shdev->common.device_free_chan_resources = sh_dmae_free_chan_resources;
1043 shdev->common.device_prep_dma_memcpy = sh_dmae_prep_memcpy; 1044 shdev->common.device_prep_dma_memcpy = sh_dmae_prep_memcpy;
1044 shdev->common.device_is_tx_complete = sh_dmae_is_complete; 1045 shdev->common.device_tx_status = sh_dmae_tx_status;
1045 shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending; 1046 shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending;
1046 1047
1047 /* Compulsory for DMA_SLAVE fields */ 1048 /* Compulsory for DMA_SLAVE fields */
1048 shdev->common.device_prep_slave_sg = sh_dmae_prep_slave_sg; 1049 shdev->common.device_prep_slave_sg = sh_dmae_prep_slave_sg;
1049 shdev->common.device_terminate_all = sh_dmae_terminate_all; 1050 shdev->common.device_control = sh_dmae_control;
1050 1051
1051 shdev->common.dev = &pdev->dev; 1052 shdev->common.dev = &pdev->dev;
1052 /* Default transfer size of 32 bytes requires 32-byte alignment */ 1053 /* Default transfer size of 32 bytes requires 32-byte alignment */