diff options
author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2013-07-03 18:05:06 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-07-03 19:07:42 -0400 |
commit | 48a9db462d99494583dad829969616ac90a8df4e (patch) | |
tree | d908a6172274a9d4d5c14752aa648086bc4721cd /drivers/dma/ppc4xx | |
parent | dcf6d294830d46b0e6901477fb4bf455281d90c8 (diff) |
drivers/dma: remove unused support for MEMSET operations
There have never been any real users of MEMSET operations since they
have been introduced in January 2007 by commit 7405f74badf4 ("dmaengine:
refactor dmaengine around dma_async_tx_descriptor"). Therefore remove
support for them for now, it can be always brought back when needed.
[sebastian.hesselbarth@gmail.com: fix drivers/dma/mv_xor]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Acked-by: Dan Williams <djbw@fb.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Olof Johansson <olof@lixom.net>
Cc: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/dma/ppc4xx')
-rw-r--r-- | drivers/dma/ppc4xx/adma.c | 47 |
1 files changed, 0 insertions, 47 deletions
diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c index 5d3d95569a1e..1e220f8dfd8c 100644 --- a/drivers/dma/ppc4xx/adma.c +++ b/drivers/dma/ppc4xx/adma.c | |||
@@ -2323,47 +2323,6 @@ static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_memcpy( | |||
2323 | } | 2323 | } |
2324 | 2324 | ||
2325 | /** | 2325 | /** |
2326 | * ppc440spe_adma_prep_dma_memset - prepare CDB for a MEMSET operation | ||
2327 | */ | ||
2328 | static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_memset( | ||
2329 | struct dma_chan *chan, dma_addr_t dma_dest, int value, | ||
2330 | size_t len, unsigned long flags) | ||
2331 | { | ||
2332 | struct ppc440spe_adma_chan *ppc440spe_chan; | ||
2333 | struct ppc440spe_adma_desc_slot *sw_desc, *group_start; | ||
2334 | int slot_cnt, slots_per_op; | ||
2335 | |||
2336 | ppc440spe_chan = to_ppc440spe_adma_chan(chan); | ||
2337 | |||
2338 | if (unlikely(!len)) | ||
2339 | return NULL; | ||
2340 | |||
2341 | BUG_ON(len > PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT); | ||
2342 | |||
2343 | spin_lock_bh(&ppc440spe_chan->lock); | ||
2344 | |||
2345 | dev_dbg(ppc440spe_chan->device->common.dev, | ||
2346 | "ppc440spe adma%d: %s cal: %u len: %u int_en %d\n", | ||
2347 | ppc440spe_chan->device->id, __func__, value, len, | ||
2348 | flags & DMA_PREP_INTERRUPT ? 1 : 0); | ||
2349 | |||
2350 | slot_cnt = slots_per_op = 1; | ||
2351 | sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, | ||
2352 | slots_per_op); | ||
2353 | if (sw_desc) { | ||
2354 | group_start = sw_desc->group_head; | ||
2355 | ppc440spe_desc_init_memset(group_start, value, flags); | ||
2356 | ppc440spe_adma_set_dest(group_start, dma_dest, 0); | ||
2357 | ppc440spe_desc_set_byte_count(group_start, ppc440spe_chan, len); | ||
2358 | sw_desc->unmap_len = len; | ||
2359 | sw_desc->async_tx.flags = flags; | ||
2360 | } | ||
2361 | spin_unlock_bh(&ppc440spe_chan->lock); | ||
2362 | |||
2363 | return sw_desc ? &sw_desc->async_tx : NULL; | ||
2364 | } | ||
2365 | |||
2366 | /** | ||
2367 | * ppc440spe_adma_prep_dma_xor - prepare CDB for a XOR operation | 2326 | * ppc440spe_adma_prep_dma_xor - prepare CDB for a XOR operation |
2368 | */ | 2327 | */ |
2369 | static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_xor( | 2328 | static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_xor( |
@@ -4125,7 +4084,6 @@ static void ppc440spe_adma_init_capabilities(struct ppc440spe_adma_device *adev) | |||
4125 | case PPC440SPE_DMA1_ID: | 4084 | case PPC440SPE_DMA1_ID: |
4126 | dma_cap_set(DMA_MEMCPY, adev->common.cap_mask); | 4085 | dma_cap_set(DMA_MEMCPY, adev->common.cap_mask); |
4127 | dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask); | 4086 | dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask); |
4128 | dma_cap_set(DMA_MEMSET, adev->common.cap_mask); | ||
4129 | dma_cap_set(DMA_PQ, adev->common.cap_mask); | 4087 | dma_cap_set(DMA_PQ, adev->common.cap_mask); |
4130 | dma_cap_set(DMA_PQ_VAL, adev->common.cap_mask); | 4088 | dma_cap_set(DMA_PQ_VAL, adev->common.cap_mask); |
4131 | dma_cap_set(DMA_XOR_VAL, adev->common.cap_mask); | 4089 | dma_cap_set(DMA_XOR_VAL, adev->common.cap_mask); |
@@ -4151,10 +4109,6 @@ static void ppc440spe_adma_init_capabilities(struct ppc440spe_adma_device *adev) | |||
4151 | adev->common.device_prep_dma_memcpy = | 4109 | adev->common.device_prep_dma_memcpy = |
4152 | ppc440spe_adma_prep_dma_memcpy; | 4110 | ppc440spe_adma_prep_dma_memcpy; |
4153 | } | 4111 | } |
4154 | if (dma_has_cap(DMA_MEMSET, adev->common.cap_mask)) { | ||
4155 | adev->common.device_prep_dma_memset = | ||
4156 | ppc440spe_adma_prep_dma_memset; | ||
4157 | } | ||
4158 | if (dma_has_cap(DMA_XOR, adev->common.cap_mask)) { | 4112 | if (dma_has_cap(DMA_XOR, adev->common.cap_mask)) { |
4159 | adev->common.max_xor = XOR_MAX_OPS; | 4113 | adev->common.max_xor = XOR_MAX_OPS; |
4160 | adev->common.device_prep_dma_xor = | 4114 | adev->common.device_prep_dma_xor = |
@@ -4217,7 +4171,6 @@ static void ppc440spe_adma_init_capabilities(struct ppc440spe_adma_device *adev) | |||
4217 | dma_has_cap(DMA_XOR, adev->common.cap_mask) ? "xor " : "", | 4171 | dma_has_cap(DMA_XOR, adev->common.cap_mask) ? "xor " : "", |
4218 | dma_has_cap(DMA_XOR_VAL, adev->common.cap_mask) ? "xor_val " : "", | 4172 | dma_has_cap(DMA_XOR_VAL, adev->common.cap_mask) ? "xor_val " : "", |
4219 | dma_has_cap(DMA_MEMCPY, adev->common.cap_mask) ? "memcpy " : "", | 4173 | dma_has_cap(DMA_MEMCPY, adev->common.cap_mask) ? "memcpy " : "", |
4220 | dma_has_cap(DMA_MEMSET, adev->common.cap_mask) ? "memset " : "", | ||
4221 | dma_has_cap(DMA_INTERRUPT, adev->common.cap_mask) ? "intr " : ""); | 4174 | dma_has_cap(DMA_INTERRUPT, adev->common.cap_mask) ? "intr " : ""); |
4222 | } | 4175 | } |
4223 | 4176 | ||