diff options
author | Dan Williams <dan.j.williams@intel.com> | 2013-12-09 14:15:59 -0500 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2013-12-13 01:43:41 -0500 |
commit | 6aa2731ce2c7bd1305b553b5fc14ae4856d36569 (patch) | |
tree | 47bc2715ae46c407adb3e3c3c4e37d18ea913f62 /drivers/dma/ppc4xx | |
parent | d7fb0300fe663a5e338e3adeb7f811a2f9727e6c (diff) |
dma: fix build warnings in ppc4xx
drivers/dma/ppc4xx/adma.c:1507:6: warning: unused variable 'i' [-Wunused-variable]
- due to unmap reworks
drivers/dma/ppc4xx/adma.c:3900:2: warning: format '%s' expects a matching 'char *' argument [-Wformat]
- due to memset removal
drivers/dma/ppc4xx/adma.c:538:13: warning: 'ppc440spe_desc_init_memset' defined but not used [-Wunused-function]
- due to memset removal
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ppc4xx')
-rw-r--r-- | drivers/dma/ppc4xx/adma.c | 27 |
1 files changed, 1 insertions, 26 deletions
diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c index 8da48c6b2a38..8bba298535b0 100644 --- a/drivers/dma/ppc4xx/adma.c +++ b/drivers/dma/ppc4xx/adma.c | |||
@@ -533,29 +533,6 @@ static void ppc440spe_desc_init_memcpy(struct ppc440spe_adma_desc_slot *desc, | |||
533 | } | 533 | } |
534 | 534 | ||
535 | /** | 535 | /** |
536 | * ppc440spe_desc_init_memset - initialize the descriptor for MEMSET operation | ||
537 | */ | ||
538 | static void ppc440spe_desc_init_memset(struct ppc440spe_adma_desc_slot *desc, | ||
539 | int value, unsigned long flags) | ||
540 | { | ||
541 | struct dma_cdb *hw_desc = desc->hw_desc; | ||
542 | |||
543 | memset(desc->hw_desc, 0, sizeof(struct dma_cdb)); | ||
544 | desc->hw_next = NULL; | ||
545 | desc->src_cnt = 1; | ||
546 | desc->dst_cnt = 1; | ||
547 | |||
548 | if (flags & DMA_PREP_INTERRUPT) | ||
549 | set_bit(PPC440SPE_DESC_INT, &desc->flags); | ||
550 | else | ||
551 | clear_bit(PPC440SPE_DESC_INT, &desc->flags); | ||
552 | |||
553 | hw_desc->sg1u = hw_desc->sg1l = cpu_to_le32((u32)value); | ||
554 | hw_desc->sg3u = hw_desc->sg3l = cpu_to_le32((u32)value); | ||
555 | hw_desc->opc = DMA_CDB_OPC_DFILL128; | ||
556 | } | ||
557 | |||
558 | /** | ||
559 | * ppc440spe_desc_set_src_addr - set source address into the descriptor | 536 | * ppc440spe_desc_set_src_addr - set source address into the descriptor |
560 | */ | 537 | */ |
561 | static void ppc440spe_desc_set_src_addr(struct ppc440spe_adma_desc_slot *desc, | 538 | static void ppc440spe_desc_set_src_addr(struct ppc440spe_adma_desc_slot *desc, |
@@ -1504,8 +1481,6 @@ static dma_cookie_t ppc440spe_adma_run_tx_complete_actions( | |||
1504 | struct ppc440spe_adma_chan *chan, | 1481 | struct ppc440spe_adma_chan *chan, |
1505 | dma_cookie_t cookie) | 1482 | dma_cookie_t cookie) |
1506 | { | 1483 | { |
1507 | int i; | ||
1508 | |||
1509 | BUG_ON(desc->async_tx.cookie < 0); | 1484 | BUG_ON(desc->async_tx.cookie < 0); |
1510 | if (desc->async_tx.cookie > 0) { | 1485 | if (desc->async_tx.cookie > 0) { |
1511 | cookie = desc->async_tx.cookie; | 1486 | cookie = desc->async_tx.cookie; |
@@ -3898,7 +3873,7 @@ static void ppc440spe_adma_init_capabilities(struct ppc440spe_adma_device *adev) | |||
3898 | ppc440spe_adma_prep_dma_interrupt; | 3873 | ppc440spe_adma_prep_dma_interrupt; |
3899 | } | 3874 | } |
3900 | pr_info("%s: AMCC(R) PPC440SP(E) ADMA Engine: " | 3875 | pr_info("%s: AMCC(R) PPC440SP(E) ADMA Engine: " |
3901 | "( %s%s%s%s%s%s%s)\n", | 3876 | "( %s%s%s%s%s%s)\n", |
3902 | dev_name(adev->dev), | 3877 | dev_name(adev->dev), |
3903 | dma_has_cap(DMA_PQ, adev->common.cap_mask) ? "pq " : "", | 3878 | dma_has_cap(DMA_PQ, adev->common.cap_mask) ? "pq " : "", |
3904 | dma_has_cap(DMA_PQ_VAL, adev->common.cap_mask) ? "pq_val " : "", | 3879 | dma_has_cap(DMA_PQ_VAL, adev->common.cap_mask) ? "pq_val " : "", |