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authorLinus Torvalds <torvalds@linux-foundation.org>2011-05-28 15:35:15 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-05-28 15:35:15 -0400
commit4cb865deec59ef31d966622d1ec87411ae32dfab (patch)
treee060d515f62e4f334aded38c9079485d50166693 /drivers/dma/ppc4xx/adma.c
parent55f08e1baa3ef11c952b626dbc7ef9e3e8332a63 (diff)
parent19d78a61be6dd707dcec298c486303d4ba2c840a (diff)
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (33 commits) x86: poll waiting for I/OAT DMA channel status maintainers: add dma engine tree details dmaengine: add TODO items for future work on dma drivers dmaengine: Add API documentation for slave dma usage dmaengine/dw_dmac: Update maintainer-ship dmaengine: move link order dmaengine/dw_dmac: implement pause and resume in dwc_control dmaengine/dw_dmac: Replace spin_lock* with irqsave variants and enable submission from callback dmaengine/dw_dmac: Divide one sg to many desc, if sg len is greater than DWC_MAX_COUNT dmaengine/dw_dmac: set residue as total len in dwc_tx_status if status is !DMA_SUCCESS dmaengine/dw_dmac: don't call callback routine in case dmaengine_terminate_all() is called dmaengine: at_hdmac: pause: no need to wait for FIFO empty pch_dma: modify pci device table definition pch_dma: Support new device ML7223 IOH pch_dma: Support I2S for ML7213 IOH pch_dma: Fix DMA setting issue pch_dma: modify for checkpatch pch_dma: fix dma direction issue for ML7213 IOH video-in dmaengine: at_hdmac: use descriptor chaining help function dmaengine: at_hdmac: implement pause and resume in atc_control ... Fix up trivial conflict in drivers/dma/dw_dmac.c
Diffstat (limited to 'drivers/dma/ppc4xx/adma.c')
-rw-r--r--drivers/dma/ppc4xx/adma.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c
index 3b0247e74cc4..fc457a7e8832 100644
--- a/drivers/dma/ppc4xx/adma.c
+++ b/drivers/dma/ppc4xx/adma.c
@@ -2313,7 +2313,7 @@ static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_memcpy(
2313 if (unlikely(!len)) 2313 if (unlikely(!len))
2314 return NULL; 2314 return NULL;
2315 2315
2316 BUG_ON(unlikely(len > PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT)); 2316 BUG_ON(len > PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT);
2317 2317
2318 spin_lock_bh(&ppc440spe_chan->lock); 2318 spin_lock_bh(&ppc440spe_chan->lock);
2319 2319
@@ -2354,7 +2354,7 @@ static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_memset(
2354 if (unlikely(!len)) 2354 if (unlikely(!len))
2355 return NULL; 2355 return NULL;
2356 2356
2357 BUG_ON(unlikely(len > PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT)); 2357 BUG_ON(len > PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT);
2358 2358
2359 spin_lock_bh(&ppc440spe_chan->lock); 2359 spin_lock_bh(&ppc440spe_chan->lock);
2360 2360
@@ -2397,7 +2397,7 @@ static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_xor(
2397 dma_dest, dma_src, src_cnt)); 2397 dma_dest, dma_src, src_cnt));
2398 if (unlikely(!len)) 2398 if (unlikely(!len))
2399 return NULL; 2399 return NULL;
2400 BUG_ON(unlikely(len > PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT)); 2400 BUG_ON(len > PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT);
2401 2401
2402 dev_dbg(ppc440spe_chan->device->common.dev, 2402 dev_dbg(ppc440spe_chan->device->common.dev,
2403 "ppc440spe adma%d: %s src_cnt: %d len: %u int_en: %d\n", 2403 "ppc440spe adma%d: %s src_cnt: %d len: %u int_en: %d\n",
@@ -2887,7 +2887,7 @@ static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_pq(
2887 ADMA_LL_DBG(prep_dma_pq_dbg(ppc440spe_chan->device->id, 2887 ADMA_LL_DBG(prep_dma_pq_dbg(ppc440spe_chan->device->id,
2888 dst, src, src_cnt)); 2888 dst, src, src_cnt));
2889 BUG_ON(!len); 2889 BUG_ON(!len);
2890 BUG_ON(unlikely(len > PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT)); 2890 BUG_ON(len > PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT);
2891 BUG_ON(!src_cnt); 2891 BUG_ON(!src_cnt);
2892 2892
2893 if (src_cnt == 1 && dst[1] == src[0]) { 2893 if (src_cnt == 1 && dst[1] == src[0]) {