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authorRussell King <rmk+kernel@arm.linux.org.uk>2013-11-02 17:09:18 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-04-03 19:28:05 -0400
commit49ae0b29439446cff81c32bf01fb7b7cce195373 (patch)
treee5eb9d8b656779620a7423614369dda1645de47c /drivers/dma/omap-dma.c
parent9043826d88467091543c1d3ab06eb4afeed34789 (diff)
dmaengine: omap-dma: move CCR buffering disable errata out of the fast path
Since we record the CCR register in the dma transaction, we can move the processing of the iframe buffering errata out of the omap_dma_start(). Move it to the preparation functions. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/dma/omap-dma.c')
-rw-r--r--drivers/dma/omap-dma.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 6cf66e608338..324f4c7c5dd0 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -201,8 +201,6 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d)
201 c->plat->dma_write(d->cicr, CICR, c->dma_ch); 201 c->plat->dma_write(d->cicr, CICR, c->dma_ch);
202 202
203 val = c->plat->dma_read(CCR, c->dma_ch); 203 val = c->plat->dma_read(CCR, c->dma_ch);
204 if (od->plat->errata & DMA_ERRATA_IFRAME_BUFFERING)
205 val |= CCR_BUFFERING_DISABLE;
206 val |= CCR_ENABLE; 204 val |= CCR_ENABLE;
207 mb(); 205 mb();
208 c->plat->dma_write(val, CCR, c->dma_ch); 206 c->plat->dma_write(val, CCR, c->dma_ch);
@@ -558,6 +556,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
558 struct dma_chan *chan, struct scatterlist *sgl, unsigned sglen, 556 struct dma_chan *chan, struct scatterlist *sgl, unsigned sglen,
559 enum dma_transfer_direction dir, unsigned long tx_flags, void *context) 557 enum dma_transfer_direction dir, unsigned long tx_flags, void *context)
560{ 558{
559 struct omap_dmadev *od = to_omap_dma_dev(chan->device);
561 struct omap_chan *c = to_omap_dma_chan(chan); 560 struct omap_chan *c = to_omap_dma_chan(chan);
562 enum dma_slave_buswidth dev_width; 561 enum dma_slave_buswidth dev_width;
563 struct scatterlist *sgent; 562 struct scatterlist *sgent;
@@ -636,6 +635,8 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
636 635
637 d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE; 636 d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
638 } 637 }
638 if (od->plat->errata & DMA_ERRATA_IFRAME_BUFFERING)
639 d->ccr |= CCR_BUFFERING_DISABLE;
639 640
640 /* 641 /*
641 * Build our scatterlist entries: each contains the address, 642 * Build our scatterlist entries: each contains the address,
@@ -760,6 +761,8 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
760 761
761 d->csdp |= CSDP_DST_BURST_64 | CSDP_SRC_BURST_64; 762 d->csdp |= CSDP_DST_BURST_64 | CSDP_SRC_BURST_64;
762 } 763 }
764 if (od->plat->errata & DMA_ERRATA_IFRAME_BUFFERING)
765 d->ccr |= CCR_BUFFERING_DISABLE;
763 766
764 c->cyclic = true; 767 c->cyclic = true;
765 768