diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-11-02 17:23:06 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-04-03 19:28:08 -0400 |
commit | 470b23f7308dd2af25bd075d14a724f8ccd93985 (patch) | |
tree | 04a244bd2c9ea12022246cdb9fba835deb8617f8 /drivers/dma/omap-dma.c | |
parent | 49ae0b29439446cff81c32bf01fb7b7cce195373 (diff) |
dmaengine: omap-dma: consolidate clearing channel status register
Consolidate clearing of the channel status register, rather than open
coding the same functionality in two places.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/dma/omap-dma.c')
-rw-r--r-- | drivers/dma/omap-dma.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c index 324f4c7c5dd0..d1641aa9d113 100644 --- a/drivers/dma/omap-dma.c +++ b/drivers/dma/omap-dma.c | |||
@@ -169,6 +169,14 @@ static void omap_dma_desc_free(struct virt_dma_desc *vd) | |||
169 | kfree(container_of(vd, struct omap_desc, vd)); | 169 | kfree(container_of(vd, struct omap_desc, vd)); |
170 | } | 170 | } |
171 | 171 | ||
172 | static void omap_dma_clear_csr(struct omap_chan *c) | ||
173 | { | ||
174 | if (dma_omap1()) | ||
175 | c->plat->dma_read(CSR, c->dma_ch); | ||
176 | else | ||
177 | c->plat->dma_write(~0, CSR, c->dma_ch); | ||
178 | } | ||
179 | |||
172 | static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) | 180 | static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) |
173 | { | 181 | { |
174 | struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device); | 182 | struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device); |
@@ -191,11 +199,7 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) | |||
191 | } else if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS) | 199 | } else if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS) |
192 | c->plat->dma_write(c->dma_ch, CLNK_CTRL, c->dma_ch); | 200 | c->plat->dma_write(c->dma_ch, CLNK_CTRL, c->dma_ch); |
193 | 201 | ||
194 | /* Clear CSR */ | 202 | omap_dma_clear_csr(c); |
195 | if (dma_omap1()) | ||
196 | c->plat->dma_read(CSR, c->dma_ch); | ||
197 | else | ||
198 | c->plat->dma_write(~0, CSR, c->dma_ch); | ||
199 | 203 | ||
200 | /* Enable interrupts */ | 204 | /* Enable interrupts */ |
201 | c->plat->dma_write(d->cicr, CICR, c->dma_ch); | 205 | c->plat->dma_write(d->cicr, CICR, c->dma_ch); |
@@ -214,11 +218,7 @@ static void omap_dma_stop(struct omap_chan *c) | |||
214 | /* disable irq */ | 218 | /* disable irq */ |
215 | c->plat->dma_write(0, CICR, c->dma_ch); | 219 | c->plat->dma_write(0, CICR, c->dma_ch); |
216 | 220 | ||
217 | /* Clear CSR */ | 221 | omap_dma_clear_csr(c); |
218 | if (dma_omap1()) | ||
219 | c->plat->dma_read(CSR, c->dma_ch); | ||
220 | else | ||
221 | c->plat->dma_write(~0, CSR, c->dma_ch); | ||
222 | 222 | ||
223 | val = c->plat->dma_read(CCR, c->dma_ch); | 223 | val = c->plat->dma_read(CCR, c->dma_ch); |
224 | if (od->plat->errata & DMA_ERRATA_i541 && val & CCR_TRIGGER_SRC) { | 224 | if (od->plat->errata & DMA_ERRATA_i541 && val & CCR_TRIGGER_SRC) { |