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authorIlya Yanok <yanok@emcraft.com>2010-10-26 19:52:56 -0400
committerGrant Likely <grant.likely@secretlab.ca>2010-12-30 00:28:14 -0500
commit2862559e8a1e7c47bb3003f0edbc9db9009dc32b (patch)
tree2737fe6a622fe36a1a9dc49224cdb39608e9cac8 /drivers/dma/mpc512x_dma.c
parent6504cf3412373f42b53a675363c056901c1596cf (diff)
powerpc/512x: fix the hanged dma transfer issue
Current code clears interrupt active status _after_ submitting new transfers. This leaves a possibility of clearing the interrupt for this new transfer (if it is triggered fast enough) and thus lose this interrupt. We want to clear interrupt active status _before_ new transfers is submitted and for current channel only. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/dma/mpc512x_dma.c')
-rw-r--r--drivers/dma/mpc512x_dma.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/dma/mpc512x_dma.c b/drivers/dma/mpc512x_dma.c
index 1bc04aa27b14..071752727718 100644
--- a/drivers/dma/mpc512x_dma.c
+++ b/drivers/dma/mpc512x_dma.c
@@ -276,6 +276,9 @@ static void mpc_dma_irq_process(struct mpc_dma *mdma, u32 is, u32 es, int off)
276 276
277 spin_lock(&mchan->lock); 277 spin_lock(&mchan->lock);
278 278
279 out_8(&mdma->regs->dmacint, ch + off);
280 out_8(&mdma->regs->dmacerr, ch + off);
281
279 /* Check error status */ 282 /* Check error status */
280 if (es & (1 << ch)) 283 if (es & (1 << ch))
281 list_for_each_entry(mdesc, &mchan->active, node) 284 list_for_each_entry(mdesc, &mchan->active, node)
@@ -309,12 +312,6 @@ static irqreturn_t mpc_dma_irq(int irq, void *data)
309 mpc_dma_irq_process(mdma, in_be32(&mdma->regs->dmaintl), 312 mpc_dma_irq_process(mdma, in_be32(&mdma->regs->dmaintl),
310 in_be32(&mdma->regs->dmaerrl), 0); 313 in_be32(&mdma->regs->dmaerrl), 0);
311 314
312 /* Ack interrupt on all channels */
313 out_be32(&mdma->regs->dmainth, 0xFFFFFFFF);
314 out_be32(&mdma->regs->dmaintl, 0xFFFFFFFF);
315 out_be32(&mdma->regs->dmaerrh, 0xFFFFFFFF);
316 out_be32(&mdma->regs->dmaerrl, 0xFFFFFFFF);
317
318 /* Schedule tasklet */ 315 /* Schedule tasklet */
319 tasklet_schedule(&mdma->tasklet); 316 tasklet_schedule(&mdma->tasklet);
320 317