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authorGuennadi Liakhovetski <lg@denx.de>2009-03-25 12:13:23 -0400
committerDan Williams <dan.j.williams@intel.com>2009-03-25 12:13:23 -0400
commit0149f7d5dc66dcffbb044ba005a5378a5864d2a3 (patch)
tree9ba399f0c71d62d23563d74308a58cc7eb5baf62 /drivers/dma/ipu
parent257b17ca030387cb17314cd1851507bdd1b4ddd5 (diff)
dma: ipu_idmac driver cosmetic clean-up
Remove superfluous semicolons, update comments. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ipu')
-rw-r--r--drivers/dma/ipu/ipu_idmac.c33
1 files changed, 14 insertions, 19 deletions
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index ae50a9d1a4e6..a6f7294c8598 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -107,7 +107,7 @@ static uint32_t bytes_per_pixel(enum pixel_fmt fmt)
107 } 107 }
108} 108}
109 109
110/* Enable / disable direct write to memory by the Camera Sensor Interface */ 110/* Enable direct write to memory by the Camera Sensor Interface */
111static void ipu_ic_enable_task(struct ipu *ipu, enum ipu_channel channel) 111static void ipu_ic_enable_task(struct ipu *ipu, enum ipu_channel channel)
112{ 112{
113 uint32_t ic_conf, mask; 113 uint32_t ic_conf, mask;
@@ -126,6 +126,7 @@ static void ipu_ic_enable_task(struct ipu *ipu, enum ipu_channel channel)
126 idmac_write_icreg(ipu, ic_conf, IC_CONF); 126 idmac_write_icreg(ipu, ic_conf, IC_CONF);
127} 127}
128 128
129/* Called under spin_lock_irqsave(&ipu_data.lock) */
129static void ipu_ic_disable_task(struct ipu *ipu, enum ipu_channel channel) 130static void ipu_ic_disable_task(struct ipu *ipu, enum ipu_channel channel)
130{ 131{
131 uint32_t ic_conf, mask; 132 uint32_t ic_conf, mask;
@@ -422,7 +423,7 @@ static void ipu_ch_param_set_size(union chan_param_mem *params,
422 break; 423 break;
423 default: 424 default:
424 dev_err(ipu_data.dev, 425 dev_err(ipu_data.dev,
425 "mxc ipu: unimplemented pixel format %d\n", pixel_fmt); 426 "mx3 ipu: unimplemented pixel format %d\n", pixel_fmt);
426 break; 427 break;
427 } 428 }
428 429
@@ -433,20 +434,20 @@ static void ipu_ch_param_set_burst_size(union chan_param_mem *params,
433 uint16_t burst_pixels) 434 uint16_t burst_pixels)
434{ 435{
435 params->pp.npb = burst_pixels - 1; 436 params->pp.npb = burst_pixels - 1;
436}; 437}
437 438
438static void ipu_ch_param_set_buffer(union chan_param_mem *params, 439static void ipu_ch_param_set_buffer(union chan_param_mem *params,
439 dma_addr_t buf0, dma_addr_t buf1) 440 dma_addr_t buf0, dma_addr_t buf1)
440{ 441{
441 params->pp.eba0 = buf0; 442 params->pp.eba0 = buf0;
442 params->pp.eba1 = buf1; 443 params->pp.eba1 = buf1;
443}; 444}
444 445
445static void ipu_ch_param_set_rotation(union chan_param_mem *params, 446static void ipu_ch_param_set_rotation(union chan_param_mem *params,
446 enum ipu_rotate_mode rotate) 447 enum ipu_rotate_mode rotate)
447{ 448{
448 params->pp.bam = rotate; 449 params->pp.bam = rotate;
449}; 450}
450 451
451static void ipu_write_param_mem(uint32_t addr, uint32_t *data, 452static void ipu_write_param_mem(uint32_t addr, uint32_t *data,
452 uint32_t num_words) 453 uint32_t num_words)
@@ -571,7 +572,7 @@ static uint32_t dma_param_addr(uint32_t dma_ch)
571{ 572{
572 /* Channel Parameter Memory */ 573 /* Channel Parameter Memory */
573 return 0x10000 | (dma_ch << 4); 574 return 0x10000 | (dma_ch << 4);
574}; 575}
575 576
576static void ipu_channel_set_priority(struct ipu *ipu, enum ipu_channel channel, 577static void ipu_channel_set_priority(struct ipu *ipu, enum ipu_channel channel,
577 bool prio) 578 bool prio)
@@ -611,7 +612,8 @@ static uint32_t ipu_channel_conf_mask(enum ipu_channel channel)
611 612
612/** 613/**
613 * ipu_enable_channel() - enable an IPU channel. 614 * ipu_enable_channel() - enable an IPU channel.
614 * @channel: channel ID. 615 * @idmac: IPU DMAC context.
616 * @ichan: IDMAC channel.
615 * @return: 0 on success or negative error code on failure. 617 * @return: 0 on success or negative error code on failure.
616 */ 618 */
617static int ipu_enable_channel(struct idmac *idmac, struct idmac_channel *ichan) 619static int ipu_enable_channel(struct idmac *idmac, struct idmac_channel *ichan)
@@ -649,7 +651,7 @@ static int ipu_enable_channel(struct idmac *idmac, struct idmac_channel *ichan)
649 651
650/** 652/**
651 * ipu_init_channel_buffer() - initialize a buffer for logical IPU channel. 653 * ipu_init_channel_buffer() - initialize a buffer for logical IPU channel.
652 * @channel: channel ID. 654 * @ichan: IDMAC channel.
653 * @pixel_fmt: pixel format of buffer. Pixel format is a FOURCC ASCII code. 655 * @pixel_fmt: pixel format of buffer. Pixel format is a FOURCC ASCII code.
654 * @width: width of buffer in pixels. 656 * @width: width of buffer in pixels.
655 * @height: height of buffer in pixels. 657 * @height: height of buffer in pixels.
@@ -687,7 +689,7 @@ static int ipu_init_channel_buffer(struct idmac_channel *ichan,
687 } 689 }
688 690
689 /* IC channel's stride must be a multiple of 8 pixels */ 691 /* IC channel's stride must be a multiple of 8 pixels */
690 if ((channel <= 13) && (stride % 8)) { 692 if ((channel <= IDMAC_IC_13) && (stride % 8)) {
691 dev_err(ipu->dev, "Stride must be 8 pixel multiple\n"); 693 dev_err(ipu->dev, "Stride must be 8 pixel multiple\n");
692 return -EINVAL; 694 return -EINVAL;
693 } 695 }
@@ -752,7 +754,7 @@ static void ipu_select_buffer(enum ipu_channel channel, int buffer_n)
752 754
753/** 755/**
754 * ipu_update_channel_buffer() - update physical address of a channel buffer. 756 * ipu_update_channel_buffer() - update physical address of a channel buffer.
755 * @channel: channel ID. 757 * @ichan: IDMAC channel.
756 * @buffer_n: buffer number to update. 758 * @buffer_n: buffer number to update.
757 * 0 or 1 are the only valid values. 759 * 0 or 1 are the only valid values.
758 * @phyaddr: buffer physical address. 760 * @phyaddr: buffer physical address.
@@ -1341,13 +1343,7 @@ static void ipu_gc_tasklet(unsigned long arg)
1341 } 1343 }
1342} 1344}
1343 1345
1344/* 1346/* Allocate and initialise a transfer descriptor. */
1345 * At the time .device_alloc_chan_resources() method is called, we cannot know,
1346 * whether the client will accept the channel. Thus we must only check, if we
1347 * can satisfy client's request but the only real criterion to verify, whether
1348 * the client has accepted our offer is the client_count. That's why we have to
1349 * perform the rest of our allocation tasks on the first call to this function.
1350 */
1351static struct dma_async_tx_descriptor *idmac_prep_slave_sg(struct dma_chan *chan, 1347static struct dma_async_tx_descriptor *idmac_prep_slave_sg(struct dma_chan *chan,
1352 struct scatterlist *sgl, unsigned int sg_len, 1348 struct scatterlist *sgl, unsigned int sg_len,
1353 enum dma_data_direction direction, unsigned long tx_flags) 1349 enum dma_data_direction direction, unsigned long tx_flags)
@@ -1432,8 +1428,7 @@ static void __idmac_terminate_all(struct dma_chan *chan)
1432 struct idmac_tx_desc *desc = ichan->desc + i; 1428 struct idmac_tx_desc *desc = ichan->desc + i;
1433 if (list_empty(&desc->list)) 1429 if (list_empty(&desc->list))
1434 /* Descriptor was prepared, but not submitted */ 1430 /* Descriptor was prepared, but not submitted */
1435 list_add(&desc->list, 1431 list_add(&desc->list, &ichan->free_list);
1436 &ichan->free_list);
1437 1432
1438 async_tx_clear_ack(&desc->txd); 1433 async_tx_clear_ack(&desc->txd);
1439 } 1434 }