diff options
author | Maciej Sosnowski <maciej.sosnowski@intel.com> | 2008-07-22 13:07:33 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2008-07-22 13:07:33 -0400 |
commit | 09177e85d6a0bffac8b55afd28ed8b82bd873f0b (patch) | |
tree | ce3cb72509cc6c03bfc5d70a3ca0901a44b87fc0 /drivers/dma/ioatdma.h | |
parent | 2a46fa13d788364c093c4296fe01cae837aa8919 (diff) |
I/OAT: Add watchdog/reset functionality to ioatdma
Due to occasional DMA channel hangs observed for I/OAT versions 1.2 and 2.0
a watchdog has been introduced to check every 2 seconds
if all channels progress normally.
If stuck channel is detected, driver resets it.
The reset is done in two parts. The second part is scheduled
by the first one to reinitialize the channel after the restart.
Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ioatdma.h')
-rw-r--r-- | drivers/dma/ioatdma.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/dma/ioatdma.h b/drivers/dma/ioatdma.h index f2c7fedbf009..c6ec933f9895 100644 --- a/drivers/dma/ioatdma.h +++ b/drivers/dma/ioatdma.h | |||
@@ -28,7 +28,7 @@ | |||
28 | #include <linux/cache.h> | 28 | #include <linux/cache.h> |
29 | #include <linux/pci_ids.h> | 29 | #include <linux/pci_ids.h> |
30 | 30 | ||
31 | #define IOAT_DMA_VERSION "2.04" | 31 | #define IOAT_DMA_VERSION "2.18" |
32 | 32 | ||
33 | enum ioat_interrupt { | 33 | enum ioat_interrupt { |
34 | none = 0, | 34 | none = 0, |
@@ -40,6 +40,7 @@ enum ioat_interrupt { | |||
40 | 40 | ||
41 | #define IOAT_LOW_COMPLETION_MASK 0xffffffc0 | 41 | #define IOAT_LOW_COMPLETION_MASK 0xffffffc0 |
42 | #define IOAT_DMA_DCA_ANY_CPU ~0 | 42 | #define IOAT_DMA_DCA_ANY_CPU ~0 |
43 | #define IOAT_WATCHDOG_PERIOD (2 * HZ) | ||
43 | 44 | ||
44 | 45 | ||
45 | /** | 46 | /** |
@@ -62,6 +63,7 @@ struct ioatdma_device { | |||
62 | struct dma_device common; | 63 | struct dma_device common; |
63 | u8 version; | 64 | u8 version; |
64 | enum ioat_interrupt irq_mode; | 65 | enum ioat_interrupt irq_mode; |
66 | struct delayed_work work; | ||
65 | struct msix_entry msix_entries[4]; | 67 | struct msix_entry msix_entries[4]; |
66 | struct ioat_dma_chan *idx[4]; | 68 | struct ioat_dma_chan *idx[4]; |
67 | }; | 69 | }; |
@@ -75,6 +77,7 @@ struct ioat_dma_chan { | |||
75 | 77 | ||
76 | dma_cookie_t completed_cookie; | 78 | dma_cookie_t completed_cookie; |
77 | unsigned long last_completion; | 79 | unsigned long last_completion; |
80 | unsigned long last_completion_time; | ||
78 | 81 | ||
79 | size_t xfercap; /* XFERCAP register value expanded out */ | 82 | size_t xfercap; /* XFERCAP register value expanded out */ |
80 | 83 | ||
@@ -82,6 +85,10 @@ struct ioat_dma_chan { | |||
82 | spinlock_t desc_lock; | 85 | spinlock_t desc_lock; |
83 | struct list_head free_desc; | 86 | struct list_head free_desc; |
84 | struct list_head used_desc; | 87 | struct list_head used_desc; |
88 | unsigned long watchdog_completion; | ||
89 | int watchdog_tcp_cookie; | ||
90 | u32 watchdog_last_tcp_cookie; | ||
91 | struct delayed_work work; | ||
85 | 92 | ||
86 | int pending; | 93 | int pending; |
87 | int dmacount; | 94 | int dmacount; |
@@ -98,6 +105,7 @@ struct ioat_dma_chan { | |||
98 | u32 high; | 105 | u32 high; |
99 | }; | 106 | }; |
100 | } *completion_virt; | 107 | } *completion_virt; |
108 | unsigned long last_compl_desc_addr_hw; | ||
101 | struct tasklet_struct cleanup_task; | 109 | struct tasklet_struct cleanup_task; |
102 | }; | 110 | }; |
103 | 111 | ||