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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-09 22:10:41 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-09 22:10:41 -0400
commitb7e97d22113bcaafff93774e3085f5b567eaba9c (patch)
tree1d3a13574310bde064fceb4408cf91a44c59c078 /drivers/dma/ioat
parent943c2acea53784c45fb291498d04d5188fdea891 (diff)
parentd0fc905429f7f5f3ad365466669c55b04b92c1e5 (diff)
Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine updates from Vinod Koul: "This time we have Andy updates on dw_dmac which is attempting to make this IP block available as PCI and platform device though not fully complete this time. We also have TI EDMA moving the dma driver to use dmaengine APIs, also have a new driver for mmp-tdma, along with bunch of small updates. Now for your excitement the merge is little unusual here, while merging the auto merge on linux-next picks wrong choice for pl330 (drivers/dma/pl330.c) and this causes build failure. The correct resolution is in linux-next. (DMA: PL330: Fix build error) I didn't back merge your tree this time as you are better than me so no point in doing that for me :)" Fixed the pl330 conflict as in linux-next, along with trivial header file conflicts due to changed includes. * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (29 commits) dma: tegra: fix interrupt name issue with apb dma. dw_dmac: fix a regression in dwc_prep_dma_memcpy dw_dmac: introduce software emulation of LLP transfers dw_dmac: autoconfigure data_width or get it via platform data dw_dmac: autoconfigure block_size or use platform data dw_dmac: get number of channels from hardware if possible dw_dmac: fill optional encoded parameters in register structure dw_dmac: mark dwc_dump_chan_regs as inline DMA: PL330: return ENOMEM instead of 0 from pl330_alloc_chan_resources DMA: PL330: Remove redundant runtime_suspend/resume functions DMA: PL330: Remove controller clock enable/disable dmaengine: use kmem_cache_zalloc instead of kmem_cache_alloc/memset DMA: PL330: Set the capability of pdm0 and pdm1 as DMA_PRIVATE ARM: EXYNOS: Set the capability of pdm0 and pdm1 as DMA_PRIVATE dma: tegra: use list_move_tail instead of list_del/list_add_tail mxs/dma: Enlarge the CCW descriptor area to 4 pages dw_dmac: utilize slave_id to pass request line dmaengine: mmp_tdma: add dt support dmaengine: mmp-pdma support spi: davici - make davinci select edma ...
Diffstat (limited to 'drivers/dma/ioat')
-rw-r--r--drivers/dma/ioat/dma_v2.c3
-rw-r--r--drivers/dma/ioat/pci.c22
2 files changed, 23 insertions, 2 deletions
diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c
index 86895760b598..b9d667851445 100644
--- a/drivers/dma/ioat/dma_v2.c
+++ b/drivers/dma/ioat/dma_v2.c
@@ -434,12 +434,11 @@ static struct ioat_ring_ent *ioat2_alloc_ring_ent(struct dma_chan *chan, gfp_t f
434 return NULL; 434 return NULL;
435 memset(hw, 0, sizeof(*hw)); 435 memset(hw, 0, sizeof(*hw));
436 436
437 desc = kmem_cache_alloc(ioat2_cache, flags); 437 desc = kmem_cache_zalloc(ioat2_cache, flags);
438 if (!desc) { 438 if (!desc) {
439 pci_pool_free(dma->dma_pool, hw, phys); 439 pci_pool_free(dma->dma_pool, hw, phys);
440 return NULL; 440 return NULL;
441 } 441 }
442 memset(desc, 0, sizeof(*desc));
443 442
444 dma_async_tx_descriptor_init(&desc->txd, chan); 443 dma_async_tx_descriptor_init(&desc->txd, chan);
445 desc->txd.tx_submit = ioat2_tx_submit_unlock; 444 desc->txd.tx_submit = ioat2_tx_submit_unlock;
diff --git a/drivers/dma/ioat/pci.c b/drivers/dma/ioat/pci.c
index 5e3a40f79945..c0573061b45d 100644
--- a/drivers/dma/ioat/pci.c
+++ b/drivers/dma/ioat/pci.c
@@ -40,6 +40,17 @@ MODULE_VERSION(IOAT_DMA_VERSION);
40MODULE_LICENSE("Dual BSD/GPL"); 40MODULE_LICENSE("Dual BSD/GPL");
41MODULE_AUTHOR("Intel Corporation"); 41MODULE_AUTHOR("Intel Corporation");
42 42
43#define PCI_DEVICE_ID_INTEL_IOAT_IVB0 0x0e20
44#define PCI_DEVICE_ID_INTEL_IOAT_IVB1 0x0e21
45#define PCI_DEVICE_ID_INTEL_IOAT_IVB2 0x0e22
46#define PCI_DEVICE_ID_INTEL_IOAT_IVB3 0x0e23
47#define PCI_DEVICE_ID_INTEL_IOAT_IVB4 0x0e24
48#define PCI_DEVICE_ID_INTEL_IOAT_IVB5 0x0e25
49#define PCI_DEVICE_ID_INTEL_IOAT_IVB6 0x0e26
50#define PCI_DEVICE_ID_INTEL_IOAT_IVB7 0x0e27
51#define PCI_DEVICE_ID_INTEL_IOAT_IVB8 0x0e2e
52#define PCI_DEVICE_ID_INTEL_IOAT_IVB9 0x0e2f
53
43static struct pci_device_id ioat_pci_tbl[] = { 54static struct pci_device_id ioat_pci_tbl[] = {
44 /* I/OAT v1 platforms */ 55 /* I/OAT v1 platforms */
45 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT) }, 56 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT) },
@@ -83,6 +94,17 @@ static struct pci_device_id ioat_pci_tbl[] = {
83 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB8) }, 94 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB8) },
84 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB9) }, 95 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB9) },
85 96
97 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB0) },
98 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB1) },
99 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB2) },
100 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB3) },
101 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB4) },
102 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB5) },
103 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB6) },
104 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB7) },
105 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB8) },
106 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB9) },
107
86 { 0, } 108 { 0, }
87}; 109};
88MODULE_DEVICE_TABLE(pci, ioat_pci_tbl); 110MODULE_DEVICE_TABLE(pci, ioat_pci_tbl);