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authorDan Williams <dan.j.williams@intel.com>2011-07-22 17:20:46 -0400
committerDan Williams <dan.j.williams@intel.com>2011-08-04 01:25:06 -0400
commitd0b0c8c79b26a1f48e1e92a2c073655159e72b7c (patch)
tree46756f2c624172fca7a44b0dddce433f18fa9733 /drivers/dma/ioat
parent9b487ced8a903f1028fcfaef1e6406acc91fe0fa (diff)
ioat: fix xor_idx_to_desc
For versions of the device that implement operation-types 0x87, 0x88 (IOAT_OP_XOR, IOAT_OP_XOR_VAL) this map determines whether a given source is located in the base or extended descriptor. Source addresses 6 through 8 require an extended descriptor, hence 0xe0, not 0xd0. No shipping hardware currently implements these operation types. Reported-by: Evgueni Smogailov <evgueni.smogailov@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ioat')
-rw-r--r--drivers/dma/ioat/dma_v3.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
index fec8664f2f23..f519c93a61e7 100644
--- a/drivers/dma/ioat/dma_v3.c
+++ b/drivers/dma/ioat/dma_v3.c
@@ -73,7 +73,7 @@
73/* provide a lookup table for setting the source address in the base or 73/* provide a lookup table for setting the source address in the base or
74 * extended descriptor of an xor or pq descriptor 74 * extended descriptor of an xor or pq descriptor
75 */ 75 */
76static const u8 xor_idx_to_desc = 0xd0; 76static const u8 xor_idx_to_desc = 0xe0;
77static const u8 xor_idx_to_field[] = { 1, 4, 5, 6, 7, 0, 1, 2 }; 77static const u8 xor_idx_to_field[] = { 1, 4, 5, 6, 7, 0, 1, 2 };
78static const u8 pq_idx_to_desc = 0xf8; 78static const u8 pq_idx_to_desc = 0xf8;
79static const u8 pq_idx_to_field[] = { 1, 4, 5, 0, 1, 2, 4, 5 }; 79static const u8 pq_idx_to_field[] = { 1, 4, 5, 0, 1, 2, 4, 5 };