ioat3: enable dca for completion writes

Tag completion writes for direct cache access to reduce the latency of
checking for descriptor completions.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/dma/ioat/registers.h b/drivers/dma/ioat/registers.h
index 85d04b8c563c..97d26ea6d72f 100644
--- a/drivers/dma/ioat/registers.h
+++ b/drivers/dma/ioat/registers.h
@@ -84,6 +84,7 @@
 /* DMA Channel Registers */
 #define IOAT_CHANCTRL_OFFSET                    0x00    /* 16-bit Channel Control Register */
 #define IOAT_CHANCTRL_CHANNEL_PRIORITY_MASK     0xF000
+#define IOAT3_CHANCTRL_COMPL_DCA_EN             0x0200
 #define IOAT_CHANCTRL_CHANNEL_IN_USE            0x0100
 #define IOAT_CHANCTRL_DESCRIPTOR_ADDR_SNOOP_CONTROL     0x0020
 #define IOAT_CHANCTRL_ERR_INT_EN                0x0010