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authorDan Williams <dan.j.williams@intel.com>2010-03-03 13:47:43 -0500
committerDan Williams <dan.j.williams@intel.com>2010-03-03 13:47:43 -0500
commit281befa5592b0c5f9a3856b5666c62ac66d3d9ee (patch)
treea0e7ca560fd1f2c43d3352786b0a5317af97ccf7 /drivers/dma/ioat/dma_v2.c
parentb372ec2d900a5b50e47ef9e9624536ad146236be (diff)
ioat2: kill pending flag
The pending == 2 case no longer exists in the driver so, we can use ioat2_ring_pending() outside the lock to determine if there might be any descriptors in the ring that the hardware has not seen. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ioat/dma_v2.c')
-rw-r--r--drivers/dma/ioat/dma_v2.c34
1 files changed, 12 insertions, 22 deletions
diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c
index 5f7a500e18d0..c6e4531fe524 100644
--- a/drivers/dma/ioat/dma_v2.c
+++ b/drivers/dma/ioat/dma_v2.c
@@ -51,48 +51,40 @@ MODULE_PARM_DESC(ioat_ring_max_alloc_order,
51 51
52void __ioat2_issue_pending(struct ioat2_dma_chan *ioat) 52void __ioat2_issue_pending(struct ioat2_dma_chan *ioat)
53{ 53{
54 void * __iomem reg_base = ioat->base.reg_base; 54 struct ioat_chan_common *chan = &ioat->base;
55 55
56 ioat->pending = 0;
57 ioat->dmacount += ioat2_ring_pending(ioat); 56 ioat->dmacount += ioat2_ring_pending(ioat);
58 ioat->issued = ioat->head; 57 ioat->issued = ioat->head;
59 /* make descriptor updates globally visible before notifying channel */ 58 /* make descriptor updates globally visible before notifying channel */
60 wmb(); 59 wmb();
61 writew(ioat->dmacount, reg_base + IOAT_CHAN_DMACOUNT_OFFSET); 60 writew(ioat->dmacount, chan->reg_base + IOAT_CHAN_DMACOUNT_OFFSET);
62 dev_dbg(to_dev(&ioat->base), 61 dev_dbg(to_dev(chan),
63 "%s: head: %#x tail: %#x issued: %#x count: %#x\n", 62 "%s: head: %#x tail: %#x issued: %#x count: %#x\n",
64 __func__, ioat->head, ioat->tail, ioat->issued, ioat->dmacount); 63 __func__, ioat->head, ioat->tail, ioat->issued, ioat->dmacount);
65} 64}
66 65
67void ioat2_issue_pending(struct dma_chan *chan) 66void ioat2_issue_pending(struct dma_chan *c)
68{ 67{
69 struct ioat2_dma_chan *ioat = to_ioat2_chan(chan); 68 struct ioat2_dma_chan *ioat = to_ioat2_chan(c);
70 69
71 spin_lock_bh(&ioat->ring_lock); 70 if (ioat2_ring_pending(ioat)) {
72 if (ioat->pending == 1) 71 spin_lock_bh(&ioat->ring_lock);
73 __ioat2_issue_pending(ioat); 72 __ioat2_issue_pending(ioat);
74 spin_unlock_bh(&ioat->ring_lock); 73 spin_unlock_bh(&ioat->ring_lock);
74 }
75} 75}
76 76
77/** 77/**
78 * ioat2_update_pending - log pending descriptors 78 * ioat2_update_pending - log pending descriptors
79 * @ioat: ioat2+ channel 79 * @ioat: ioat2+ channel
80 * 80 *
81 * set pending to '1' unless pending is already set to '2', pending == 2 81 * Check if the number of unsubmitted descriptors has exceeded the
82 * indicates that submission is temporarily blocked due to an in-flight 82 * watermark. Called with ring_lock held
83 * reset. If we are already above the ioat_pending_level threshold then
84 * just issue pending.
85 *
86 * called with ring_lock held
87 */ 83 */
88static void ioat2_update_pending(struct ioat2_dma_chan *ioat) 84static void ioat2_update_pending(struct ioat2_dma_chan *ioat)
89{ 85{
90 if (unlikely(ioat->pending == 2)) 86 if (ioat2_ring_pending(ioat) > ioat_pending_level)
91 return;
92 else if (ioat2_ring_pending(ioat) > ioat_pending_level)
93 __ioat2_issue_pending(ioat); 87 __ioat2_issue_pending(ioat);
94 else
95 ioat->pending = 1;
96} 88}
97 89
98static void __ioat2_start_null_desc(struct ioat2_dma_chan *ioat) 90static void __ioat2_start_null_desc(struct ioat2_dma_chan *ioat)
@@ -546,7 +538,6 @@ int ioat2_alloc_chan_resources(struct dma_chan *c)
546 ioat->head = 0; 538 ioat->head = 0;
547 ioat->issued = 0; 539 ioat->issued = 0;
548 ioat->tail = 0; 540 ioat->tail = 0;
549 ioat->pending = 0;
550 ioat->alloc_order = order; 541 ioat->alloc_order = order;
551 spin_unlock_bh(&ioat->ring_lock); 542 spin_unlock_bh(&ioat->ring_lock);
552 543
@@ -815,7 +806,6 @@ void ioat2_free_chan_resources(struct dma_chan *c)
815 806
816 chan->last_completion = 0; 807 chan->last_completion = 0;
817 chan->completion_dma = 0; 808 chan->completion_dma = 0;
818 ioat->pending = 0;
819 ioat->dmacount = 0; 809 ioat->dmacount = 0;
820} 810}
821 811