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authorDan Williams <dan.j.williams@intel.com>2009-09-08 20:42:55 -0400
committerDan Williams <dan.j.williams@intel.com>2009-09-08 20:42:55 -0400
commitbf40a6869c9198bdf56fe173961feb89e9f0d961 (patch)
tree3d1b6bf44647857997113fe1b036fb46e360d8a7 /drivers/dma/ioat/dma.h
parent2aec048cdc4a5a81163a42a61df903f76a27e737 (diff)
ioat3: split ioat3 support to its own file, add memset
Up until this point the driver for Intel(R) QuickData Technology engines, specification versions 2 and 3, were mostly identical save for a few quirks. Version 3.2 hardware adds many new capabilities (like raid offload support) requiring some infrastructure that is not relevant for v2. For better code organization of the new funcionality move v3 and v3.2 support to its own file dma_v3.c, and export some routines from the base files (dma.c and dma_v2.c) that can be reused directly. The first new capability included in this code reorganization is support for v3.2 memset operations. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ioat/dma.h')
-rw-r--r--drivers/dma/ioat/dma.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
index 0d94e7804c13..c6d58bf541d1 100644
--- a/drivers/dma/ioat/dma.h
+++ b/drivers/dma/ioat/dma.h
@@ -60,6 +60,10 @@
60 * @dca: direct cache access context 60 * @dca: direct cache access context
61 * @intr_quirk: interrupt setup quirk (for ioat_v1 devices) 61 * @intr_quirk: interrupt setup quirk (for ioat_v1 devices)
62 * @enumerate_channels: hw version specific channel enumeration 62 * @enumerate_channels: hw version specific channel enumeration
63 * @cleanup_tasklet: select between the v2 and v3 cleanup routines
64 * @timer_fn: select between the v2 and v3 timer watchdog routines
65 *
66 * Note: the v3 cleanup routine supports raid operations
63 */ 67 */
64 68
65struct ioatdma_device { 69struct ioatdma_device {
@@ -74,6 +78,8 @@ struct ioatdma_device {
74 struct dca_provider *dca; 78 struct dca_provider *dca;
75 void (*intr_quirk)(struct ioatdma_device *device); 79 void (*intr_quirk)(struct ioatdma_device *device);
76 int (*enumerate_channels)(struct ioatdma_device *device); 80 int (*enumerate_channels)(struct ioatdma_device *device);
81 void (*cleanup_tasklet)(unsigned long data);
82 void (*timer_fn)(unsigned long data);
77}; 83};
78 84
79struct ioat_chan_common { 85struct ioat_chan_common {
@@ -287,6 +293,16 @@ static inline bool is_ioat_bug(unsigned long err)
287 IOAT_CHANERR_LENGTH_ERR)); 293 IOAT_CHANERR_LENGTH_ERR));
288} 294}
289 295
296static inline void ioat_unmap(struct pci_dev *pdev, dma_addr_t addr, size_t len,
297 int direction, enum dma_ctrl_flags flags, bool dst)
298{
299 if ((dst && (flags & DMA_COMPL_DEST_UNMAP_SINGLE)) ||
300 (!dst && (flags & DMA_COMPL_SRC_UNMAP_SINGLE)))
301 pci_unmap_single(pdev, addr, len, direction);
302 else
303 pci_unmap_page(pdev, addr, len, direction);
304}
305
290int __devinit ioat_probe(struct ioatdma_device *device); 306int __devinit ioat_probe(struct ioatdma_device *device);
291int __devinit ioat_register(struct ioatdma_device *device); 307int __devinit ioat_register(struct ioatdma_device *device);
292int __devinit ioat1_dma_probe(struct ioatdma_device *dev, int dca); 308int __devinit ioat1_dma_probe(struct ioatdma_device *dev, int dca);