diff options
author | Dan Williams <dan.j.williams@intel.com> | 2009-07-28 17:44:50 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:29:55 -0400 |
commit | dcbc853af6f0c056088e4df0794d9bf36184809e (patch) | |
tree | 1cbab40167487cff6dc8984a00756cfc39dff3f3 /drivers/dma/ioat/dma.h | |
parent | a6a39ca1badbeafc16941fcf2c1010c8c65c8ddc (diff) |
ioat: prepare the code for ioat[12]_dma_chan split
Prepare the code for the conversion of the ioat2 linked-list-ring into a
native ring buffer. After this conversion ioat2 channels will share
less of the ioat1 infrastructure, but there will still be places where
sharing is possible. struct ioat_chan_common is created to house the
channel attributes that will remain common between ioat1 and ioat2
channels.
For every routine that accesses both common and hardware specific fields
the old unified 'ioat_chan' pointer is split into an 'ioat' and 'chan'
pointer. Where 'chan' references common fields and 'ioat' the
hardware/version specific.
[ Impact: pure structure member movement/variable renames, no logic changes ]
Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ioat/dma.h')
-rw-r--r-- | drivers/dma/ioat/dma.h | 49 |
1 files changed, 32 insertions, 17 deletions
diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h index 9f0c853b6a77..5b31db73ad8e 100644 --- a/drivers/dma/ioat/dma.h +++ b/drivers/dma/ioat/dma.h | |||
@@ -35,7 +35,6 @@ | |||
35 | #define IOAT_DMA_DCA_ANY_CPU ~0 | 35 | #define IOAT_DMA_DCA_ANY_CPU ~0 |
36 | #define IOAT_WATCHDOG_PERIOD (2 * HZ) | 36 | #define IOAT_WATCHDOG_PERIOD (2 * HZ) |
37 | 37 | ||
38 | #define to_ioat_chan(chan) container_of(chan, struct ioat_dma_chan, common) | ||
39 | #define to_ioatdma_device(dev) container_of(dev, struct ioatdma_device, common) | 38 | #define to_ioatdma_device(dev) container_of(dev, struct ioatdma_device, common) |
40 | #define to_ioat_desc(lh) container_of(lh, struct ioat_desc_sw, node) | 39 | #define to_ioat_desc(lh) container_of(lh, struct ioat_desc_sw, node) |
41 | #define tx_to_ioat_desc(tx) container_of(tx, struct ioat_desc_sw, txd) | 40 | #define tx_to_ioat_desc(tx) container_of(tx, struct ioat_desc_sw, txd) |
@@ -74,37 +73,24 @@ struct ioatdma_device { | |||
74 | u8 version; | 73 | u8 version; |
75 | struct delayed_work work; | 74 | struct delayed_work work; |
76 | struct msix_entry msix_entries[4]; | 75 | struct msix_entry msix_entries[4]; |
77 | struct ioat_dma_chan *idx[4]; | 76 | struct ioat_chan_common *idx[4]; |
78 | struct dca_provider *dca; | 77 | struct dca_provider *dca; |
79 | void (*intr_quirk)(struct ioatdma_device *device); | 78 | void (*intr_quirk)(struct ioatdma_device *device); |
80 | }; | 79 | }; |
81 | 80 | ||
82 | /** | 81 | struct ioat_chan_common { |
83 | * struct ioat_dma_chan - internal representation of a DMA channel | ||
84 | */ | ||
85 | struct ioat_dma_chan { | ||
86 | |||
87 | void __iomem *reg_base; | 82 | void __iomem *reg_base; |
88 | 83 | ||
89 | dma_cookie_t completed_cookie; | ||
90 | unsigned long last_completion; | 84 | unsigned long last_completion; |
91 | unsigned long last_completion_time; | 85 | unsigned long last_completion_time; |
92 | 86 | ||
93 | size_t xfercap; /* XFERCAP register value expanded out */ | ||
94 | |||
95 | spinlock_t cleanup_lock; | 87 | spinlock_t cleanup_lock; |
96 | spinlock_t desc_lock; | 88 | dma_cookie_t completed_cookie; |
97 | struct list_head free_desc; | ||
98 | struct list_head used_desc; | ||
99 | unsigned long watchdog_completion; | 89 | unsigned long watchdog_completion; |
100 | int watchdog_tcp_cookie; | 90 | int watchdog_tcp_cookie; |
101 | u32 watchdog_last_tcp_cookie; | 91 | u32 watchdog_last_tcp_cookie; |
102 | struct delayed_work work; | 92 | struct delayed_work work; |
103 | 93 | ||
104 | int pending; | ||
105 | u16 dmacount; | ||
106 | u16 desccount; | ||
107 | |||
108 | struct ioatdma_device *device; | 94 | struct ioatdma_device *device; |
109 | struct dma_chan common; | 95 | struct dma_chan common; |
110 | 96 | ||
@@ -120,6 +106,35 @@ struct ioat_dma_chan { | |||
120 | struct tasklet_struct cleanup_task; | 106 | struct tasklet_struct cleanup_task; |
121 | }; | 107 | }; |
122 | 108 | ||
109 | /** | ||
110 | * struct ioat_dma_chan - internal representation of a DMA channel | ||
111 | */ | ||
112 | struct ioat_dma_chan { | ||
113 | struct ioat_chan_common base; | ||
114 | |||
115 | size_t xfercap; /* XFERCAP register value expanded out */ | ||
116 | |||
117 | spinlock_t desc_lock; | ||
118 | struct list_head free_desc; | ||
119 | struct list_head used_desc; | ||
120 | |||
121 | int pending; | ||
122 | u16 dmacount; | ||
123 | u16 desccount; | ||
124 | }; | ||
125 | |||
126 | static inline struct ioat_chan_common *to_chan_common(struct dma_chan *c) | ||
127 | { | ||
128 | return container_of(c, struct ioat_chan_common, common); | ||
129 | } | ||
130 | |||
131 | static inline struct ioat_dma_chan *to_ioat_chan(struct dma_chan *c) | ||
132 | { | ||
133 | struct ioat_chan_common *chan = to_chan_common(c); | ||
134 | |||
135 | return container_of(chan, struct ioat_dma_chan, base); | ||
136 | } | ||
137 | |||
123 | /* wrapper around hardware descriptor format + additional software fields */ | 138 | /* wrapper around hardware descriptor format + additional software fields */ |
124 | 139 | ||
125 | /** | 140 | /** |