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authorDan Williams <dan.j.williams@intel.com>2009-09-08 20:29:44 -0400
committerDan Williams <dan.j.williams@intel.com>2009-09-08 20:29:44 -0400
commite6c0b69a43150c1a37cf342ce5faedf12583bf79 (patch)
tree955456982fea62d6557ad5992f19ee3e73e64bc2 /drivers/dma/ioat/dma.h
parent1f27adc2f050836c12deb4d99afe507636537a0b (diff)
ioat: convert ioat_probe to pcim/devm
The driver currently duplicates much of what these routines offer, so just use the common code. For example ->irq_mode tracks what interrupt mode was initialized, which duplicates the ->msix_enabled and ->msi_enabled handling in pcim_release. This also adds a check to the return value of dma_async_device_register, which can fail. Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ioat/dma.h')
-rw-r--r--drivers/dma/ioat/dma.h11
1 files changed, 0 insertions, 11 deletions
diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
index ccb400f5e279..5e8d7cfabc21 100644
--- a/drivers/dma/ioat/dma.h
+++ b/drivers/dma/ioat/dma.h
@@ -31,14 +31,6 @@
31 31
32#define IOAT_DMA_VERSION "3.64" 32#define IOAT_DMA_VERSION "3.64"
33 33
34enum ioat_interrupt {
35 none = 0,
36 msix_multi_vector = 1,
37 msix_single_vector = 2,
38 msi = 3,
39 intx = 4,
40};
41
42#define IOAT_LOW_COMPLETION_MASK 0xffffffc0 34#define IOAT_LOW_COMPLETION_MASK 0xffffffc0
43#define IOAT_DMA_DCA_ANY_CPU ~0 35#define IOAT_DMA_DCA_ANY_CPU ~0
44#define IOAT_WATCHDOG_PERIOD (2 * HZ) 36#define IOAT_WATCHDOG_PERIOD (2 * HZ)
@@ -59,7 +51,6 @@ enum ioat_interrupt {
59 */ 51 */
60#define NULL_DESC_BUFFER_SIZE 1 52#define NULL_DESC_BUFFER_SIZE 1
61 53
62
63/** 54/**
64 * struct ioatdma_device - internal representation of a IOAT device 55 * struct ioatdma_device - internal representation of a IOAT device
65 * @pdev: PCI-Express device 56 * @pdev: PCI-Express device
@@ -67,7 +58,6 @@ enum ioat_interrupt {
67 * @dma_pool: for allocating DMA descriptors 58 * @dma_pool: for allocating DMA descriptors
68 * @common: embedded struct dma_device 59 * @common: embedded struct dma_device
69 * @version: version of ioatdma device 60 * @version: version of ioatdma device
70 * @irq_mode: which style irq to use
71 * @msix_entries: irq handlers 61 * @msix_entries: irq handlers
72 * @idx: per channel data 62 * @idx: per channel data
73 */ 63 */
@@ -79,7 +69,6 @@ struct ioatdma_device {
79 struct pci_pool *completion_pool; 69 struct pci_pool *completion_pool;
80 struct dma_device common; 70 struct dma_device common;
81 u8 version; 71 u8 version;
82 enum ioat_interrupt irq_mode;
83 struct delayed_work work; 72 struct delayed_work work;
84 struct msix_entry msix_entries[4]; 73 struct msix_entry msix_entries[4];
85 struct ioat_dma_chan *idx[4]; 74 struct ioat_dma_chan *idx[4];