diff options
author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:55:21 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:55:21 -0400 |
commit | bbb20089a3275a19e475dbc21320c3742e3ca423 (patch) | |
tree | 216fdc1cbef450ca688135c5b8969169482d9a48 /drivers/dma/ioat/dma.c | |
parent | 3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff) | |
parent | 657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff) |
Merge branch 'dmaengine' into async-tx-next
Conflicts:
crypto/async_tx/async_xor.c
drivers/dma/ioat/dma_v2.h
drivers/dma/ioat/pci.c
drivers/md/raid5.c
Diffstat (limited to 'drivers/dma/ioat/dma.c')
-rw-r--r-- | drivers/dma/ioat/dma.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c index 32a757be75c1..c524d36d3c2e 100644 --- a/drivers/dma/ioat/dma.c +++ b/drivers/dma/ioat/dma.c | |||
@@ -251,12 +251,12 @@ static dma_cookie_t ioat1_tx_submit(struct dma_async_tx_descriptor *tx) | |||
251 | dev_dbg(to_dev(&ioat->base), "%s: cookie: %d\n", __func__, cookie); | 251 | dev_dbg(to_dev(&ioat->base), "%s: cookie: %d\n", __func__, cookie); |
252 | 252 | ||
253 | /* write address into NextDescriptor field of last desc in chain */ | 253 | /* write address into NextDescriptor field of last desc in chain */ |
254 | first = to_ioat_desc(tx->tx_list.next); | 254 | first = to_ioat_desc(desc->tx_list.next); |
255 | chain_tail = to_ioat_desc(ioat->used_desc.prev); | 255 | chain_tail = to_ioat_desc(ioat->used_desc.prev); |
256 | /* make descriptor updates globally visible before chaining */ | 256 | /* make descriptor updates globally visible before chaining */ |
257 | wmb(); | 257 | wmb(); |
258 | chain_tail->hw->next = first->txd.phys; | 258 | chain_tail->hw->next = first->txd.phys; |
259 | list_splice_tail_init(&tx->tx_list, &ioat->used_desc); | 259 | list_splice_tail_init(&desc->tx_list, &ioat->used_desc); |
260 | dump_desc_dbg(ioat, chain_tail); | 260 | dump_desc_dbg(ioat, chain_tail); |
261 | dump_desc_dbg(ioat, first); | 261 | dump_desc_dbg(ioat, first); |
262 | 262 | ||
@@ -298,6 +298,7 @@ ioat_dma_alloc_descriptor(struct ioat_dma_chan *ioat, gfp_t flags) | |||
298 | 298 | ||
299 | memset(desc, 0, sizeof(*desc)); | 299 | memset(desc, 0, sizeof(*desc)); |
300 | 300 | ||
301 | INIT_LIST_HEAD(&desc_sw->tx_list); | ||
301 | dma_async_tx_descriptor_init(&desc_sw->txd, &ioat->base.common); | 302 | dma_async_tx_descriptor_init(&desc_sw->txd, &ioat->base.common); |
302 | desc_sw->txd.tx_submit = ioat1_tx_submit; | 303 | desc_sw->txd.tx_submit = ioat1_tx_submit; |
303 | desc_sw->hw = desc; | 304 | desc_sw->hw = desc; |
@@ -522,7 +523,7 @@ ioat1_dma_prep_memcpy(struct dma_chan *c, dma_addr_t dma_dest, | |||
522 | 523 | ||
523 | desc->txd.flags = flags; | 524 | desc->txd.flags = flags; |
524 | desc->len = total_len; | 525 | desc->len = total_len; |
525 | list_splice(&chain, &desc->txd.tx_list); | 526 | list_splice(&chain, &desc->tx_list); |
526 | hw->ctl_f.int_en = !!(flags & DMA_PREP_INTERRUPT); | 527 | hw->ctl_f.int_en = !!(flags & DMA_PREP_INTERRUPT); |
527 | hw->ctl_f.compl_write = 1; | 528 | hw->ctl_f.compl_write = 1; |
528 | hw->tx_cnt = tx_cnt; | 529 | hw->tx_cnt = tx_cnt; |