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authorIra Snyder <iws@ovro.caltech.edu>2010-01-06 08:34:01 -0500
committerDan Williams <dan.j.williams@intel.com>2010-02-02 16:51:41 -0500
commita4f56d4b103d4e5d1a59a9118db0185a6bd1a83b (patch)
treeaa00d6faf06d168e57c090f1eb05b16596b9a299 /drivers/dma/fsldma.h
parent4ce0e953f6286777452bf07c83056342d6b9b257 (diff)
fsldma: rename struct fsl_dma_chan to struct fsldma_chan
This is the beginning of a cleanup which will change all instances of "fsl_dma" to "fsldma" to match the name of the driver itself. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/fsldma.h')
-rw-r--r--drivers/dma/fsldma.h26
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index dbb5b5cce4c2..f8c2baa6f41e 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -94,7 +94,7 @@ struct fsl_desc_sw {
94 struct dma_async_tx_descriptor async_tx; 94 struct dma_async_tx_descriptor async_tx;
95} __attribute__((aligned(32))); 95} __attribute__((aligned(32)));
96 96
97struct fsl_dma_chan_regs { 97struct fsldma_chan_regs {
98 u32 mr; /* 0x00 - Mode Register */ 98 u32 mr; /* 0x00 - Mode Register */
99 u32 sr; /* 0x04 - Status Register */ 99 u32 sr; /* 0x04 - Status Register */
100 u64 cdar; /* 0x08 - Current descriptor address register */ 100 u64 cdar; /* 0x08 - Current descriptor address register */
@@ -104,19 +104,19 @@ struct fsl_dma_chan_regs {
104 u64 ndar; /* 0x24 - Next Descriptor Address Register */ 104 u64 ndar; /* 0x24 - Next Descriptor Address Register */
105}; 105};
106 106
107struct fsl_dma_chan; 107struct fsldma_chan;
108#define FSL_DMA_MAX_CHANS_PER_DEVICE 4 108#define FSL_DMA_MAX_CHANS_PER_DEVICE 4
109 109
110struct fsl_dma_device { 110struct fsldma_device {
111 void __iomem *reg_base; /* DGSR register base */ 111 void __iomem *reg_base; /* DGSR register base */
112 struct device *dev; 112 struct device *dev;
113 struct dma_device common; 113 struct dma_device common;
114 struct fsl_dma_chan *chan[FSL_DMA_MAX_CHANS_PER_DEVICE]; 114 struct fsldma_chan *chan[FSL_DMA_MAX_CHANS_PER_DEVICE];
115 u32 feature; /* The same as DMA channels */ 115 u32 feature; /* The same as DMA channels */
116 int irq; /* Channel IRQ */ 116 int irq; /* Channel IRQ */
117}; 117};
118 118
119/* Define macros for fsl_dma_chan->feature property */ 119/* Define macros for fsldma_chan->feature property */
120#define FSL_DMA_LITTLE_ENDIAN 0x00000000 120#define FSL_DMA_LITTLE_ENDIAN 0x00000000
121#define FSL_DMA_BIG_ENDIAN 0x00000001 121#define FSL_DMA_BIG_ENDIAN 0x00000001
122 122
@@ -127,8 +127,8 @@ struct fsl_dma_device {
127#define FSL_DMA_CHAN_PAUSE_EXT 0x00001000 127#define FSL_DMA_CHAN_PAUSE_EXT 0x00001000
128#define FSL_DMA_CHAN_START_EXT 0x00002000 128#define FSL_DMA_CHAN_START_EXT 0x00002000
129 129
130struct fsl_dma_chan { 130struct fsldma_chan {
131 struct fsl_dma_chan_regs __iomem *reg_base; 131 struct fsldma_chan_regs __iomem *reg_base;
132 dma_cookie_t completed_cookie; /* The maximum cookie completed */ 132 dma_cookie_t completed_cookie; /* The maximum cookie completed */
133 spinlock_t desc_lock; /* Descriptor operation lock */ 133 spinlock_t desc_lock; /* Descriptor operation lock */
134 struct list_head ld_queue; /* Link descriptors queue */ 134 struct list_head ld_queue; /* Link descriptors queue */
@@ -140,14 +140,14 @@ struct fsl_dma_chan {
140 struct tasklet_struct tasklet; 140 struct tasklet_struct tasklet;
141 u32 feature; 141 u32 feature;
142 142
143 void (*toggle_ext_pause)(struct fsl_dma_chan *fsl_chan, int enable); 143 void (*toggle_ext_pause)(struct fsldma_chan *fsl_chan, int enable);
144 void (*toggle_ext_start)(struct fsl_dma_chan *fsl_chan, int enable); 144 void (*toggle_ext_start)(struct fsldma_chan *fsl_chan, int enable);
145 void (*set_src_loop_size)(struct fsl_dma_chan *fsl_chan, int size); 145 void (*set_src_loop_size)(struct fsldma_chan *fsl_chan, int size);
146 void (*set_dest_loop_size)(struct fsl_dma_chan *fsl_chan, int size); 146 void (*set_dest_loop_size)(struct fsldma_chan *fsl_chan, int size);
147 void (*set_request_count)(struct fsl_dma_chan *fsl_chan, int size); 147 void (*set_request_count)(struct fsldma_chan *fsl_chan, int size);
148}; 148};
149 149
150#define to_fsl_chan(chan) container_of(chan, struct fsl_dma_chan, common) 150#define to_fsl_chan(chan) container_of(chan, struct fsldma_chan, common)
151#define to_fsl_desc(lh) container_of(lh, struct fsl_desc_sw, node) 151#define to_fsl_desc(lh) container_of(lh, struct fsl_desc_sw, node)
152#define tx_to_fsl_desc(tx) container_of(tx, struct fsl_desc_sw, async_tx) 152#define tx_to_fsl_desc(tx) container_of(tx, struct fsl_desc_sw, async_tx)
153 153