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authorDan Williams <dan.j.williams@intel.com>2009-09-08 20:55:21 -0400
committerDan Williams <dan.j.williams@intel.com>2009-09-08 20:55:21 -0400
commitbbb20089a3275a19e475dbc21320c3742e3ca423 (patch)
tree216fdc1cbef450ca688135c5b8969169482d9a48 /drivers/dma/dmatest.c
parent3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff)
parent657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff)
Merge branch 'dmaengine' into async-tx-next
Conflicts: crypto/async_tx/async_xor.c drivers/dma/ioat/dma_v2.h drivers/dma/ioat/pci.c drivers/md/raid5.c
Diffstat (limited to 'drivers/dma/dmatest.c')
-rw-r--r--drivers/dma/dmatest.c21
1 files changed, 17 insertions, 4 deletions
diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c
index a3722a7384b5..a32a4cf7b1e0 100644
--- a/drivers/dma/dmatest.c
+++ b/drivers/dma/dmatest.c
@@ -38,6 +38,11 @@ module_param(max_channels, uint, S_IRUGO);
38MODULE_PARM_DESC(max_channels, 38MODULE_PARM_DESC(max_channels,
39 "Maximum number of channels to use (default: all)"); 39 "Maximum number of channels to use (default: all)");
40 40
41static unsigned int iterations;
42module_param(iterations, uint, S_IRUGO);
43MODULE_PARM_DESC(iterations,
44 "Iterations before stopping test (default: infinite)");
45
41static unsigned int xor_sources = 3; 46static unsigned int xor_sources = 3;
42module_param(xor_sources, uint, S_IRUGO); 47module_param(xor_sources, uint, S_IRUGO);
43MODULE_PARM_DESC(xor_sources, 48MODULE_PARM_DESC(xor_sources,
@@ -119,7 +124,7 @@ static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
119 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); 124 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
120 for ( ; i < start + len; i++) 125 for ( ; i < start + len; i++)
121 buf[i] = PATTERN_SRC | PATTERN_COPY 126 buf[i] = PATTERN_SRC | PATTERN_COPY
122 | (~i & PATTERN_COUNT_MASK);; 127 | (~i & PATTERN_COUNT_MASK);
123 for ( ; i < test_buf_size; i++) 128 for ( ; i < test_buf_size; i++)
124 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); 129 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
125 buf++; 130 buf++;
@@ -281,7 +286,8 @@ static int dmatest_func(void *data)
281 286
282 flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT; 287 flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
283 288
284 while (!kthread_should_stop()) { 289 while (!kthread_should_stop()
290 && !(iterations && total_tests >= iterations)) {
285 struct dma_device *dev = chan->device; 291 struct dma_device *dev = chan->device;
286 struct dma_async_tx_descriptor *tx = NULL; 292 struct dma_async_tx_descriptor *tx = NULL;
287 dma_addr_t dma_srcs[src_cnt]; 293 dma_addr_t dma_srcs[src_cnt];
@@ -450,6 +456,13 @@ err_srcbuf:
450err_srcs: 456err_srcs:
451 pr_notice("%s: terminating after %u tests, %u failures (status %d)\n", 457 pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
452 thread_name, total_tests, failed_tests, ret); 458 thread_name, total_tests, failed_tests, ret);
459
460 if (iterations > 0)
461 while (!kthread_should_stop()) {
462 DECLARE_WAIT_QUEUE_HEAD(wait_dmatest_exit);
463 interruptible_sleep_on(&wait_dmatest_exit);
464 }
465
453 return ret; 466 return ret;
454} 467}
455 468
@@ -531,11 +544,11 @@ static int dmatest_add_channel(struct dma_chan *chan)
531 544
532 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { 545 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
533 cnt = dmatest_add_threads(dtc, DMA_MEMCPY); 546 cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
534 thread_count += cnt > 0 ?: 0; 547 thread_count += cnt > 0 ? cnt : 0;
535 } 548 }
536 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) { 549 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
537 cnt = dmatest_add_threads(dtc, DMA_XOR); 550 cnt = dmatest_add_threads(dtc, DMA_XOR);
538 thread_count += cnt > 0 ?: 0; 551 thread_count += cnt > 0 ? cnt : 0;
539 } 552 }
540 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) { 553 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
541 cnt = dmatest_add_threads(dtc, DMA_PQ); 554 cnt = dmatest_add_threads(dtc, DMA_PQ);