Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6 into common/serial-rework

Conflicts:
	arch/sh/kernel/cpu/sh2/setup-sh7619.c
	arch/sh/kernel/cpu/sh2a/setup-mxg.c
	arch/sh/kernel/cpu/sh2a/setup-sh7201.c
	arch/sh/kernel/cpu/sh2a/setup-sh7203.c
	arch/sh/kernel/cpu/sh2a/setup-sh7206.c
	arch/sh/kernel/cpu/sh3/setup-sh7705.c
	arch/sh/kernel/cpu/sh3/setup-sh770x.c
	arch/sh/kernel/cpu/sh3/setup-sh7710.c
	arch/sh/kernel/cpu/sh3/setup-sh7720.c
	arch/sh/kernel/cpu/sh4/setup-sh4-202.c
	arch/sh/kernel/cpu/sh4/setup-sh7750.c
	arch/sh/kernel/cpu/sh4/setup-sh7760.c
	arch/sh/kernel/cpu/sh4a/setup-sh7343.c
	arch/sh/kernel/cpu/sh4a/setup-sh7366.c
	arch/sh/kernel/cpu/sh4a/setup-sh7722.c
	arch/sh/kernel/cpu/sh4a/setup-sh7723.c
	arch/sh/kernel/cpu/sh4a/setup-sh7724.c
	arch/sh/kernel/cpu/sh4a/setup-sh7763.c
	arch/sh/kernel/cpu/sh4a/setup-sh7770.c
	arch/sh/kernel/cpu/sh4a/setup-sh7780.c
	arch/sh/kernel/cpu/sh4a/setup-sh7785.c
	arch/sh/kernel/cpu/sh4a/setup-sh7786.c
	arch/sh/kernel/cpu/sh4a/setup-shx3.c
	arch/sh/kernel/cpu/sh5/setup-sh5.c
	drivers/serial/sh-sci.c
	drivers/serial/sh-sci.h
	include/linux/serial_sci.h

1 files changed, 97 insertions, 73 deletions

diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 5a87384ea4ff..8bcb15fb959d 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -58,6 +58,7 @@
 #include <linux/jiffies.h>
 #include <linux/rculist.h>
 #include <linux/idr.h>
+#include <linux/slab.h>
 
 static DEFINE_MUTEX(dma_list_mutex);
 static LIST_HEAD(dma_device_list);
@@ -284,7 +285,7 @@ struct dma_chan_tbl_ent {
 /**
  * channel_table - percpu lookup table for memory-to-memory offload providers
  */
-static struct dma_chan_tbl_ent *channel_table[DMA_TX_TYPE_END];
+static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
 
 static int __init dma_channel_table_init(void)
 {
@@ -326,14 +327,7 @@ arch_initcall(dma_channel_table_init);
  */
 struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
 {
-        struct dma_chan *chan;
-        int cpu;
-
-        cpu = get_cpu();
-        chan = per_cpu_ptr(channel_table[tx_type], cpu)->chan;
-        put_cpu();
-
-        return chan;
+        return this_cpu_read(channel_table[tx_type]->chan);
 }
 EXPORT_SYMBOL(dma_find_channel);
 
@@ -521,7 +515,6 @@ struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, v
                                 break;
                         if (--device->privatecnt == 0)
                                 dma_cap_clear(DMA_PRIVATE, device->cap_mask);
-                        chan->private = NULL;
                         chan = NULL;
                 }
         }
@@ -543,7 +536,6 @@ void dma_release_channel(struct dma_chan *chan)
         /* drop PRIVATE cap enabled by __dma_request_channel() */
         if (--chan->device->privatecnt == 0)
                 dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
-        chan->private = NULL;
         mutex_unlock(&dma_list_mutex);
 }
 EXPORT_SYMBOL_GPL(dma_release_channel);
@@ -608,6 +600,50 @@ void dmaengine_put(void)
 }
 EXPORT_SYMBOL(dmaengine_put);
 
+static bool device_has_all_tx_types(struct dma_device *device)
+{
+        /* A device that satisfies this test has channels that will never cause
+         * an async_tx channel switch event as all possible operation types can
+         * be handled.
+         */
+        #ifdef CONFIG_ASYNC_TX_DMA
+        if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
+                return false;
+        #endif
+
+        #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE)
+        if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
+                return false;
+        #endif
+
+        #if defined(CONFIG_ASYNC_MEMSET) || defined(CONFIG_ASYNC_MEMSET_MODULE)
+        if (!dma_has_cap(DMA_MEMSET, device->cap_mask))
+                return false;
+        #endif
+
+        #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE)
+        if (!dma_has_cap(DMA_XOR, device->cap_mask))
+                return false;
+
+        #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
+        if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
+                return false;
+        #endif
+        #endif
+
+        #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE)
+        if (!dma_has_cap(DMA_PQ, device->cap_mask))
+                return false;
+
+        #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
+        if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
+                return false;
+        #endif
+        #endif
+
+        return true;
+}
+
 static int get_dma_id(struct dma_device *device)
 {
         int rc;
@@ -644,23 +680,37 @@ int dma_async_device_register(struct dma_device *device)
                 !device->device_prep_dma_memcpy);
         BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) &&
                 !device->device_prep_dma_xor);
-        BUG_ON(dma_has_cap(DMA_ZERO_SUM, device->cap_mask) &&
-                !device->device_prep_dma_zero_sum);
+        BUG_ON(dma_has_cap(DMA_XOR_VAL, device->cap_mask) &&
+                !device->device_prep_dma_xor_val);
+        BUG_ON(dma_has_cap(DMA_PQ, device->cap_mask) &&
+                !device->device_prep_dma_pq);
+        BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) &&
+                !device->device_prep_dma_pq_val);
         BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) &&
                 !device->device_prep_dma_memset);
         BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
                 !device->device_prep_dma_interrupt);
+        BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) &&
+                !device->device_prep_dma_sg);
         BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
                 !device->device_prep_slave_sg);
+        BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) &&
+                !device->device_prep_dma_cyclic);
         BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
-                !device->device_terminate_all);
+                !device->device_control);
 
         BUG_ON(!device->device_alloc_chan_resources);
         BUG_ON(!device->device_free_chan_resources);
-        BUG_ON(!device->device_is_tx_complete);
+        BUG_ON(!device->device_tx_status);
         BUG_ON(!device->device_issue_pending);
         BUG_ON(!device->dev);
 
+        /* note: this only matters in the
+         * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
+         */
+        if (device_has_all_tx_types(device))
+                dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
+
         idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
         if (!idr_ref)
                 return -ENOMEM;
@@ -779,6 +829,7 @@ void dma_async_device_unregister(struct dma_device *device)
                 chan->dev->chan = NULL;
                 mutex_unlock(&dma_list_mutex);
                 device_unregister(&chan->dev->device);
+                free_percpu(chan->local);
         }
 }
 EXPORT_SYMBOL(dma_async_device_unregister);
@@ -803,7 +854,6 @@ dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
         struct dma_async_tx_descriptor *tx;
         dma_addr_t dma_dest, dma_src;
         dma_cookie_t cookie;
-        int cpu;
         unsigned long flags;
 
         dma_src = dma_map_single(dev->dev, src, len, DMA_TO_DEVICE);
@@ -822,10 +872,10 @@ dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
         tx->callback = NULL;
         cookie = tx->tx_submit(tx);
 
-        cpu = get_cpu();
-        per_cpu_ptr(chan->local, cpu)->bytes_transferred += len;
-        per_cpu_ptr(chan->local, cpu)->memcpy_count++;
-        put_cpu();
+        preempt_disable();
+        __this_cpu_add(chan->local->bytes_transferred, len);
+        __this_cpu_inc(chan->local->memcpy_count);
+        preempt_enable();
 
         return cookie;
 }
@@ -852,7 +902,6 @@ dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
         struct dma_async_tx_descriptor *tx;
         dma_addr_t dma_dest, dma_src;
         dma_cookie_t cookie;
-        int cpu;
         unsigned long flags;
 
         dma_src = dma_map_single(dev->dev, kdata, len, DMA_TO_DEVICE);
@@ -869,10 +918,10 @@ dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
         tx->callback = NULL;
         cookie = tx->tx_submit(tx);
 
-        cpu = get_cpu();
-        per_cpu_ptr(chan->local, cpu)->bytes_transferred += len;
-        per_cpu_ptr(chan->local, cpu)->memcpy_count++;
-        put_cpu();
+        preempt_disable();
+        __this_cpu_add(chan->local->bytes_transferred, len);
+        __this_cpu_inc(chan->local->memcpy_count);
+        preempt_enable();
 
         return cookie;
 }
@@ -901,7 +950,6 @@ dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
         struct dma_async_tx_descriptor *tx;
         dma_addr_t dma_dest, dma_src;
         dma_cookie_t cookie;
-        int cpu;
         unsigned long flags;
 
         dma_src = dma_map_page(dev->dev, src_pg, src_off, len, DMA_TO_DEVICE);
@@ -919,10 +967,10 @@ dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
         tx->callback = NULL;
         cookie = tx->tx_submit(tx);
 
-        cpu = get_cpu();
-        per_cpu_ptr(chan->local, cpu)->bytes_transferred += len;
-        per_cpu_ptr(chan->local, cpu)->memcpy_count++;
-        put_cpu();
+        preempt_disable();
+        __this_cpu_add(chan->local->bytes_transferred, len);
+        __this_cpu_inc(chan->local->memcpy_count);
+        preempt_enable();
 
         return cookie;
 }
@@ -932,56 +980,32 @@ void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
         struct dma_chan *chan)
 {
         tx->chan = chan;
+        #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
         spin_lock_init(&tx->lock);
-        INIT_LIST_HEAD(&tx->tx_list);
+        #endif
 }
 EXPORT_SYMBOL(dma_async_tx_descriptor_init);
 
 /* dma_wait_for_async_tx - spin wait for a transaction to complete
  * @tx: in-flight transaction to wait on
- *
- * This routine assumes that tx was obtained from a call to async_memcpy,
- * async_xor, async_memset, etc which ensures that tx is "in-flight" (prepped
- * and submitted).  Walking the parent chain is only meant to cover for DMA
- * drivers that do not implement the DMA_INTERRUPT capability and may race with
- * the driver's descriptor cleanup routine.
  */
 enum dma_status
 dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
 {
-        enum dma_status status;
-        struct dma_async_tx_descriptor *iter;
-        struct dma_async_tx_descriptor *parent;
+        unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
 
         if (!tx)
                 return DMA_SUCCESS;
 
-        WARN_ONCE(tx->parent, "%s: speculatively walking dependency chain for"
-                  " %s\n", __func__, dma_chan_name(tx->chan));
-
-        /* poll through the dependency chain, return when tx is complete */
-        do {
-                iter = tx;
-
-                /* find the root of the unsubmitted dependency chain */
-                do {
-                        parent = iter->parent;
-                        if (!parent)
-                                break;
-                        else
-                                iter = parent;
-                } while (parent);
-
-                /* there is a small window for ->parent == NULL and
-                 * ->cookie == -EBUSY
-                 */
-                while (iter->cookie == -EBUSY)
-                        cpu_relax();
-
-                status = dma_sync_wait(iter->chan, iter->cookie);
-        } while (status == DMA_IN_PROGRESS || (iter != tx));
-
-        return status;
+        while (tx->cookie == -EBUSY) {
+                if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
+                        pr_err("%s timeout waiting for descriptor submission\n",
+                                __func__);
+                        return DMA_ERROR;
+                }
+                cpu_relax();
+        }
+        return dma_sync_wait(tx->chan, tx->cookie);
 }
 EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
 
@@ -991,7 +1015,7 @@ EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
  */
 void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
 {
-        struct dma_async_tx_descriptor *dep = tx->next;
+        struct dma_async_tx_descriptor *dep = txd_next(tx);
         struct dma_async_tx_descriptor *dep_next;
         struct dma_chan *chan;
 
@@ -999,7 +1023,7 @@ void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
                 return;
 
         /* we'll submit tx->next now, so clear the link */
-        tx->next = NULL;
+        txd_clear_next(tx);
         chan = dep->chan;
 
         /* keep submitting up until a channel switch is detected
@@ -1007,14 +1031,14 @@ void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
          * processing the interrupt from async_tx_channel_switch
          */
         for (; dep; dep = dep_next) {
-                spin_lock_bh(&dep->lock);
-                dep->parent = NULL;
-                dep_next = dep->next;
+                txd_lock(dep);
+                txd_clear_parent(dep);
+                dep_next = txd_next(dep);
                 if (dep_next && dep_next->chan == chan)
-                        dep->next = NULL; /* ->next will be submitted */
+                        txd_clear_next(dep); /* ->next will be submitted */
                 else
                         dep_next = NULL; /* submit current dep and terminate */
-                spin_unlock_bh(&dep->lock);
+                txd_unlock(dep);
 
                 dep->tx_submit(dep);
         }