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authorVinod Koul <vinod.koul@linux.intel.com>2011-10-13 13:04:23 -0400
committerVinod Koul <vinod.koul@linux.intel.com>2011-10-27 11:23:43 -0400
commitdb8196df4bb6f117caa163aa73b0f16fd62290bd (patch)
treeb86531031482037d9b31ad57479f2f7091020957 /drivers/dma/coh901318.c
parent49920bc66984a512f4bcc7735a61642cd0e4d6f2 (diff)
dmaengine: move drivers to dma_transfer_direction
fixup usage of dma direction by introducing dma_transfer_direction, this patch moves dma/drivers/* to use new enum Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Cc: H Hartley Sweeten <hartleys@visionengravers.com> Cc: Li Yang <leoli@freescale.com> Cc: Zhang Wei <zw@zh-kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Yong Wang <yong.y.wang@intel.com> Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com> Cc: Boojin Kim <boojin.kim@samsung.com> Cc: Barry Song <Baohua.Song@csr.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Diffstat (limited to 'drivers/dma/coh901318.c')
-rw-r--r--drivers/dma/coh901318.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index 4234f416ef11..d65a718c0f9b 100644
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -39,7 +39,7 @@ struct coh901318_desc {
39 struct scatterlist *sg; 39 struct scatterlist *sg;
40 unsigned int sg_len; 40 unsigned int sg_len;
41 struct coh901318_lli *lli; 41 struct coh901318_lli *lli;
42 enum dma_data_direction dir; 42 enum dma_transfer_direction dir;
43 unsigned long flags; 43 unsigned long flags;
44 u32 head_config; 44 u32 head_config;
45 u32 head_ctrl; 45 u32 head_ctrl;
@@ -1034,7 +1034,7 @@ coh901318_prep_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
1034 1034
1035static struct dma_async_tx_descriptor * 1035static struct dma_async_tx_descriptor *
1036coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, 1036coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
1037 unsigned int sg_len, enum dma_data_direction direction, 1037 unsigned int sg_len, enum dma_transfer_direction direction,
1038 unsigned long flags) 1038 unsigned long flags)
1039{ 1039{
1040 struct coh901318_chan *cohc = to_coh901318_chan(chan); 1040 struct coh901318_chan *cohc = to_coh901318_chan(chan);
@@ -1077,7 +1077,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
1077 ctrl_last |= cohc->runtime_ctrl; 1077 ctrl_last |= cohc->runtime_ctrl;
1078 ctrl |= cohc->runtime_ctrl; 1078 ctrl |= cohc->runtime_ctrl;
1079 1079
1080 if (direction == DMA_TO_DEVICE) { 1080 if (direction == DMA_MEM_TO_DEV) {
1081 u32 tx_flags = COH901318_CX_CTRL_PRDD_SOURCE | 1081 u32 tx_flags = COH901318_CX_CTRL_PRDD_SOURCE |
1082 COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE; 1082 COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE;
1083 1083
@@ -1085,7 +1085,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
1085 ctrl_chained |= tx_flags; 1085 ctrl_chained |= tx_flags;
1086 ctrl_last |= tx_flags; 1086 ctrl_last |= tx_flags;
1087 ctrl |= tx_flags; 1087 ctrl |= tx_flags;
1088 } else if (direction == DMA_FROM_DEVICE) { 1088 } else if (direction == DMA_DEV_TO_MEM) {
1089 u32 rx_flags = COH901318_CX_CTRL_PRDD_DEST | 1089 u32 rx_flags = COH901318_CX_CTRL_PRDD_DEST |
1090 COH901318_CX_CTRL_DST_ADDR_INC_ENABLE; 1090 COH901318_CX_CTRL_DST_ADDR_INC_ENABLE;
1091 1091
@@ -1274,11 +1274,11 @@ static void coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
1274 int i = 0; 1274 int i = 0;
1275 1275
1276 /* We only support mem to per or per to mem transfers */ 1276 /* We only support mem to per or per to mem transfers */
1277 if (config->direction == DMA_FROM_DEVICE) { 1277 if (config->direction == DMA_DEV_TO_MEM) {
1278 addr = config->src_addr; 1278 addr = config->src_addr;
1279 addr_width = config->src_addr_width; 1279 addr_width = config->src_addr_width;
1280 maxburst = config->src_maxburst; 1280 maxburst = config->src_maxburst;
1281 } else if (config->direction == DMA_TO_DEVICE) { 1281 } else if (config->direction == DMA_MEM_TO_DEV) {
1282 addr = config->dst_addr; 1282 addr = config->dst_addr;
1283 addr_width = config->dst_addr_width; 1283 addr_width = config->dst_addr_width;
1284 maxburst = config->dst_maxburst; 1284 maxburst = config->dst_maxburst;