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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-05-16 06:33:31 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-07-01 09:15:47 -0400
commit800d683e6b8f0ba630470a56b61ff6742ad129ad (patch)
treed99a4be8cd9ad1f423293771507acb6a6c80a95b /drivers/dma/amba-pl08x.c
parent9862ba17b7b6866cbee90547ff1f58d055c13f97 (diff)
dmaengine: PL08x: ignore 'direction' argument in dma_slave_config
Ignore the direction argument in dma_slave_config, and configure both directions independently. We still check that the configuration for the intended direction is valid; this check will eventually be dropped. This check is just for debugging at present. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/dma/amba-pl08x.c')
-rw-r--r--drivers/dma/amba-pl08x.c56
1 files changed, 18 insertions, 38 deletions
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index fde801f787cd..50b9a839e9c3 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -218,8 +218,6 @@ enum pl08x_dma_chan_state {
218 * @name: name of channel 218 * @name: name of channel
219 * @cd: channel platform data 219 * @cd: channel platform data
220 * @runtime_addr: address for RX/TX according to the runtime config 220 * @runtime_addr: address for RX/TX according to the runtime config
221 * @runtime_direction: current direction of this channel according to
222 * runtime config
223 * @pend_list: queued transactions pending on this channel 221 * @pend_list: queued transactions pending on this channel
224 * @at: active transaction on this channel 222 * @at: active transaction on this channel
225 * @lock: a lock for this channel data 223 * @lock: a lock for this channel data
@@ -239,7 +237,6 @@ struct pl08x_dma_chan {
239 struct dma_slave_config cfg; 237 struct dma_slave_config cfg;
240 u32 src_cctl; 238 u32 src_cctl;
241 u32 dst_cctl; 239 u32 dst_cctl;
242 enum dma_transfer_direction runtime_direction;
243 struct list_head pend_list; 240 struct list_head pend_list;
244 struct pl08x_txd *at; 241 struct pl08x_txd *at;
245 spinlock_t lock; 242 spinlock_t lock;
@@ -1239,50 +1236,31 @@ static int dma_set_runtime_config(struct dma_chan *chan,
1239{ 1236{
1240 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); 1237 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1241 struct pl08x_driver_data *pl08x = plchan->host; 1238 struct pl08x_driver_data *pl08x = plchan->host;
1242 enum dma_slave_buswidth addr_width; 1239 u32 src_cctl, dst_cctl;
1243 u32 maxburst, cctl = 0;
1244 1240
1245 if (!plchan->slave) 1241 if (!plchan->slave)
1246 return -EINVAL; 1242 return -EINVAL;
1247 1243
1248 /* Transfer direction */ 1244 dst_cctl = pl08x_get_cctl(plchan, config->dst_addr_width,
1249 plchan->runtime_direction = config->direction; 1245 config->dst_maxburst);
1250 if (config->direction == DMA_MEM_TO_DEV) { 1246 if (dst_cctl == ~0 && config->direction == DMA_MEM_TO_DEV) {
1251 addr_width = config->dst_addr_width;
1252 maxburst = config->dst_maxburst;
1253 } else if (config->direction == DMA_DEV_TO_MEM) {
1254 addr_width = config->src_addr_width;
1255 maxburst = config->src_maxburst;
1256 } else {
1257 dev_err(&pl08x->adev->dev, 1247 dev_err(&pl08x->adev->dev,
1258 "bad runtime_config: alien transfer direction\n"); 1248 "bad runtime_config: alien address width (M2D)\n");
1259 return -EINVAL; 1249 return -EINVAL;
1260 } 1250 }
1261 1251
1262 cctl = pl08x_get_cctl(plchan, addr_width, maxburst); 1252 src_cctl = pl08x_get_cctl(plchan, config->src_addr_width,
1263 if (cctl == ~0) { 1253 config->src_maxburst);
1254 if (src_cctl == ~0 && config->direction == DMA_DEV_TO_MEM) {
1264 dev_err(&pl08x->adev->dev, 1255 dev_err(&pl08x->adev->dev,
1265 "bad runtime_config: alien address width\n"); 1256 "bad runtime_config: alien address width (D2M)\n");
1266 return -EINVAL; 1257 return -EINVAL;
1267 } 1258 }
1268 1259
1260 plchan->dst_cctl = dst_cctl;
1261 plchan->src_cctl = src_cctl;
1269 plchan->cfg = *config; 1262 plchan->cfg = *config;
1270 1263
1271 if (plchan->runtime_direction == DMA_DEV_TO_MEM) {
1272 plchan->src_cctl = cctl;
1273 } else {
1274 plchan->dst_cctl = cctl;
1275 }
1276
1277 dev_dbg(&pl08x->adev->dev,
1278 "configured channel %s (%s) for %s, data width %d, "
1279 "maxburst %d words, LE, CCTL=0x%08x\n",
1280 dma_chan_name(chan), plchan->name,
1281 (config->direction == DMA_DEV_TO_MEM) ? "RX" : "TX",
1282 addr_width,
1283 maxburst,
1284 cctl);
1285
1286 return 0; 1264 return 0;
1287} 1265}
1288 1266
@@ -1470,11 +1448,6 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
1470 return NULL; 1448 return NULL;
1471 } 1449 }
1472 1450
1473 if (direction != plchan->runtime_direction)
1474 dev_err(&pl08x->adev->dev, "%s DMA setup does not match "
1475 "the direction configured for the PrimeCell\n",
1476 __func__);
1477
1478 /* 1451 /*
1479 * Set up addresses, the PrimeCell configured address 1452 * Set up addresses, the PrimeCell configured address
1480 * will take precedence since this may configure the 1453 * will take precedence since this may configure the
@@ -1499,6 +1472,13 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
1499 return NULL; 1472 return NULL;
1500 } 1473 }
1501 1474
1475 if (cctl == ~0) {
1476 pl08x_free_txd(pl08x, txd);
1477 dev_err(&pl08x->adev->dev,
1478 "DMA slave configuration botched?\n");
1479 return NULL;
1480 }
1481
1502 txd->cctl = cctl | pl08x_select_bus(src_buses, dst_buses); 1482 txd->cctl = cctl | pl08x_select_bus(src_buses, dst_buses);
1503 1483
1504 if (plchan->cfg.device_fc) 1484 if (plchan->cfg.device_fc)