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authorStanimir Varbanov <svarbanov@mm-sol.com>2014-07-04 10:03:29 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2014-07-08 09:18:21 -0400
commit58a6535f1a830f55076b82063dc83dc2a9fadf23 (patch)
treec6ddbdcda3b363f1d8aaad05d66f0076c5285af1 /drivers/crypto
parent178f827a60becdcff67df61cc9f0200fcce93f6c (diff)
crypto: qce - fix sparse warnings
Fix few sparse warnings of type: - sparse: incorrect type in argument - sparse: incorrect type in initializer Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/qce/common.c15
-rw-r--r--drivers/crypto/qce/common.h2
-rw-r--r--drivers/crypto/qce/sha.c20
3 files changed, 20 insertions, 17 deletions
diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c
index 1cd4d5ea8114..1fb5fde7fc03 100644
--- a/drivers/crypto/qce/common.c
+++ b/drivers/crypto/qce/common.c
@@ -201,7 +201,8 @@ static void qce_xtskey(struct qce_device *qce, const u8 *enckey,
201 unsigned int xtsklen = enckeylen / (2 * sizeof(u32)); 201 unsigned int xtsklen = enckeylen / (2 * sizeof(u32));
202 unsigned int xtsdusize; 202 unsigned int xtsdusize;
203 203
204 qce_cpu_to_be32p_array(xtskey, enckey + enckeylen / 2, enckeylen / 2); 204 qce_cpu_to_be32p_array((__be32 *)xtskey, enckey + enckeylen / 2,
205 enckeylen / 2);
205 qce_write_array(qce, REG_ENCR_XTS_KEY0, xtskey, xtsklen); 206 qce_write_array(qce, REG_ENCR_XTS_KEY0, xtskey, xtsklen);
206 207
207 /* xts du size 512B */ 208 /* xts du size 512B */
@@ -262,7 +263,8 @@ static int qce_setup_regs_ahash(struct crypto_async_request *async_req,
262 u32 authkey_words = rctx->authklen / sizeof(u32); 263 u32 authkey_words = rctx->authklen / sizeof(u32);
263 264
264 qce_cpu_to_be32p_array(mackey, rctx->authkey, rctx->authklen); 265 qce_cpu_to_be32p_array(mackey, rctx->authkey, rctx->authklen);
265 qce_write_array(qce, REG_AUTH_KEY0, mackey, authkey_words); 266 qce_write_array(qce, REG_AUTH_KEY0, (u32 *)mackey,
267 authkey_words);
266 } 268 }
267 269
268 if (IS_CMAC(rctx->flags)) 270 if (IS_CMAC(rctx->flags))
@@ -274,12 +276,13 @@ static int qce_setup_regs_ahash(struct crypto_async_request *async_req,
274 qce_cpu_to_be32p_array(auth, rctx->digest, digestsize); 276 qce_cpu_to_be32p_array(auth, rctx->digest, digestsize);
275 277
276 iv_words = (IS_SHA1(rctx->flags) || IS_SHA1_HMAC(rctx->flags)) ? 5 : 8; 278 iv_words = (IS_SHA1(rctx->flags) || IS_SHA1_HMAC(rctx->flags)) ? 5 : 8;
277 qce_write_array(qce, REG_AUTH_IV0, auth, iv_words); 279 qce_write_array(qce, REG_AUTH_IV0, (u32 *)auth, iv_words);
278 280
279 if (rctx->first_blk) 281 if (rctx->first_blk)
280 qce_clear_array(qce, REG_AUTH_BYTECNT0, 4); 282 qce_clear_array(qce, REG_AUTH_BYTECNT0, 4);
281 else 283 else
282 qce_write_array(qce, REG_AUTH_BYTECNT0, rctx->byte_count, 2); 284 qce_write_array(qce, REG_AUTH_BYTECNT0,
285 (u32 *)rctx->byte_count, 2);
283 286
284 auth_cfg = qce_auth_cfg(rctx->flags, 0); 287 auth_cfg = qce_auth_cfg(rctx->flags, 0);
285 288
@@ -354,7 +357,7 @@ static int qce_setup_regs_ablkcipher(struct crypto_async_request *async_req,
354 return -EINVAL; 357 return -EINVAL;
355 } 358 }
356 359
357 qce_write_array(qce, REG_ENCR_KEY0, enckey, enckey_words); 360 qce_write_array(qce, REG_ENCR_KEY0, (u32 *)enckey, enckey_words);
358 361
359 if (!IS_ECB(flags)) { 362 if (!IS_ECB(flags)) {
360 if (IS_XTS(flags)) 363 if (IS_XTS(flags))
@@ -362,7 +365,7 @@ static int qce_setup_regs_ablkcipher(struct crypto_async_request *async_req,
362 else 365 else
363 qce_cpu_to_be32p_array(enciv, rctx->iv, ivsize); 366 qce_cpu_to_be32p_array(enciv, rctx->iv, ivsize);
364 367
365 qce_write_array(qce, REG_CNTR0_IV0, enciv, enciv_words); 368 qce_write_array(qce, REG_CNTR0_IV0, (u32 *)enciv, enciv_words);
366 } 369 }
367 370
368 if (IS_ENCRYPT(flags)) 371 if (IS_ENCRYPT(flags))
diff --git a/drivers/crypto/qce/common.h b/drivers/crypto/qce/common.h
index 411b1fc97216..a4addd4f7d6c 100644
--- a/drivers/crypto/qce/common.h
+++ b/drivers/crypto/qce/common.h
@@ -85,7 +85,7 @@ struct qce_alg_template {
85 struct list_head entry; 85 struct list_head entry;
86 u32 crypto_alg_type; 86 u32 crypto_alg_type;
87 unsigned long alg_flags; 87 unsigned long alg_flags;
88 const __be32 *std_iv; 88 const u32 *std_iv;
89 union { 89 union {
90 struct crypto_alg crypto; 90 struct crypto_alg crypto;
91 struct ahash_alg ahash; 91 struct ahash_alg ahash;
diff --git a/drivers/crypto/qce/sha.c b/drivers/crypto/qce/sha.c
index 3c33ac9c8cba..f3385934eed2 100644
--- a/drivers/crypto/qce/sha.c
+++ b/drivers/crypto/qce/sha.c
@@ -25,11 +25,11 @@
25 25
26static LIST_HEAD(ahash_algs); 26static LIST_HEAD(ahash_algs);
27 27
28static const __be32 std_iv_sha1[SHA256_DIGEST_SIZE / sizeof(__be32)] = { 28static const u32 std_iv_sha1[SHA256_DIGEST_SIZE / sizeof(u32)] = {
29 SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4, 0, 0, 0 29 SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4, 0, 0, 0
30}; 30};
31 31
32static const __be32 std_iv_sha256[SHA256_DIGEST_SIZE / sizeof(__be32)] = { 32static const u32 std_iv_sha256[SHA256_DIGEST_SIZE / sizeof(u32)] = {
33 SHA256_H0, SHA256_H1, SHA256_H2, SHA256_H3, 33 SHA256_H0, SHA256_H1, SHA256_H2, SHA256_H3,
34 SHA256_H4, SHA256_H5, SHA256_H6, SHA256_H7 34 SHA256_H4, SHA256_H5, SHA256_H6, SHA256_H7
35}; 35};
@@ -132,7 +132,7 @@ static int qce_ahash_init(struct ahash_request *req)
132{ 132{
133 struct qce_sha_reqctx *rctx = ahash_request_ctx(req); 133 struct qce_sha_reqctx *rctx = ahash_request_ctx(req);
134 struct qce_alg_template *tmpl = to_ahash_tmpl(req->base.tfm); 134 struct qce_alg_template *tmpl = to_ahash_tmpl(req->base.tfm);
135 const __be32 *std_iv = tmpl->std_iv; 135 const u32 *std_iv = tmpl->std_iv;
136 136
137 memset(rctx, 0, sizeof(*rctx)); 137 memset(rctx, 0, sizeof(*rctx));
138 rctx->first_blk = true; 138 rctx->first_blk = true;
@@ -156,15 +156,15 @@ static int qce_ahash_export(struct ahash_request *req, void *out)
156 struct sha1_state *out_state = out; 156 struct sha1_state *out_state = out;
157 157
158 out_state->count = rctx->count; 158 out_state->count = rctx->count;
159 qce_cpu_to_be32p_array(out_state->state, rctx->digest, 159 qce_cpu_to_be32p_array((__be32 *)out_state->state,
160 digestsize); 160 rctx->digest, digestsize);
161 memcpy(out_state->buffer, rctx->buf, blocksize); 161 memcpy(out_state->buffer, rctx->buf, blocksize);
162 } else if (IS_SHA256(flags) || IS_SHA256_HMAC(flags)) { 162 } else if (IS_SHA256(flags) || IS_SHA256_HMAC(flags)) {
163 struct sha256_state *out_state = out; 163 struct sha256_state *out_state = out;
164 164
165 out_state->count = rctx->count; 165 out_state->count = rctx->count;
166 qce_cpu_to_be32p_array(out_state->state, rctx->digest, 166 qce_cpu_to_be32p_array((__be32 *)out_state->state,
167 digestsize); 167 rctx->digest, digestsize);
168 memcpy(out_state->buf, rctx->buf, blocksize); 168 memcpy(out_state->buf, rctx->buf, blocksize);
169 } else { 169 } else {
170 return -EINVAL; 170 return -EINVAL;
@@ -199,8 +199,8 @@ static int qce_import_common(struct ahash_request *req, u64 in_count,
199 count += SHA_PADDING; 199 count += SHA_PADDING;
200 } 200 }
201 201
202 rctx->byte_count[0] = (__be32)(count & ~SHA_PADDING_MASK); 202 rctx->byte_count[0] = (__force __be32)(count & ~SHA_PADDING_MASK);
203 rctx->byte_count[1] = (__be32)(count >> 32); 203 rctx->byte_count[1] = (__force __be32)(count >> 32);
204 qce_cpu_to_be32p_array((__be32 *)rctx->digest, (const u8 *)state, 204 qce_cpu_to_be32p_array((__be32 *)rctx->digest, (const u8 *)state,
205 digestsize); 205 digestsize);
206 rctx->buflen = (unsigned int)(in_count & (blocksize - 1)); 206 rctx->buflen = (unsigned int)(in_count & (blocksize - 1));
@@ -454,7 +454,7 @@ struct qce_ahash_def {
454 unsigned int digestsize; 454 unsigned int digestsize;
455 unsigned int blocksize; 455 unsigned int blocksize;
456 unsigned int statesize; 456 unsigned int statesize;
457 const __be32 *std_iv; 457 const u32 *std_iv;
458}; 458};
459 459
460static const struct qce_ahash_def ahash_def[] = { 460static const struct qce_ahash_def ahash_def[] = {