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authorTadeusz Struk <tadeusz.struk@intel.com>2014-09-10 17:07:25 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2014-09-18 08:44:14 -0400
commit413e55742a4f18da6173271ca66748e690997f30 (patch)
treedc8b1bf1d8d8f6eae67f4cb2871542c1b4e2ee0c /drivers/crypto
parent78f543a93473f67a1035949a293b79288e259b6e (diff)
crypto: qat - Enable all 32 IRQs
Enable interrupts from all 32 bundles. Signed-off-by: Conor McLoughlin <conor.mcloughlin@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
index b707f292b377..65dd1ff93d3b 100644
--- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
+++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
@@ -66,7 +66,7 @@
66#define ADF_DH895XCC_ETR_MAX_BANKS 32 66#define ADF_DH895XCC_ETR_MAX_BANKS 32
67#define ADF_DH895XCC_SMIAPF0_MASK_OFFSET (0x3A000 + 0x28) 67#define ADF_DH895XCC_SMIAPF0_MASK_OFFSET (0x3A000 + 0x28)
68#define ADF_DH895XCC_SMIAPF1_MASK_OFFSET (0x3A000 + 0x30) 68#define ADF_DH895XCC_SMIAPF1_MASK_OFFSET (0x3A000 + 0x30)
69#define ADF_DH895XCC_SMIA0_MASK 0xFFFF 69#define ADF_DH895XCC_SMIA0_MASK 0xFFFFFFFF
70#define ADF_DH895XCC_SMIA1_MASK 0x1 70#define ADF_DH895XCC_SMIA1_MASK 0x1
71/* Error detection and correction */ 71/* Error detection and correction */
72#define ADF_DH895XCC_AE_CTX_ENABLES(i) (i * 0x1000 + 0x20818) 72#define ADF_DH895XCC_AE_CTX_ENABLES(i) (i * 0x1000 + 0x20818)