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authorMark A. Greer <mgreer@animalcreek.com>2013-01-08 13:57:39 -0500
committerHerbert Xu <herbert@gondor.apana.org.au>2013-01-19 18:16:41 -0500
commit7219368b05bd05bd3366bfb22fc38d2dc41085e5 (patch)
tree5698b941d004bac7934281f88759975fbe623456 /drivers/crypto
parent05f369a89a8ee44e79553462a1322c083dfbb760 (diff)
crypto: omap-aes - Don't reset controller for every operation
The AES controller only needs to be reset once and that will be done by the hwmod infrastructure, if possible. Therefore, remove the reset code from the omap-aes driver. CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/omap-aes.c27
1 files changed, 0 insertions, 27 deletions
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 481da719b16e..33cd78305461 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -160,19 +160,6 @@ static void omap_aes_write_n(struct omap_aes_dev *dd, u32 offset,
160 omap_aes_write(dd, offset, *value); 160 omap_aes_write(dd, offset, *value);
161} 161}
162 162
163static int omap_aes_wait(struct omap_aes_dev *dd, u32 offset, u32 bit)
164{
165 unsigned long timeout = jiffies + DEFAULT_TIMEOUT;
166
167 while (!(omap_aes_read(dd, offset) & bit)) {
168 if (time_is_before_jiffies(timeout)) {
169 dev_err(dd->dev, "omap-aes timeout\n");
170 return -ETIMEDOUT;
171 }
172 }
173 return 0;
174}
175
176static int omap_aes_hw_init(struct omap_aes_dev *dd) 163static int omap_aes_hw_init(struct omap_aes_dev *dd)
177{ 164{
178 /* 165 /*
@@ -183,20 +170,6 @@ static int omap_aes_hw_init(struct omap_aes_dev *dd)
183 clk_enable(dd->iclk); 170 clk_enable(dd->iclk);
184 171
185 if (!(dd->flags & FLAGS_INIT)) { 172 if (!(dd->flags & FLAGS_INIT)) {
186 /* is it necessary to reset before every operation? */
187 omap_aes_write_mask(dd, AES_REG_MASK, AES_REG_MASK_SOFTRESET,
188 AES_REG_MASK_SOFTRESET);
189 /*
190 * prevent OCP bus error (SRESP) in case an access to the module
191 * is performed while the module is coming out of soft reset
192 */
193 __asm__ __volatile__("nop");
194 __asm__ __volatile__("nop");
195
196 if (omap_aes_wait(dd, AES_REG_SYSSTATUS,
197 AES_REG_SYSSTATUS_RESETDONE))
198 return -ETIMEDOUT;
199
200 dd->flags |= FLAGS_INIT; 173 dd->flags |= FLAGS_INIT;
201 dd->err = 0; 174 dd->err = 0;
202 } 175 }