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authorPhil Sutter <phil.sutter@viprinet.com>2011-05-05 09:28:58 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2011-05-11 01:06:14 -0400
commit99db3eacac81e50225d8a3571e32d692428f6920 (patch)
tree39a48acbf4145443a8ce18724b452d2c555786b9 /drivers/crypto
parent042e9e73561aa406b872f3e310bdc9477c379cb3 (diff)
crypto: mv_cesa - the descriptor pointer register needs to be set just once
Signed-off-by: Phil Sutter <phil.sutter@viprinet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/mv_cesa.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c
index c443246ca4b1..889c0984cfd1 100644
--- a/drivers/crypto/mv_cesa.c
+++ b/drivers/crypto/mv_cesa.c
@@ -275,7 +275,6 @@ static void mv_process_current_q(int first_block)
275 memcpy(cpg->sram + SRAM_CONFIG, &op, 275 memcpy(cpg->sram + SRAM_CONFIG, &op,
276 sizeof(struct sec_accel_config)); 276 sizeof(struct sec_accel_config));
277 277
278 writel(SRAM_CONFIG, cpg->reg + SEC_ACCEL_DESC_P0);
279 /* GO */ 278 /* GO */
280 writel(SEC_CMD_EN_SEC_ACCL0, cpg->reg + SEC_ACCEL_CMD); 279 writel(SEC_CMD_EN_SEC_ACCL0, cpg->reg + SEC_ACCEL_CMD);
281 280
@@ -349,7 +348,6 @@ static void mv_process_hash_current(int first_block)
349 348
350 memcpy(cpg->sram + SRAM_CONFIG, &op, sizeof(struct sec_accel_config)); 349 memcpy(cpg->sram + SRAM_CONFIG, &op, sizeof(struct sec_accel_config));
351 350
352 writel(SRAM_CONFIG, cpg->reg + SEC_ACCEL_DESC_P0);
353 /* GO */ 351 /* GO */
354 writel(SEC_CMD_EN_SEC_ACCL0, cpg->reg + SEC_ACCEL_CMD); 352 writel(SEC_CMD_EN_SEC_ACCL0, cpg->reg + SEC_ACCEL_CMD);
355 353
@@ -1063,6 +1061,7 @@ static int mv_probe(struct platform_device *pdev)
1063 1061
1064 writel(SEC_INT_ACCEL0_DONE, cpg->reg + SEC_ACCEL_INT_MASK); 1062 writel(SEC_INT_ACCEL0_DONE, cpg->reg + SEC_ACCEL_INT_MASK);
1065 writel(SEC_CFG_STOP_DIG_ERR, cpg->reg + SEC_ACCEL_CFG); 1063 writel(SEC_CFG_STOP_DIG_ERR, cpg->reg + SEC_ACCEL_CFG);
1064 writel(SRAM_CONFIG, cpg->reg + SEC_ACCEL_DESC_P0);
1066 1065
1067 ret = crypto_register_alg(&mv_aes_alg_ecb); 1066 ret = crypto_register_alg(&mv_aes_alg_ecb);
1068 if (ret) 1067 if (ret)