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authorPhil Sutter <phil.sutter@viprinet.com>2011-05-05 09:29:04 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2011-05-11 01:06:20 -0400
commit8652348754a1f538daa1eab248e5c9c4c3600204 (patch)
tree9812a8205990fe5ec13f8d84d7db7fd81589e53d /drivers/crypto
parentcc8d35057ce7ae2f88cc65be0f839316c4641332 (diff)
crypto: mv_cesa - move digest state initialisation to a better place
On one hand, the digest state registers need to be set only when actually using the crypto engine. On the other hand, there is a check for ctx->first_hash in mv_process_hash_current() already, so use that. Signed-off-by: Phil Sutter <phil.sutter@viprinet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/mv_cesa.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c
index c1925c2a88b0..a2d9e394f80f 100644
--- a/drivers/crypto/mv_cesa.c
+++ b/drivers/crypto/mv_cesa.c
@@ -342,6 +342,12 @@ static void mv_process_hash_current(int first_block)
342 op.config |= CFG_LAST_FRAG; 342 op.config |= CFG_LAST_FRAG;
343 else 343 else
344 op.config |= CFG_MID_FRAG; 344 op.config |= CFG_MID_FRAG;
345
346 writel(req_ctx->state[0], cpg->reg + DIGEST_INITIAL_VAL_A);
347 writel(req_ctx->state[1], cpg->reg + DIGEST_INITIAL_VAL_B);
348 writel(req_ctx->state[2], cpg->reg + DIGEST_INITIAL_VAL_C);
349 writel(req_ctx->state[3], cpg->reg + DIGEST_INITIAL_VAL_D);
350 writel(req_ctx->state[4], cpg->reg + DIGEST_INITIAL_VAL_E);
345 } 351 }
346 352
347 memcpy(cpg->sram + SRAM_CONFIG, &op, sizeof(struct sec_accel_config)); 353 memcpy(cpg->sram + SRAM_CONFIG, &op, sizeof(struct sec_accel_config));
@@ -525,14 +531,6 @@ static void mv_start_new_hash_req(struct ahash_request *req)
525 p->crypt_len = ctx->extra_bytes; 531 p->crypt_len = ctx->extra_bytes;
526 } 532 }
527 533
528 if (unlikely(!ctx->first_hash)) {
529 writel(ctx->state[0], cpg->reg + DIGEST_INITIAL_VAL_A);
530 writel(ctx->state[1], cpg->reg + DIGEST_INITIAL_VAL_B);
531 writel(ctx->state[2], cpg->reg + DIGEST_INITIAL_VAL_C);
532 writel(ctx->state[3], cpg->reg + DIGEST_INITIAL_VAL_D);
533 writel(ctx->state[4], cpg->reg + DIGEST_INITIAL_VAL_E);
534 }
535
536 ctx->extra_bytes = hw_bytes % SHA1_BLOCK_SIZE; 534 ctx->extra_bytes = hw_bytes % SHA1_BLOCK_SIZE;
537 if (ctx->extra_bytes != 0 535 if (ctx->extra_bytes != 0
538 && (!ctx->last_chunk || ctx->count > MAX_HW_HASH_SIZE)) 536 && (!ctx->last_chunk || ctx->count > MAX_HW_HASH_SIZE))