diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-11 01:01:27 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-11 01:01:27 -0500 |
commit | 4f58cb90bcb04cfe18f524d1c9a65edef5eb3f51 (patch) | |
tree | 8c686e8b736eed7258921909282c0955543c7d2f /drivers/crypto | |
parent | e7691a1ce341c80ed9504244a36b31c025217391 (diff) | |
parent | 08c70fc3a239475122e20b7a21dfae4c264c24f7 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (54 commits)
crypto: gf128mul - remove leftover "(EXPERIMENTAL)" in Kconfig
crypto: serpent-sse2 - remove unneeded LRW/XTS #ifdefs
crypto: serpent-sse2 - select LRW and XTS
crypto: twofish-x86_64-3way - remove unneeded LRW/XTS #ifdefs
crypto: twofish-x86_64-3way - select LRW and XTS
crypto: xts - remove dependency on EXPERIMENTAL
crypto: lrw - remove dependency on EXPERIMENTAL
crypto: picoxcell - fix boolean and / or confusion
crypto: caam - remove DECO access initialization code
crypto: caam - fix polarity of "propagate error" logic
crypto: caam - more desc.h cleanups
crypto: caam - desc.h - convert spaces to tabs
crypto: talitos - convert talitos_error to struct device
crypto: talitos - remove NO_IRQ references
crypto: talitos - fix bad kfree
crypto: convert drivers/crypto/* to use module_platform_driver()
char: hw_random: convert drivers/char/hw_random/* to use module_platform_driver()
crypto: serpent-sse2 - should select CRYPTO_CRYPTD
crypto: serpent - rename serpent.c to serpent_generic.c
crypto: serpent - cleanup checkpatch errors and warnings
...
Diffstat (limited to 'drivers/crypto')
-rw-r--r-- | drivers/crypto/amcc/crypto4xx_core.c | 13 | ||||
-rw-r--r-- | drivers/crypto/caam/caamalg.c | 67 | ||||
-rw-r--r-- | drivers/crypto/caam/compat.h | 1 | ||||
-rw-r--r-- | drivers/crypto/caam/ctrl.c | 26 | ||||
-rw-r--r-- | drivers/crypto/caam/desc.h | 2265 | ||||
-rw-r--r-- | drivers/crypto/caam/desc_constr.h | 7 | ||||
-rw-r--r-- | drivers/crypto/caam/regs.h | 1 | ||||
-rw-r--r-- | drivers/crypto/mv_cesa.c | 12 | ||||
-rw-r--r-- | drivers/crypto/picoxcell_crypto.c | 16 | ||||
-rw-r--r-- | drivers/crypto/s5p-sss.c | 13 | ||||
-rw-r--r-- | drivers/crypto/talitos.c | 493 | ||||
-rw-r--r-- | drivers/crypto/talitos.h | 45 |
12 files changed, 1629 insertions, 1330 deletions
diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c index 1d103f997dc2..13f8e1a14988 100644 --- a/drivers/crypto/amcc/crypto4xx_core.c +++ b/drivers/crypto/amcc/crypto4xx_core.c | |||
@@ -1292,18 +1292,7 @@ static struct platform_driver crypto4xx_driver = { | |||
1292 | .remove = crypto4xx_remove, | 1292 | .remove = crypto4xx_remove, |
1293 | }; | 1293 | }; |
1294 | 1294 | ||
1295 | static int __init crypto4xx_init(void) | 1295 | module_platform_driver(crypto4xx_driver); |
1296 | { | ||
1297 | return platform_driver_register(&crypto4xx_driver); | ||
1298 | } | ||
1299 | |||
1300 | static void __exit crypto4xx_exit(void) | ||
1301 | { | ||
1302 | platform_driver_unregister(&crypto4xx_driver); | ||
1303 | } | ||
1304 | |||
1305 | module_init(crypto4xx_init); | ||
1306 | module_exit(crypto4xx_exit); | ||
1307 | 1296 | ||
1308 | MODULE_LICENSE("GPL"); | 1297 | MODULE_LICENSE("GPL"); |
1309 | MODULE_AUTHOR("James Hsiao <jhsiao@amcc.com>"); | 1298 | MODULE_AUTHOR("James Hsiao <jhsiao@amcc.com>"); |
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c index 4159265b453b..e73cf2e8110a 100644 --- a/drivers/crypto/caam/caamalg.c +++ b/drivers/crypto/caam/caamalg.c | |||
@@ -113,7 +113,7 @@ static inline void append_dec_shr_done(u32 *desc) | |||
113 | 113 | ||
114 | jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TEST_ALL); | 114 | jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TEST_ALL); |
115 | set_jump_tgt_here(desc, jump_cmd); | 115 | set_jump_tgt_here(desc, jump_cmd); |
116 | append_cmd(desc, SET_OK_PROP_ERRORS | CMD_LOAD); | 116 | append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD); |
117 | } | 117 | } |
118 | 118 | ||
119 | /* | 119 | /* |
@@ -213,7 +213,7 @@ static void init_sh_desc_key_aead(u32 *desc, struct caam_ctx *ctx, | |||
213 | set_jump_tgt_here(desc, key_jump_cmd); | 213 | set_jump_tgt_here(desc, key_jump_cmd); |
214 | 214 | ||
215 | /* Propagate errors from shared to job descriptor */ | 215 | /* Propagate errors from shared to job descriptor */ |
216 | append_cmd(desc, SET_OK_PROP_ERRORS | CMD_LOAD); | 216 | append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD); |
217 | } | 217 | } |
218 | 218 | ||
219 | static int aead_set_sh_desc(struct crypto_aead *aead) | 219 | static int aead_set_sh_desc(struct crypto_aead *aead) |
@@ -310,7 +310,7 @@ static int aead_set_sh_desc(struct crypto_aead *aead) | |||
310 | /* Only propagate error immediately if shared */ | 310 | /* Only propagate error immediately if shared */ |
311 | jump_cmd = append_jump(desc, JUMP_TEST_ALL); | 311 | jump_cmd = append_jump(desc, JUMP_TEST_ALL); |
312 | set_jump_tgt_here(desc, key_jump_cmd); | 312 | set_jump_tgt_here(desc, key_jump_cmd); |
313 | append_cmd(desc, SET_OK_PROP_ERRORS | CMD_LOAD); | 313 | append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD); |
314 | set_jump_tgt_here(desc, jump_cmd); | 314 | set_jump_tgt_here(desc, jump_cmd); |
315 | 315 | ||
316 | /* Class 2 operation */ | 316 | /* Class 2 operation */ |
@@ -683,7 +683,7 @@ static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher, | |||
683 | set_jump_tgt_here(desc, key_jump_cmd); | 683 | set_jump_tgt_here(desc, key_jump_cmd); |
684 | 684 | ||
685 | /* Propagate errors from shared to job descriptor */ | 685 | /* Propagate errors from shared to job descriptor */ |
686 | append_cmd(desc, SET_OK_PROP_ERRORS | CMD_LOAD); | 686 | append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD); |
687 | 687 | ||
688 | /* Load iv */ | 688 | /* Load iv */ |
689 | append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT | | 689 | append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT | |
@@ -724,7 +724,7 @@ static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher, | |||
724 | /* For aead, only propagate error immediately if shared */ | 724 | /* For aead, only propagate error immediately if shared */ |
725 | jump_cmd = append_jump(desc, JUMP_TEST_ALL); | 725 | jump_cmd = append_jump(desc, JUMP_TEST_ALL); |
726 | set_jump_tgt_here(desc, key_jump_cmd); | 726 | set_jump_tgt_here(desc, key_jump_cmd); |
727 | append_cmd(desc, SET_OK_PROP_ERRORS | CMD_LOAD); | 727 | append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD); |
728 | set_jump_tgt_here(desc, jump_cmd); | 728 | set_jump_tgt_here(desc, jump_cmd); |
729 | 729 | ||
730 | /* load IV */ | 730 | /* load IV */ |
@@ -1806,6 +1806,25 @@ struct caam_alg_template { | |||
1806 | static struct caam_alg_template driver_algs[] = { | 1806 | static struct caam_alg_template driver_algs[] = { |
1807 | /* single-pass ipsec_esp descriptor */ | 1807 | /* single-pass ipsec_esp descriptor */ |
1808 | { | 1808 | { |
1809 | .name = "authenc(hmac(md5),cbc(aes))", | ||
1810 | .driver_name = "authenc-hmac-md5-cbc-aes-caam", | ||
1811 | .blocksize = AES_BLOCK_SIZE, | ||
1812 | .type = CRYPTO_ALG_TYPE_AEAD, | ||
1813 | .template_aead = { | ||
1814 | .setkey = aead_setkey, | ||
1815 | .setauthsize = aead_setauthsize, | ||
1816 | .encrypt = aead_encrypt, | ||
1817 | .decrypt = aead_decrypt, | ||
1818 | .givencrypt = aead_givencrypt, | ||
1819 | .geniv = "<built-in>", | ||
1820 | .ivsize = AES_BLOCK_SIZE, | ||
1821 | .maxauthsize = MD5_DIGEST_SIZE, | ||
1822 | }, | ||
1823 | .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, | ||
1824 | .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, | ||
1825 | .alg_op = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC, | ||
1826 | }, | ||
1827 | { | ||
1809 | .name = "authenc(hmac(sha1),cbc(aes))", | 1828 | .name = "authenc(hmac(sha1),cbc(aes))", |
1810 | .driver_name = "authenc-hmac-sha1-cbc-aes-caam", | 1829 | .driver_name = "authenc-hmac-sha1-cbc-aes-caam", |
1811 | .blocksize = AES_BLOCK_SIZE, | 1830 | .blocksize = AES_BLOCK_SIZE, |
@@ -1865,6 +1884,25 @@ static struct caam_alg_template driver_algs[] = { | |||
1865 | .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC, | 1884 | .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC, |
1866 | }, | 1885 | }, |
1867 | { | 1886 | { |
1887 | .name = "authenc(hmac(md5),cbc(des3_ede))", | ||
1888 | .driver_name = "authenc-hmac-md5-cbc-des3_ede-caam", | ||
1889 | .blocksize = DES3_EDE_BLOCK_SIZE, | ||
1890 | .type = CRYPTO_ALG_TYPE_AEAD, | ||
1891 | .template_aead = { | ||
1892 | .setkey = aead_setkey, | ||
1893 | .setauthsize = aead_setauthsize, | ||
1894 | .encrypt = aead_encrypt, | ||
1895 | .decrypt = aead_decrypt, | ||
1896 | .givencrypt = aead_givencrypt, | ||
1897 | .geniv = "<built-in>", | ||
1898 | .ivsize = DES3_EDE_BLOCK_SIZE, | ||
1899 | .maxauthsize = MD5_DIGEST_SIZE, | ||
1900 | }, | ||
1901 | .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, | ||
1902 | .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, | ||
1903 | .alg_op = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC, | ||
1904 | }, | ||
1905 | { | ||
1868 | .name = "authenc(hmac(sha1),cbc(des3_ede))", | 1906 | .name = "authenc(hmac(sha1),cbc(des3_ede))", |
1869 | .driver_name = "authenc-hmac-sha1-cbc-des3_ede-caam", | 1907 | .driver_name = "authenc-hmac-sha1-cbc-des3_ede-caam", |
1870 | .blocksize = DES3_EDE_BLOCK_SIZE, | 1908 | .blocksize = DES3_EDE_BLOCK_SIZE, |
@@ -1924,6 +1962,25 @@ static struct caam_alg_template driver_algs[] = { | |||
1924 | .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC, | 1962 | .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC, |
1925 | }, | 1963 | }, |
1926 | { | 1964 | { |
1965 | .name = "authenc(hmac(md5),cbc(des))", | ||
1966 | .driver_name = "authenc-hmac-md5-cbc-des-caam", | ||
1967 | .blocksize = DES_BLOCK_SIZE, | ||
1968 | .type = CRYPTO_ALG_TYPE_AEAD, | ||
1969 | .template_aead = { | ||
1970 | .setkey = aead_setkey, | ||
1971 | .setauthsize = aead_setauthsize, | ||
1972 | .encrypt = aead_encrypt, | ||
1973 | .decrypt = aead_decrypt, | ||
1974 | .givencrypt = aead_givencrypt, | ||
1975 | .geniv = "<built-in>", | ||
1976 | .ivsize = DES_BLOCK_SIZE, | ||
1977 | .maxauthsize = MD5_DIGEST_SIZE, | ||
1978 | }, | ||
1979 | .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, | ||
1980 | .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, | ||
1981 | .alg_op = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC, | ||
1982 | }, | ||
1983 | { | ||
1927 | .name = "authenc(hmac(sha1),cbc(des))", | 1984 | .name = "authenc(hmac(sha1),cbc(des))", |
1928 | .driver_name = "authenc-hmac-sha1-cbc-des-caam", | 1985 | .driver_name = "authenc-hmac-sha1-cbc-des-caam", |
1929 | .blocksize = DES_BLOCK_SIZE, | 1986 | .blocksize = DES_BLOCK_SIZE, |
diff --git a/drivers/crypto/caam/compat.h b/drivers/crypto/caam/compat.h index d38f2afaa966..a63bc65fae86 100644 --- a/drivers/crypto/caam/compat.h +++ b/drivers/crypto/caam/compat.h | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <crypto/aes.h> | 28 | #include <crypto/aes.h> |
29 | #include <crypto/des.h> | 29 | #include <crypto/des.h> |
30 | #include <crypto/sha.h> | 30 | #include <crypto/sha.h> |
31 | #include <crypto/md5.h> | ||
31 | #include <crypto/aead.h> | 32 | #include <crypto/aead.h> |
32 | #include <crypto/authenc.h> | 33 | #include <crypto/authenc.h> |
33 | #include <crypto/scatterwalk.h> | 34 | #include <crypto/scatterwalk.h> |
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index 73988bb7322a..8ae3ba2a160d 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c | |||
@@ -52,8 +52,6 @@ static int caam_probe(struct platform_device *pdev) | |||
52 | struct caam_ctrl __iomem *ctrl; | 52 | struct caam_ctrl __iomem *ctrl; |
53 | struct caam_full __iomem *topregs; | 53 | struct caam_full __iomem *topregs; |
54 | struct caam_drv_private *ctrlpriv; | 54 | struct caam_drv_private *ctrlpriv; |
55 | struct caam_deco **deco; | ||
56 | u32 deconum; | ||
57 | #ifdef CONFIG_DEBUG_FS | 55 | #ifdef CONFIG_DEBUG_FS |
58 | struct caam_perfmon *perfmon; | 56 | struct caam_perfmon *perfmon; |
59 | #endif | 57 | #endif |
@@ -92,17 +90,6 @@ static int caam_probe(struct platform_device *pdev) | |||
92 | if (sizeof(dma_addr_t) == sizeof(u64)) | 90 | if (sizeof(dma_addr_t) == sizeof(u64)) |
93 | dma_set_mask(dev, DMA_BIT_MASK(36)); | 91 | dma_set_mask(dev, DMA_BIT_MASK(36)); |
94 | 92 | ||
95 | /* Find out how many DECOs are present */ | ||
96 | deconum = (rd_reg64(&topregs->ctrl.perfmon.cha_num) & | ||
97 | CHA_NUM_DECONUM_MASK) >> CHA_NUM_DECONUM_SHIFT; | ||
98 | |||
99 | ctrlpriv->deco = kmalloc(deconum * sizeof(struct caam_deco *), | ||
100 | GFP_KERNEL); | ||
101 | |||
102 | deco = (struct caam_deco __force **)&topregs->deco; | ||
103 | for (d = 0; d < deconum; d++) | ||
104 | ctrlpriv->deco[d] = deco[d]; | ||
105 | |||
106 | /* | 93 | /* |
107 | * Detect and enable JobRs | 94 | * Detect and enable JobRs |
108 | * First, find out how many ring spec'ed, allocate references | 95 | * First, find out how many ring spec'ed, allocate references |
@@ -253,18 +240,7 @@ static struct platform_driver caam_driver = { | |||
253 | .remove = __devexit_p(caam_remove), | 240 | .remove = __devexit_p(caam_remove), |
254 | }; | 241 | }; |
255 | 242 | ||
256 | static int __init caam_base_init(void) | 243 | module_platform_driver(caam_driver); |
257 | { | ||
258 | return platform_driver_register(&caam_driver); | ||
259 | } | ||
260 | |||
261 | static void __exit caam_base_exit(void) | ||
262 | { | ||
263 | return platform_driver_unregister(&caam_driver); | ||
264 | } | ||
265 | |||
266 | module_init(caam_base_init); | ||
267 | module_exit(caam_base_exit); | ||
268 | 244 | ||
269 | MODULE_LICENSE("GPL"); | 245 | MODULE_LICENSE("GPL"); |
270 | MODULE_DESCRIPTION("FSL CAAM request backend"); | 246 | MODULE_DESCRIPTION("FSL CAAM request backend"); |
diff --git a/drivers/crypto/caam/desc.h b/drivers/crypto/caam/desc.h index 974a75842da9..a17c2958dab1 100644 --- a/drivers/crypto/caam/desc.h +++ b/drivers/crypto/caam/desc.h | |||
@@ -9,7 +9,7 @@ | |||
9 | #define DESC_H | 9 | #define DESC_H |
10 | 10 | ||
11 | /* Max size of any CAAM descriptor in 32-bit words, inclusive of header */ | 11 | /* Max size of any CAAM descriptor in 32-bit words, inclusive of header */ |
12 | #define MAX_CAAM_DESCSIZE 64 | 12 | #define MAX_CAAM_DESCSIZE 64 |
13 | 13 | ||
14 | /* Block size of any entity covered/uncovered with a KEK/TKEK */ | 14 | /* Block size of any entity covered/uncovered with a KEK/TKEK */ |
15 | #define KEK_BLOCKSIZE 16 | 15 | #define KEK_BLOCKSIZE 16 |
@@ -18,38 +18,38 @@ | |||
18 | * Supported descriptor command types as they show up | 18 | * Supported descriptor command types as they show up |
19 | * inside a descriptor command word. | 19 | * inside a descriptor command word. |
20 | */ | 20 | */ |
21 | #define CMD_SHIFT 27 | 21 | #define CMD_SHIFT 27 |
22 | #define CMD_MASK 0xf8000000 | 22 | #define CMD_MASK 0xf8000000 |
23 | 23 | ||
24 | #define CMD_KEY (0x00 << CMD_SHIFT) | 24 | #define CMD_KEY (0x00 << CMD_SHIFT) |
25 | #define CMD_SEQ_KEY (0x01 << CMD_SHIFT) | 25 | #define CMD_SEQ_KEY (0x01 << CMD_SHIFT) |
26 | #define CMD_LOAD (0x02 << CMD_SHIFT) | 26 | #define CMD_LOAD (0x02 << CMD_SHIFT) |
27 | #define CMD_SEQ_LOAD (0x03 << CMD_SHIFT) | 27 | #define CMD_SEQ_LOAD (0x03 << CMD_SHIFT) |
28 | #define CMD_FIFO_LOAD (0x04 << CMD_SHIFT) | 28 | #define CMD_FIFO_LOAD (0x04 << CMD_SHIFT) |
29 | #define CMD_SEQ_FIFO_LOAD (0x05 << CMD_SHIFT) | 29 | #define CMD_SEQ_FIFO_LOAD (0x05 << CMD_SHIFT) |
30 | #define CMD_STORE (0x0a << CMD_SHIFT) | 30 | #define CMD_STORE (0x0a << CMD_SHIFT) |
31 | #define CMD_SEQ_STORE (0x0b << CMD_SHIFT) | 31 | #define CMD_SEQ_STORE (0x0b << CMD_SHIFT) |
32 | #define CMD_FIFO_STORE (0x0c << CMD_SHIFT) | 32 | #define CMD_FIFO_STORE (0x0c << CMD_SHIFT) |
33 | #define CMD_SEQ_FIFO_STORE (0x0d << CMD_SHIFT) | 33 | #define CMD_SEQ_FIFO_STORE (0x0d << CMD_SHIFT) |
34 | #define CMD_MOVE_LEN (0x0e << CMD_SHIFT) | 34 | #define CMD_MOVE_LEN (0x0e << CMD_SHIFT) |
35 | #define CMD_MOVE (0x0f << CMD_SHIFT) | 35 | #define CMD_MOVE (0x0f << CMD_SHIFT) |
36 | #define CMD_OPERATION (0x10 << CMD_SHIFT) | 36 | #define CMD_OPERATION (0x10 << CMD_SHIFT) |
37 | #define CMD_SIGNATURE (0x12 << CMD_SHIFT) | 37 | #define CMD_SIGNATURE (0x12 << CMD_SHIFT) |
38 | #define CMD_JUMP (0x14 << CMD_SHIFT) | 38 | #define CMD_JUMP (0x14 << CMD_SHIFT) |
39 | #define CMD_MATH (0x15 << CMD_SHIFT) | 39 | #define CMD_MATH (0x15 << CMD_SHIFT) |
40 | #define CMD_DESC_HDR (0x16 << CMD_SHIFT) | 40 | #define CMD_DESC_HDR (0x16 << CMD_SHIFT) |
41 | #define CMD_SHARED_DESC_HDR (0x17 << CMD_SHIFT) | 41 | #define CMD_SHARED_DESC_HDR (0x17 << CMD_SHIFT) |
42 | #define CMD_SEQ_IN_PTR (0x1e << CMD_SHIFT) | 42 | #define CMD_SEQ_IN_PTR (0x1e << CMD_SHIFT) |
43 | #define CMD_SEQ_OUT_PTR (0x1f << CMD_SHIFT) | 43 | #define CMD_SEQ_OUT_PTR (0x1f << CMD_SHIFT) |
44 | 44 | ||
45 | /* General-purpose class selector for all commands */ | 45 | /* General-purpose class selector for all commands */ |
46 | #define CLASS_SHIFT 25 | 46 | #define CLASS_SHIFT 25 |
47 | #define CLASS_MASK (0x03 << CLASS_SHIFT) | 47 | #define CLASS_MASK (0x03 << CLASS_SHIFT) |
48 | 48 | ||
49 | #define CLASS_NONE (0x00 << CLASS_SHIFT) | 49 | #define CLASS_NONE (0x00 << CLASS_SHIFT) |
50 | #define CLASS_1 (0x01 << CLASS_SHIFT) | 50 | #define CLASS_1 (0x01 << CLASS_SHIFT) |
51 | #define CLASS_2 (0x02 << CLASS_SHIFT) | 51 | #define CLASS_2 (0x02 << CLASS_SHIFT) |
52 | #define CLASS_BOTH (0x03 << CLASS_SHIFT) | 52 | #define CLASS_BOTH (0x03 << CLASS_SHIFT) |
53 | 53 | ||
54 | /* | 54 | /* |
55 | * Descriptor header command constructs | 55 | * Descriptor header command constructs |
@@ -60,82 +60,82 @@ | |||
60 | * Do Not Run - marks a descriptor inexecutable if there was | 60 | * Do Not Run - marks a descriptor inexecutable if there was |
61 | * a preceding error somewhere | 61 | * a preceding error somewhere |
62 | */ | 62 | */ |
63 | #define HDR_DNR 0x01000000 | 63 | #define HDR_DNR 0x01000000 |
64 | 64 | ||
65 | /* | 65 | /* |
66 | * ONE - should always be set. Combination of ONE (always | 66 | * ONE - should always be set. Combination of ONE (always |
67 | * set) and ZRO (always clear) forms an endianness sanity check | 67 | * set) and ZRO (always clear) forms an endianness sanity check |
68 | */ | 68 | */ |
69 | #define HDR_ONE 0x00800000 | 69 | #define HDR_ONE 0x00800000 |
70 | #define HDR_ZRO 0x00008000 | 70 | #define HDR_ZRO 0x00008000 |
71 | 71 | ||
72 | /* Start Index or SharedDesc Length */ | 72 | /* Start Index or SharedDesc Length */ |
73 | #define HDR_START_IDX_MASK 0x3f | 73 | #define HDR_START_IDX_MASK 0x3f |
74 | #define HDR_START_IDX_SHIFT 16 | 74 | #define HDR_START_IDX_SHIFT 16 |
75 | 75 | ||
76 | /* If shared descriptor header, 6-bit length */ | 76 | /* If shared descriptor header, 6-bit length */ |
77 | #define HDR_DESCLEN_SHR_MASK 0x3f | 77 | #define HDR_DESCLEN_SHR_MASK 0x3f |
78 | 78 | ||
79 | /* If non-shared header, 7-bit length */ | 79 | /* If non-shared header, 7-bit length */ |
80 | #define HDR_DESCLEN_MASK 0x7f | 80 | #define HDR_DESCLEN_MASK 0x7f |
81 | 81 | ||
82 | /* This is a TrustedDesc (if not SharedDesc) */ | 82 | /* This is a TrustedDesc (if not SharedDesc) */ |
83 | #define HDR_TRUSTED 0x00004000 | 83 | #define HDR_TRUSTED 0x00004000 |
84 | 84 | ||
85 | /* Make into TrustedDesc (if not SharedDesc) */ | 85 | /* Make into TrustedDesc (if not SharedDesc) */ |
86 | #define HDR_MAKE_TRUSTED 0x00002000 | 86 | #define HDR_MAKE_TRUSTED 0x00002000 |
87 | 87 | ||
88 | /* Save context if self-shared (if SharedDesc) */ | 88 | /* Save context if self-shared (if SharedDesc) */ |
89 | #define HDR_SAVECTX 0x00001000 | 89 | #define HDR_SAVECTX 0x00001000 |
90 | 90 | ||
91 | /* Next item points to SharedDesc */ | 91 | /* Next item points to SharedDesc */ |
92 | #define HDR_SHARED 0x00001000 | 92 | #define HDR_SHARED 0x00001000 |
93 | 93 | ||
94 | /* | 94 | /* |
95 | * Reverse Execution Order - execute JobDesc first, then | 95 | * Reverse Execution Order - execute JobDesc first, then |
96 | * execute SharedDesc (normally SharedDesc goes first). | 96 | * execute SharedDesc (normally SharedDesc goes first). |
97 | */ | 97 | */ |
98 | #define HDR_REVERSE 0x00000800 | 98 | #define HDR_REVERSE 0x00000800 |
99 | 99 | ||
100 | /* Propogate DNR property to SharedDesc */ | 100 | /* Propogate DNR property to SharedDesc */ |
101 | #define HDR_PROP_DNR 0x00000800 | 101 | #define HDR_PROP_DNR 0x00000800 |
102 | 102 | ||
103 | /* JobDesc/SharedDesc share property */ | 103 | /* JobDesc/SharedDesc share property */ |
104 | #define HDR_SD_SHARE_MASK 0x03 | 104 | #define HDR_SD_SHARE_MASK 0x03 |
105 | #define HDR_SD_SHARE_SHIFT 8 | 105 | #define HDR_SD_SHARE_SHIFT 8 |
106 | #define HDR_JD_SHARE_MASK 0x07 | 106 | #define HDR_JD_SHARE_MASK 0x07 |
107 | #define HDR_JD_SHARE_SHIFT 8 | 107 | #define HDR_JD_SHARE_SHIFT 8 |
108 | 108 | ||
109 | #define HDR_SHARE_NEVER (0x00 << HDR_SD_SHARE_SHIFT) | 109 | #define HDR_SHARE_NEVER (0x00 << HDR_SD_SHARE_SHIFT) |
110 | #define HDR_SHARE_WAIT (0x01 << HDR_SD_SHARE_SHIFT) | 110 | #define HDR_SHARE_WAIT (0x01 << HDR_SD_SHARE_SHIFT) |
111 | #define HDR_SHARE_SERIAL (0x02 << HDR_SD_SHARE_SHIFT) | 111 | #define HDR_SHARE_SERIAL (0x02 << HDR_SD_SHARE_SHIFT) |
112 | #define HDR_SHARE_ALWAYS (0x03 << HDR_SD_SHARE_SHIFT) | 112 | #define HDR_SHARE_ALWAYS (0x03 << HDR_SD_SHARE_SHIFT) |
113 | #define HDR_SHARE_DEFER (0x04 << HDR_SD_SHARE_SHIFT) | 113 | #define HDR_SHARE_DEFER (0x04 << HDR_SD_SHARE_SHIFT) |
114 | 114 | ||
115 | /* JobDesc/SharedDesc descriptor length */ | 115 | /* JobDesc/SharedDesc descriptor length */ |
116 | #define HDR_JD_LENGTH_MASK 0x7f | 116 | #define HDR_JD_LENGTH_MASK 0x7f |
117 | #define HDR_SD_LENGTH_MASK 0x3f | 117 | #define HDR_SD_LENGTH_MASK 0x3f |
118 | 118 | ||
119 | /* | 119 | /* |
120 | * KEY/SEQ_KEY Command Constructs | 120 | * KEY/SEQ_KEY Command Constructs |
121 | */ | 121 | */ |
122 | 122 | ||
123 | /* Key Destination Class: 01 = Class 1, 02 - Class 2 */ | 123 | /* Key Destination Class: 01 = Class 1, 02 - Class 2 */ |
124 | #define KEY_DEST_CLASS_SHIFT 25 /* use CLASS_1 or CLASS_2 */ | 124 | #define KEY_DEST_CLASS_SHIFT 25 /* use CLASS_1 or CLASS_2 */ |
125 | #define KEY_DEST_CLASS_MASK (0x03 << KEY_DEST_CLASS_SHIFT) | 125 | #define KEY_DEST_CLASS_MASK (0x03 << KEY_DEST_CLASS_SHIFT) |
126 | 126 | ||
127 | /* Scatter-Gather Table/Variable Length Field */ | 127 | /* Scatter-Gather Table/Variable Length Field */ |
128 | #define KEY_SGF 0x01000000 | 128 | #define KEY_SGF 0x01000000 |
129 | #define KEY_VLF 0x01000000 | 129 | #define KEY_VLF 0x01000000 |
130 | 130 | ||
131 | /* Immediate - Key follows command in the descriptor */ | 131 | /* Immediate - Key follows command in the descriptor */ |
132 | #define KEY_IMM 0x00800000 | 132 | #define KEY_IMM 0x00800000 |
133 | 133 | ||
134 | /* | 134 | /* |
135 | * Encrypted - Key is encrypted either with the KEK, or | 135 | * Encrypted - Key is encrypted either with the KEK, or |
136 | * with the TDKEK if TK is set | 136 | * with the TDKEK if TK is set |
137 | */ | 137 | */ |
138 | #define KEY_ENC 0x00400000 | 138 | #define KEY_ENC 0x00400000 |
139 | 139 | ||
140 | /* | 140 | /* |
141 | * No Write Back - Do not allow key to be FIFO STOREd | 141 | * No Write Back - Do not allow key to be FIFO STOREd |
@@ -156,16 +156,16 @@ | |||
156 | * KDEST - Key Destination: 0 - class key register, | 156 | * KDEST - Key Destination: 0 - class key register, |
157 | * 1 - PKHA 'e', 2 - AFHA Sbox, 3 - MDHA split-key | 157 | * 1 - PKHA 'e', 2 - AFHA Sbox, 3 - MDHA split-key |
158 | */ | 158 | */ |
159 | #define KEY_DEST_SHIFT 16 | 159 | #define KEY_DEST_SHIFT 16 |
160 | #define KEY_DEST_MASK (0x03 << KEY_DEST_SHIFT) | 160 | #define KEY_DEST_MASK (0x03 << KEY_DEST_SHIFT) |
161 | 161 | ||
162 | #define KEY_DEST_CLASS_REG (0x00 << KEY_DEST_SHIFT) | 162 | #define KEY_DEST_CLASS_REG (0x00 << KEY_DEST_SHIFT) |
163 | #define KEY_DEST_PKHA_E (0x01 << KEY_DEST_SHIFT) | 163 | #define KEY_DEST_PKHA_E (0x01 << KEY_DEST_SHIFT) |
164 | #define KEY_DEST_AFHA_SBOX (0x02 << KEY_DEST_SHIFT) | 164 | #define KEY_DEST_AFHA_SBOX (0x02 << KEY_DEST_SHIFT) |
165 | #define KEY_DEST_MDHA_SPLIT (0x03 << KEY_DEST_SHIFT) | 165 | #define KEY_DEST_MDHA_SPLIT (0x03 << KEY_DEST_SHIFT) |
166 | 166 | ||
167 | /* Length in bytes */ | 167 | /* Length in bytes */ |
168 | #define KEY_LENGTH_MASK 0x000003ff | 168 | #define KEY_LENGTH_MASK 0x000003ff |
169 | 169 | ||
170 | /* | 170 | /* |
171 | * LOAD/SEQ_LOAD/STORE/SEQ_STORE Command Constructs | 171 | * LOAD/SEQ_LOAD/STORE/SEQ_STORE Command Constructs |
@@ -175,25 +175,25 @@ | |||
175 | * Load/Store Destination: 0 = class independent CCB, | 175 | * Load/Store Destination: 0 = class independent CCB, |
176 | * 1 = class 1 CCB, 2 = class 2 CCB, 3 = DECO | 176 | * 1 = class 1 CCB, 2 = class 2 CCB, 3 = DECO |
177 | */ | 177 | */ |
178 | #define LDST_CLASS_SHIFT 25 | 178 | #define LDST_CLASS_SHIFT 25 |
179 | #define LDST_CLASS_MASK (0x03 << LDST_CLASS_SHIFT) | 179 | #define LDST_CLASS_MASK (0x03 << LDST_CLASS_SHIFT) |
180 | #define LDST_CLASS_IND_CCB (0x00 << LDST_CLASS_SHIFT) | 180 | #define LDST_CLASS_IND_CCB (0x00 << LDST_CLASS_SHIFT) |
181 | #define LDST_CLASS_1_CCB (0x01 << LDST_CLASS_SHIFT) | 181 | #define LDST_CLASS_1_CCB (0x01 << LDST_CLASS_SHIFT) |
182 | #define LDST_CLASS_2_CCB (0x02 << LDST_CLASS_SHIFT) | 182 | #define LDST_CLASS_2_CCB (0x02 << LDST_CLASS_SHIFT) |
183 | #define LDST_CLASS_DECO (0x03 << LDST_CLASS_SHIFT) | 183 | #define LDST_CLASS_DECO (0x03 << LDST_CLASS_SHIFT) |
184 | 184 | ||
185 | /* Scatter-Gather Table/Variable Length Field */ | 185 | /* Scatter-Gather Table/Variable Length Field */ |
186 | #define LDST_SGF 0x01000000 | 186 | #define LDST_SGF 0x01000000 |
187 | #define LDST_VLF LDST_SGF | 187 | #define LDST_VLF LDST_SGF |
188 | 188 | ||
189 | /* Immediate - Key follows this command in descriptor */ | 189 | /* Immediate - Key follows this command in descriptor */ |
190 | #define LDST_IMM_MASK 1 | 190 | #define LDST_IMM_MASK 1 |
191 | #define LDST_IMM_SHIFT 23 | 191 | #define LDST_IMM_SHIFT 23 |
192 | #define LDST_IMM (LDST_IMM_MASK << LDST_IMM_SHIFT) | 192 | #define LDST_IMM (LDST_IMM_MASK << LDST_IMM_SHIFT) |
193 | 193 | ||
194 | /* SRC/DST - Destination for LOAD, Source for STORE */ | 194 | /* SRC/DST - Destination for LOAD, Source for STORE */ |
195 | #define LDST_SRCDST_SHIFT 16 | 195 | #define LDST_SRCDST_SHIFT 16 |
196 | #define LDST_SRCDST_MASK (0x7f << LDST_SRCDST_SHIFT) | 196 | #define LDST_SRCDST_MASK (0x7f << LDST_SRCDST_SHIFT) |
197 | 197 | ||
198 | #define LDST_SRCDST_BYTE_CONTEXT (0x20 << LDST_SRCDST_SHIFT) | 198 | #define LDST_SRCDST_BYTE_CONTEXT (0x20 << LDST_SRCDST_SHIFT) |
199 | #define LDST_SRCDST_BYTE_KEY (0x40 << LDST_SRCDST_SHIFT) | 199 | #define LDST_SRCDST_BYTE_KEY (0x40 << LDST_SRCDST_SHIFT) |
@@ -205,64 +205,64 @@ | |||
205 | #define LDST_SRCDST_WORD_DATASZ_REG (0x02 << LDST_SRCDST_SHIFT) | 205 | #define LDST_SRCDST_WORD_DATASZ_REG (0x02 << LDST_SRCDST_SHIFT) |
206 | #define LDST_SRCDST_WORD_ICVSZ_REG (0x03 << LDST_SRCDST_SHIFT) | 206 | #define LDST_SRCDST_WORD_ICVSZ_REG (0x03 << LDST_SRCDST_SHIFT) |
207 | #define LDST_SRCDST_WORD_CHACTRL (0x06 << LDST_SRCDST_SHIFT) | 207 | #define LDST_SRCDST_WORD_CHACTRL (0x06 << LDST_SRCDST_SHIFT) |
208 | #define LDST_SRCDST_WORD_DECOCTRL (0x06 << LDST_SRCDST_SHIFT) | 208 | #define LDST_SRCDST_WORD_DECOCTRL (0x06 << LDST_SRCDST_SHIFT) |
209 | #define LDST_SRCDST_WORD_IRQCTRL (0x07 << LDST_SRCDST_SHIFT) | 209 | #define LDST_SRCDST_WORD_IRQCTRL (0x07 << LDST_SRCDST_SHIFT) |
210 | #define LDST_SRCDST_WORD_DECO_PCLOVRD (0x07 << LDST_SRCDST_SHIFT) | 210 | #define LDST_SRCDST_WORD_DECO_PCLOVRD (0x07 << LDST_SRCDST_SHIFT) |
211 | #define LDST_SRCDST_WORD_CLRW (0x08 << LDST_SRCDST_SHIFT) | 211 | #define LDST_SRCDST_WORD_CLRW (0x08 << LDST_SRCDST_SHIFT) |
212 | #define LDST_SRCDST_WORD_DECO_MATH0 (0x08 << LDST_SRCDST_SHIFT) | 212 | #define LDST_SRCDST_WORD_DECO_MATH0 (0x08 << LDST_SRCDST_SHIFT) |
213 | #define LDST_SRCDST_WORD_STAT (0x09 << LDST_SRCDST_SHIFT) | 213 | #define LDST_SRCDST_WORD_STAT (0x09 << LDST_SRCDST_SHIFT) |
214 | #define LDST_SRCDST_WORD_DECO_MATH1 (0x09 << LDST_SRCDST_SHIFT) | 214 | #define LDST_SRCDST_WORD_DECO_MATH1 (0x09 << LDST_SRCDST_SHIFT) |
215 | #define LDST_SRCDST_WORD_DECO_MATH2 (0x0a << LDST_SRCDST_SHIFT) | 215 | #define LDST_SRCDST_WORD_DECO_MATH2 (0x0a << LDST_SRCDST_SHIFT) |
216 | #define LDST_SRCDST_WORD_DECO_AAD_SZ (0x0b << LDST_SRCDST_SHIFT) | 216 | #define LDST_SRCDST_WORD_DECO_AAD_SZ (0x0b << LDST_SRCDST_SHIFT) |
217 | #define LDST_SRCDST_WORD_DECO_MATH3 (0x0b << LDST_SRCDST_SHIFT) | 217 | #define LDST_SRCDST_WORD_DECO_MATH3 (0x0b << LDST_SRCDST_SHIFT) |
218 | #define LDST_SRCDST_WORD_CLASS1_ICV_SZ (0x0c << LDST_SRCDST_SHIFT) | 218 | #define LDST_SRCDST_WORD_CLASS1_ICV_SZ (0x0c << LDST_SRCDST_SHIFT) |
219 | #define LDST_SRCDST_WORD_ALTDS_CLASS1 (0x0f << LDST_SRCDST_SHIFT) | 219 | #define LDST_SRCDST_WORD_ALTDS_CLASS1 (0x0f << LDST_SRCDST_SHIFT) |
220 | #define LDST_SRCDST_WORD_PKHA_A_SZ (0x10 << LDST_SRCDST_SHIFT) | 220 | #define LDST_SRCDST_WORD_PKHA_A_SZ (0x10 << LDST_SRCDST_SHIFT) |
221 | #define LDST_SRCDST_WORD_PKHA_B_SZ (0x11 << LDST_SRCDST_SHIFT) | 221 | #define LDST_SRCDST_WORD_PKHA_B_SZ (0x11 << LDST_SRCDST_SHIFT) |
222 | #define LDST_SRCDST_WORD_PKHA_N_SZ (0x12 << LDST_SRCDST_SHIFT) | 222 | #define LDST_SRCDST_WORD_PKHA_N_SZ (0x12 << LDST_SRCDST_SHIFT) |
223 | #define LDST_SRCDST_WORD_PKHA_E_SZ (0x13 << LDST_SRCDST_SHIFT) | 223 | #define LDST_SRCDST_WORD_PKHA_E_SZ (0x13 << LDST_SRCDST_SHIFT) |
224 | #define LDST_SRCDST_WORD_DESCBUF (0x40 << LDST_SRCDST_SHIFT) | 224 | #define LDST_SRCDST_WORD_DESCBUF (0x40 << LDST_SRCDST_SHIFT) |
225 | #define LDST_SRCDST_WORD_INFO_FIFO (0x7a << LDST_SRCDST_SHIFT) | 225 | #define LDST_SRCDST_WORD_INFO_FIFO (0x7a << LDST_SRCDST_SHIFT) |
226 | 226 | ||
227 | /* Offset in source/destination */ | 227 | /* Offset in source/destination */ |
228 | #define LDST_OFFSET_SHIFT 8 | 228 | #define LDST_OFFSET_SHIFT 8 |
229 | #define LDST_OFFSET_MASK (0xff << LDST_OFFSET_SHIFT) | 229 | #define LDST_OFFSET_MASK (0xff << LDST_OFFSET_SHIFT) |
230 | 230 | ||
231 | /* LDOFF definitions used when DST = LDST_SRCDST_WORD_DECOCTRL */ | 231 | /* LDOFF definitions used when DST = LDST_SRCDST_WORD_DECOCTRL */ |
232 | /* These could also be shifted by LDST_OFFSET_SHIFT - this reads better */ | 232 | /* These could also be shifted by LDST_OFFSET_SHIFT - this reads better */ |
233 | #define LDOFF_CHG_SHARE_SHIFT 0 | 233 | #define LDOFF_CHG_SHARE_SHIFT 0 |
234 | #define LDOFF_CHG_SHARE_MASK (0x3 << LDOFF_CHG_SHARE_SHIFT) | 234 | #define LDOFF_CHG_SHARE_MASK (0x3 << LDOFF_CHG_SHARE_SHIFT) |
235 | #define LDOFF_CHG_SHARE_NEVER (0x1 << LDOFF_CHG_SHARE_SHIFT) | 235 | #define LDOFF_CHG_SHARE_NEVER (0x1 << LDOFF_CHG_SHARE_SHIFT) |
236 | #define LDOFF_CHG_SHARE_OK_NO_PROP (0x2 << LDOFF_CHG_SHARE_SHIFT) | 236 | #define LDOFF_CHG_SHARE_OK_PROP (0x2 << LDOFF_CHG_SHARE_SHIFT) |
237 | #define LDOFF_CHG_SHARE_OK_PROP (0x3 << LDOFF_CHG_SHARE_SHIFT) | 237 | #define LDOFF_CHG_SHARE_OK_NO_PROP (0x3 << LDOFF_CHG_SHARE_SHIFT) |
238 | 238 | ||
239 | #define LDOFF_ENABLE_AUTO_NFIFO (1 << 2) | 239 | #define LDOFF_ENABLE_AUTO_NFIFO (1 << 2) |
240 | #define LDOFF_DISABLE_AUTO_NFIFO (1 << 3) | 240 | #define LDOFF_DISABLE_AUTO_NFIFO (1 << 3) |
241 | 241 | ||
242 | #define LDOFF_CHG_NONSEQLIODN_SHIFT 4 | 242 | #define LDOFF_CHG_NONSEQLIODN_SHIFT 4 |
243 | #define LDOFF_CHG_NONSEQLIODN_MASK (0x3 << LDOFF_CHG_NONSEQLIODN_SHIFT) | 243 | #define LDOFF_CHG_NONSEQLIODN_MASK (0x3 << LDOFF_CHG_NONSEQLIODN_SHIFT) |
244 | #define LDOFF_CHG_NONSEQLIODN_SEQ (0x1 << LDOFF_CHG_NONSEQLIODN_SHIFT) | 244 | #define LDOFF_CHG_NONSEQLIODN_SEQ (0x1 << LDOFF_CHG_NONSEQLIODN_SHIFT) |
245 | #define LDOFF_CHG_NONSEQLIODN_NON_SEQ (0x2 << LDOFF_CHG_NONSEQLIODN_SHIFT) | 245 | #define LDOFF_CHG_NONSEQLIODN_NON_SEQ (0x2 << LDOFF_CHG_NONSEQLIODN_SHIFT) |
246 | #define LDOFF_CHG_NONSEQLIODN_TRUSTED (0x3 << LDOFF_CHG_NONSEQLIODN_SHIFT) | 246 | #define LDOFF_CHG_NONSEQLIODN_TRUSTED (0x3 << LDOFF_CHG_NONSEQLIODN_SHIFT) |
247 | 247 | ||
248 | #define LDOFF_CHG_SEQLIODN_SHIFT 6 | 248 | #define LDOFF_CHG_SEQLIODN_SHIFT 6 |
249 | #define LDOFF_CHG_SEQLIODN_MASK (0x3 << LDOFF_CHG_SEQLIODN_SHIFT) | 249 | #define LDOFF_CHG_SEQLIODN_MASK (0x3 << LDOFF_CHG_SEQLIODN_SHIFT) |
250 | #define LDOFF_CHG_SEQLIODN_SEQ (0x1 << LDOFF_CHG_SEQLIODN_SHIFT) | 250 | #define LDOFF_CHG_SEQLIODN_SEQ (0x1 << LDOFF_CHG_SEQLIODN_SHIFT) |
251 | #define LDOFF_CHG_SEQLIODN_NON_SEQ (0x2 << LDOFF_CHG_SEQLIODN_SHIFT) | 251 | #define LDOFF_CHG_SEQLIODN_NON_SEQ (0x2 << LDOFF_CHG_SEQLIODN_SHIFT) |
252 | #define LDOFF_CHG_SEQLIODN_TRUSTED (0x3 << LDOFF_CHG_SEQLIODN_SHIFT) | 252 | #define LDOFF_CHG_SEQLIODN_TRUSTED (0x3 << LDOFF_CHG_SEQLIODN_SHIFT) |
253 | 253 | ||
254 | /* Data length in bytes */ | 254 | /* Data length in bytes */ |
255 | #define LDST_LEN_SHIFT 0 | 255 | #define LDST_LEN_SHIFT 0 |
256 | #define LDST_LEN_MASK (0xff << LDST_LEN_SHIFT) | 256 | #define LDST_LEN_MASK (0xff << LDST_LEN_SHIFT) |
257 | 257 | ||
258 | /* Special Length definitions when dst=deco-ctrl */ | 258 | /* Special Length definitions when dst=deco-ctrl */ |
259 | #define LDLEN_ENABLE_OSL_COUNT (1 << 7) | 259 | #define LDLEN_ENABLE_OSL_COUNT (1 << 7) |
260 | #define LDLEN_RST_CHA_OFIFO_PTR (1 << 6) | 260 | #define LDLEN_RST_CHA_OFIFO_PTR (1 << 6) |
261 | #define LDLEN_RST_OFIFO (1 << 5) | 261 | #define LDLEN_RST_OFIFO (1 << 5) |
262 | #define LDLEN_SET_OFIFO_OFF_VALID (1 << 4) | 262 | #define LDLEN_SET_OFIFO_OFF_VALID (1 << 4) |
263 | #define LDLEN_SET_OFIFO_OFF_RSVD (1 << 3) | 263 | #define LDLEN_SET_OFIFO_OFF_RSVD (1 << 3) |
264 | #define LDLEN_SET_OFIFO_OFFSET_SHIFT 0 | 264 | #define LDLEN_SET_OFIFO_OFFSET_SHIFT 0 |
265 | #define LDLEN_SET_OFIFO_OFFSET_MASK (3 << LDLEN_SET_OFIFO_OFFSET_SHIFT) | 265 | #define LDLEN_SET_OFIFO_OFFSET_MASK (3 << LDLEN_SET_OFIFO_OFFSET_SHIFT) |
266 | 266 | ||
267 | /* | 267 | /* |
268 | * FIFO_LOAD/FIFO_STORE/SEQ_FIFO_LOAD/SEQ_FIFO_STORE | 268 | * FIFO_LOAD/FIFO_STORE/SEQ_FIFO_LOAD/SEQ_FIFO_STORE |
@@ -274,808 +274,808 @@ | |||
274 | * 1 = Load for Class1, 2 = Load for Class2, 3 = Load both | 274 | * 1 = Load for Class1, 2 = Load for Class2, 3 = Load both |
275 | * Store Source: 0 = normal, 1 = Class1key, 2 = Class2key | 275 | * Store Source: 0 = normal, 1 = Class1key, 2 = Class2key |
276 | */ | 276 | */ |
277 | #define FIFOLD_CLASS_SHIFT 25 | 277 | #define FIFOLD_CLASS_SHIFT 25 |
278 | #define FIFOLD_CLASS_MASK (0x03 << FIFOLD_CLASS_SHIFT) | 278 | #define FIFOLD_CLASS_MASK (0x03 << FIFOLD_CLASS_SHIFT) |
279 | #define FIFOLD_CLASS_SKIP (0x00 << FIFOLD_CLASS_SHIFT) | 279 | #define FIFOLD_CLASS_SKIP (0x00 << FIFOLD_CLASS_SHIFT) |
280 | #define FIFOLD_CLASS_CLASS1 (0x01 << FIFOLD_CLASS_SHIFT) | 280 | #define FIFOLD_CLASS_CLASS1 (0x01 << FIFOLD_CLASS_SHIFT) |
281 | #define FIFOLD_CLASS_CLASS2 (0x02 << FIFOLD_CLASS_SHIFT) | 281 | #define FIFOLD_CLASS_CLASS2 (0x02 << FIFOLD_CLASS_SHIFT) |
282 | #define FIFOLD_CLASS_BOTH (0x03 << FIFOLD_CLASS_SHIFT) | 282 | #define FIFOLD_CLASS_BOTH (0x03 << FIFOLD_CLASS_SHIFT) |
283 | 283 | ||
284 | #define FIFOST_CLASS_SHIFT 25 | 284 | #define FIFOST_CLASS_SHIFT 25 |
285 | #define FIFOST_CLASS_MASK (0x03 << FIFOST_CLASS_SHIFT) | 285 | #define FIFOST_CLASS_MASK (0x03 << FIFOST_CLASS_SHIFT) |
286 | #define FIFOST_CLASS_NORMAL (0x00 << FIFOST_CLASS_SHIFT) | 286 | #define FIFOST_CLASS_NORMAL (0x00 << FIFOST_CLASS_SHIFT) |
287 | #define FIFOST_CLASS_CLASS1KEY (0x01 << FIFOST_CLASS_SHIFT) | 287 | #define FIFOST_CLASS_CLASS1KEY (0x01 << FIFOST_CLASS_SHIFT) |
288 | #define FIFOST_CLASS_CLASS2KEY (0x02 << FIFOST_CLASS_SHIFT) | 288 | #define FIFOST_CLASS_CLASS2KEY (0x02 << FIFOST_CLASS_SHIFT) |
289 | 289 | ||
290 | /* | 290 | /* |
291 | * Scatter-Gather Table/Variable Length Field | 291 | * Scatter-Gather Table/Variable Length Field |
292 | * If set for FIFO_LOAD, refers to a SG table. Within | 292 | * If set for FIFO_LOAD, refers to a SG table. Within |
293 | * SEQ_FIFO_LOAD, is variable input sequence | 293 | * SEQ_FIFO_LOAD, is variable input sequence |
294 | */ | 294 | */ |
295 | #define FIFOLDST_SGF_SHIFT 24 | 295 | #define FIFOLDST_SGF_SHIFT 24 |
296 | #define FIFOLDST_SGF_MASK (1 << FIFOLDST_SGF_SHIFT) | 296 | #define FIFOLDST_SGF_MASK (1 << FIFOLDST_SGF_SHIFT) |
297 | #define FIFOLDST_VLF_MASK (1 << FIFOLDST_SGF_SHIFT) | 297 | #define FIFOLDST_VLF_MASK (1 << FIFOLDST_SGF_SHIFT) |
298 | #define FIFOLDST_SGF (1 << FIFOLDST_SGF_SHIFT) | 298 | #define FIFOLDST_SGF (1 << FIFOLDST_SGF_SHIFT) |
299 | #define FIFOLDST_VLF (1 << FIFOLDST_SGF_SHIFT) | 299 | #define FIFOLDST_VLF (1 << FIFOLDST_SGF_SHIFT) |
300 | 300 | ||
301 | /* Immediate - Data follows command in descriptor */ | 301 | /* Immediate - Data follows command in descriptor */ |
302 | #define FIFOLD_IMM_SHIFT 23 | 302 | #define FIFOLD_IMM_SHIFT 23 |
303 | #define FIFOLD_IMM_MASK (1 << FIFOLD_IMM_SHIFT) | 303 | #define FIFOLD_IMM_MASK (1 << FIFOLD_IMM_SHIFT) |
304 | #define FIFOLD_IMM (1 << FIFOLD_IMM_SHIFT) | 304 | #define FIFOLD_IMM (1 << FIFOLD_IMM_SHIFT) |
305 | 305 | ||
306 | /* Continue - Not the last FIFO store to come */ | 306 | /* Continue - Not the last FIFO store to come */ |
307 | #define FIFOST_CONT_SHIFT 23 | 307 | #define FIFOST_CONT_SHIFT 23 |
308 | #define FIFOST_CONT_MASK (1 << FIFOST_CONT_SHIFT) | 308 | #define FIFOST_CONT_MASK (1 << FIFOST_CONT_SHIFT) |
309 | #define FIFOST_CONT_MASK (1 << FIFOST_CONT_SHIFT) | 309 | #define FIFOST_CONT_MASK (1 << FIFOST_CONT_SHIFT) |
310 | 310 | ||
311 | /* | 311 | /* |
312 | * Extended Length - use 32-bit extended length that | 312 | * Extended Length - use 32-bit extended length that |
313 | * follows the pointer field. Illegal with IMM set | 313 | * follows the pointer field. Illegal with IMM set |
314 | */ | 314 | */ |
315 | #define FIFOLDST_EXT_SHIFT 22 | 315 | #define FIFOLDST_EXT_SHIFT 22 |
316 | #define FIFOLDST_EXT_MASK (1 << FIFOLDST_EXT_SHIFT) | 316 | #define FIFOLDST_EXT_MASK (1 << FIFOLDST_EXT_SHIFT) |
317 | #define FIFOLDST_EXT (1 << FIFOLDST_EXT_SHIFT) | 317 | #define FIFOLDST_EXT (1 << FIFOLDST_EXT_SHIFT) |
318 | 318 | ||
319 | /* Input data type.*/ | 319 | /* Input data type.*/ |
320 | #define FIFOLD_TYPE_SHIFT 16 | 320 | #define FIFOLD_TYPE_SHIFT 16 |
321 | #define FIFOLD_CONT_TYPE_SHIFT 19 /* shift past last-flush bits */ | 321 | #define FIFOLD_CONT_TYPE_SHIFT 19 /* shift past last-flush bits */ |
322 | #define FIFOLD_TYPE_MASK (0x3f << FIFOLD_TYPE_SHIFT) | 322 | #define FIFOLD_TYPE_MASK (0x3f << FIFOLD_TYPE_SHIFT) |
323 | 323 | ||
324 | /* PK types */ | 324 | /* PK types */ |
325 | #define FIFOLD_TYPE_PK (0x00 << FIFOLD_TYPE_SHIFT) | 325 | #define FIFOLD_TYPE_PK (0x00 << FIFOLD_TYPE_SHIFT) |
326 | #define FIFOLD_TYPE_PK_MASK (0x30 << FIFOLD_TYPE_SHIFT) | 326 | #define FIFOLD_TYPE_PK_MASK (0x30 << FIFOLD_TYPE_SHIFT) |
327 | #define FIFOLD_TYPE_PK_TYPEMASK (0x0f << FIFOLD_TYPE_SHIFT) | 327 | #define FIFOLD_TYPE_PK_TYPEMASK (0x0f << FIFOLD_TYPE_SHIFT) |
328 | #define FIFOLD_TYPE_PK_A0 (0x00 << FIFOLD_TYPE_SHIFT) | 328 | #define FIFOLD_TYPE_PK_A0 (0x00 << FIFOLD_TYPE_SHIFT) |
329 | #define FIFOLD_TYPE_PK_A1 (0x01 << FIFOLD_TYPE_SHIFT) | 329 | #define FIFOLD_TYPE_PK_A1 (0x01 << FIFOLD_TYPE_SHIFT) |
330 | #define FIFOLD_TYPE_PK_A2 (0x02 << FIFOLD_TYPE_SHIFT) | 330 | #define FIFOLD_TYPE_PK_A2 (0x02 << FIFOLD_TYPE_SHIFT) |
331 | #define FIFOLD_TYPE_PK_A3 (0x03 << FIFOLD_TYPE_SHIFT) | 331 | #define FIFOLD_TYPE_PK_A3 (0x03 << FIFOLD_TYPE_SHIFT) |
332 | #define FIFOLD_TYPE_PK_B0 (0x04 << FIFOLD_TYPE_SHIFT) | 332 | #define FIFOLD_TYPE_PK_B0 (0x04 << FIFOLD_TYPE_SHIFT) |
333 | #define FIFOLD_TYPE_PK_B1 (0x05 << FIFOLD_TYPE_SHIFT) | 333 | #define FIFOLD_TYPE_PK_B1 (0x05 << FIFOLD_TYPE_SHIFT) |
334 | #define FIFOLD_TYPE_PK_B2 (0x06 << FIFOLD_TYPE_SHIFT) | 334 | #define FIFOLD_TYPE_PK_B2 (0x06 << FIFOLD_TYPE_SHIFT) |
335 | #define FIFOLD_TYPE_PK_B3 (0x07 << FIFOLD_TYPE_SHIFT) | 335 | #define FIFOLD_TYPE_PK_B3 (0x07 << FIFOLD_TYPE_SHIFT) |
336 | #define FIFOLD_TYPE_PK_N (0x08 << FIFOLD_TYPE_SHIFT) | 336 | #define FIFOLD_TYPE_PK_N (0x08 << FIFOLD_TYPE_SHIFT) |
337 | #define FIFOLD_TYPE_PK_A (0x0c << FIFOLD_TYPE_SHIFT) | 337 | #define FIFOLD_TYPE_PK_A (0x0c << FIFOLD_TYPE_SHIFT) |
338 | #define FIFOLD_TYPE_PK_B (0x0d << FIFOLD_TYPE_SHIFT) | 338 | #define FIFOLD_TYPE_PK_B (0x0d << FIFOLD_TYPE_SHIFT) |
339 | 339 | ||
340 | /* Other types. Need to OR in last/flush bits as desired */ | 340 | /* Other types. Need to OR in last/flush bits as desired */ |
341 | #define FIFOLD_TYPE_MSG_MASK (0x38 << FIFOLD_TYPE_SHIFT) | 341 | #define FIFOLD_TYPE_MSG_MASK (0x38 << FIFOLD_TYPE_SHIFT) |
342 | #define FIFOLD_TYPE_MSG (0x10 << FIFOLD_TYPE_SHIFT) | 342 | #define FIFOLD_TYPE_MSG (0x10 << FIFOLD_TYPE_SHIFT) |
343 | #define FIFOLD_TYPE_MSG1OUT2 (0x18 << FIFOLD_TYPE_SHIFT) | 343 | #define FIFOLD_TYPE_MSG1OUT2 (0x18 << FIFOLD_TYPE_SHIFT) |
344 | #define FIFOLD_TYPE_IV (0x20 << FIFOLD_TYPE_SHIFT) | 344 | #define FIFOLD_TYPE_IV (0x20 << FIFOLD_TYPE_SHIFT) |
345 | #define FIFOLD_TYPE_BITDATA (0x28 << FIFOLD_TYPE_SHIFT) | 345 | #define FIFOLD_TYPE_BITDATA (0x28 << FIFOLD_TYPE_SHIFT) |
346 | #define FIFOLD_TYPE_AAD (0x30 << FIFOLD_TYPE_SHIFT) | 346 | #define FIFOLD_TYPE_AAD (0x30 << FIFOLD_TYPE_SHIFT) |
347 | #define FIFOLD_TYPE_ICV (0x38 << FIFOLD_TYPE_SHIFT) | 347 | #define FIFOLD_TYPE_ICV (0x38 << FIFOLD_TYPE_SHIFT) |
348 | 348 | ||
349 | /* Last/Flush bits for use with "other" types above */ | 349 | /* Last/Flush bits for use with "other" types above */ |
350 | #define FIFOLD_TYPE_ACT_MASK (0x07 << FIFOLD_TYPE_SHIFT) | 350 | #define FIFOLD_TYPE_ACT_MASK (0x07 << FIFOLD_TYPE_SHIFT) |
351 | #define FIFOLD_TYPE_NOACTION (0x00 << FIFOLD_TYPE_SHIFT) | 351 | #define FIFOLD_TYPE_NOACTION (0x00 << FIFOLD_TYPE_SHIFT) |
352 | #define FIFOLD_TYPE_FLUSH1 (0x01 << FIFOLD_TYPE_SHIFT) | 352 | #define FIFOLD_TYPE_FLUSH1 (0x01 << FIFOLD_TYPE_SHIFT) |
353 | #define FIFOLD_TYPE_LAST1 (0x02 << FIFOLD_TYPE_SHIFT) | 353 | #define FIFOLD_TYPE_LAST1 (0x02 << FIFOLD_TYPE_SHIFT) |
354 | #define FIFOLD_TYPE_LAST2FLUSH (0x03 << FIFOLD_TYPE_SHIFT) | 354 | #define FIFOLD_TYPE_LAST2FLUSH (0x03 << FIFOLD_TYPE_SHIFT) |
355 | #define FIFOLD_TYPE_LAST2 (0x04 << FIFOLD_TYPE_SHIFT) | 355 | #define FIFOLD_TYPE_LAST2 (0x04 << FIFOLD_TYPE_SHIFT) |
356 | #define FIFOLD_TYPE_LAST2FLUSH1 (0x05 << FIFOLD_TYPE_SHIFT) | 356 | #define FIFOLD_TYPE_LAST2FLUSH1 (0x05 << FIFOLD_TYPE_SHIFT) |
357 | #define FIFOLD_TYPE_LASTBOTH (0x06 << FIFOLD_TYPE_SHIFT) | 357 | #define FIFOLD_TYPE_LASTBOTH (0x06 << FIFOLD_TYPE_SHIFT) |
358 | #define FIFOLD_TYPE_LASTBOTHFL (0x07 << FIFOLD_TYPE_SHIFT) | 358 | #define FIFOLD_TYPE_LASTBOTHFL (0x07 << FIFOLD_TYPE_SHIFT) |
359 | 359 | ||
360 | #define FIFOLDST_LEN_MASK 0xffff | 360 | #define FIFOLDST_LEN_MASK 0xffff |
361 | #define FIFOLDST_EXT_LEN_MASK 0xffffffff | 361 | #define FIFOLDST_EXT_LEN_MASK 0xffffffff |
362 | 362 | ||
363 | /* Output data types */ | 363 | /* Output data types */ |
364 | #define FIFOST_TYPE_SHIFT 16 | 364 | #define FIFOST_TYPE_SHIFT 16 |
365 | #define FIFOST_TYPE_MASK (0x3f << FIFOST_TYPE_SHIFT) | 365 | #define FIFOST_TYPE_MASK (0x3f << FIFOST_TYPE_SHIFT) |
366 | 366 | ||
367 | #define FIFOST_TYPE_PKHA_A0 (0x00 << FIFOST_TYPE_SHIFT) | 367 | #define FIFOST_TYPE_PKHA_A0 (0x00 << FIFOST_TYPE_SHIFT) |
368 | #define FIFOST_TYPE_PKHA_A1 (0x01 << FIFOST_TYPE_SHIFT) | 368 | #define FIFOST_TYPE_PKHA_A1 (0x01 << FIFOST_TYPE_SHIFT) |
369 | #define FIFOST_TYPE_PKHA_A2 (0x02 << FIFOST_TYPE_SHIFT) | 369 | #define FIFOST_TYPE_PKHA_A2 (0x02 << FIFOST_TYPE_SHIFT) |
370 | #define FIFOST_TYPE_PKHA_A3 (0x03 << FIFOST_TYPE_SHIFT) | 370 | #define FIFOST_TYPE_PKHA_A3 (0x03 << FIFOST_TYPE_SHIFT) |
371 | #define FIFOST_TYPE_PKHA_B0 (0x04 << FIFOST_TYPE_SHIFT) | 371 | #define FIFOST_TYPE_PKHA_B0 (0x04 << FIFOST_TYPE_SHIFT) |
372 | #define FIFOST_TYPE_PKHA_B1 (0x05 << FIFOST_TYPE_SHIFT) | 372 | #define FIFOST_TYPE_PKHA_B1 (0x05 << FIFOST_TYPE_SHIFT) |
373 | #define FIFOST_TYPE_PKHA_B2 (0x06 << FIFOST_TYPE_SHIFT) | 373 | #define FIFOST_TYPE_PKHA_B2 (0x06 << FIFOST_TYPE_SHIFT) |
374 | #define FIFOST_TYPE_PKHA_B3 (0x07 << FIFOST_TYPE_SHIFT) | 374 | #define FIFOST_TYPE_PKHA_B3 (0x07 << FIFOST_TYPE_SHIFT) |
375 | #define FIFOST_TYPE_PKHA_N (0x08 << FIFOST_TYPE_SHIFT) | 375 | #define FIFOST_TYPE_PKHA_N (0x08 << FIFOST_TYPE_SHIFT) |
376 | #define FIFOST_TYPE_PKHA_A (0x0c << FIFOST_TYPE_SHIFT) | 376 | #define FIFOST_TYPE_PKHA_A (0x0c << FIFOST_TYPE_SHIFT) |
377 | #define FIFOST_TYPE_PKHA_B (0x0d << FIFOST_TYPE_SHIFT) | 377 | #define FIFOST_TYPE_PKHA_B (0x0d << FIFOST_TYPE_SHIFT) |
378 | #define FIFOST_TYPE_AF_SBOX_JKEK (0x10 << FIFOST_TYPE_SHIFT) | 378 | #define FIFOST_TYPE_AF_SBOX_JKEK (0x10 << FIFOST_TYPE_SHIFT) |
379 | #define FIFOST_TYPE_AF_SBOX_TKEK (0x21 << FIFOST_TYPE_SHIFT) | 379 | #define FIFOST_TYPE_AF_SBOX_TKEK (0x21 << FIFOST_TYPE_SHIFT) |
380 | #define FIFOST_TYPE_PKHA_E_JKEK (0x22 << FIFOST_TYPE_SHIFT) | 380 | #define FIFOST_TYPE_PKHA_E_JKEK (0x22 << FIFOST_TYPE_SHIFT) |
381 | #define FIFOST_TYPE_PKHA_E_TKEK (0x23 << FIFOST_TYPE_SHIFT) | 381 | #define FIFOST_TYPE_PKHA_E_TKEK (0x23 << FIFOST_TYPE_SHIFT) |
382 | #define FIFOST_TYPE_KEY_KEK (0x24 << FIFOST_TYPE_SHIFT) | 382 | #define FIFOST_TYPE_KEY_KEK (0x24 << FIFOST_TYPE_SHIFT) |
383 | #define FIFOST_TYPE_KEY_TKEK (0x25 << FIFOST_TYPE_SHIFT) | 383 | #define FIFOST_TYPE_KEY_TKEK (0x25 << FIFOST_TYPE_SHIFT) |
384 | #define FIFOST_TYPE_SPLIT_KEK (0x26 << FIFOST_TYPE_SHIFT) | 384 | #define FIFOST_TYPE_SPLIT_KEK (0x26 << FIFOST_TYPE_SHIFT) |
385 | #define FIFOST_TYPE_SPLIT_TKEK (0x27 << FIFOST_TYPE_SHIFT) | 385 | #define FIFOST_TYPE_SPLIT_TKEK (0x27 << FIFOST_TYPE_SHIFT) |
386 | #define FIFOST_TYPE_OUTFIFO_KEK (0x28 << FIFOST_TYPE_SHIFT) | 386 | #define FIFOST_TYPE_OUTFIFO_KEK (0x28 << FIFOST_TYPE_SHIFT) |
387 | #define FIFOST_TYPE_OUTFIFO_TKEK (0x29 << FIFOST_TYPE_SHIFT) | 387 | #define FIFOST_TYPE_OUTFIFO_TKEK (0x29 << FIFOST_TYPE_SHIFT) |
388 | #define FIFOST_TYPE_MESSAGE_DATA (0x30 << FIFOST_TYPE_SHIFT) | 388 | #define FIFOST_TYPE_MESSAGE_DATA (0x30 << FIFOST_TYPE_SHIFT) |
389 | #define FIFOST_TYPE_RNGSTORE (0x34 << FIFOST_TYPE_SHIFT) | 389 | #define FIFOST_TYPE_RNGSTORE (0x34 << FIFOST_TYPE_SHIFT) |
390 | #define FIFOST_TYPE_RNGFIFO (0x35 << FIFOST_TYPE_SHIFT) | 390 | #define FIFOST_TYPE_RNGFIFO (0x35 << FIFOST_TYPE_SHIFT) |
391 | #define FIFOST_TYPE_SKIP (0x3f << FIFOST_TYPE_SHIFT) | 391 | #define FIFOST_TYPE_SKIP (0x3f << FIFOST_TYPE_SHIFT) |
392 | 392 | ||
393 | /* | 393 | /* |
394 | * OPERATION Command Constructs | 394 | * OPERATION Command Constructs |
395 | */ | 395 | */ |
396 | 396 | ||
397 | /* Operation type selectors - OP TYPE */ | 397 | /* Operation type selectors - OP TYPE */ |
398 | #define OP_TYPE_SHIFT 24 | 398 | #define OP_TYPE_SHIFT 24 |
399 | #define OP_TYPE_MASK (0x07 << OP_TYPE_SHIFT) | 399 | #define OP_TYPE_MASK (0x07 << OP_TYPE_SHIFT) |
400 | 400 | ||
401 | #define OP_TYPE_UNI_PROTOCOL (0x00 << OP_TYPE_SHIFT) | 401 | #define OP_TYPE_UNI_PROTOCOL (0x00 << OP_TYPE_SHIFT) |
402 | #define OP_TYPE_PK (0x01 << OP_TYPE_SHIFT) | 402 | #define OP_TYPE_PK (0x01 << OP_TYPE_SHIFT) |
403 | #define OP_TYPE_CLASS1_ALG (0x02 << OP_TYPE_SHIFT) | 403 | #define OP_TYPE_CLASS1_ALG (0x02 << OP_TYPE_SHIFT) |
404 | #define OP_TYPE_CLASS2_ALG (0x04 << OP_TYPE_SHIFT) | 404 | #define OP_TYPE_CLASS2_ALG (0x04 << OP_TYPE_SHIFT) |
405 | #define OP_TYPE_DECAP_PROTOCOL (0x06 << OP_TYPE_SHIFT) | 405 | #define OP_TYPE_DECAP_PROTOCOL (0x06 << OP_TYPE_SHIFT) |
406 | #define OP_TYPE_ENCAP_PROTOCOL (0x07 << OP_TYPE_SHIFT) | 406 | #define OP_TYPE_ENCAP_PROTOCOL (0x07 << OP_TYPE_SHIFT) |
407 | 407 | ||
408 | /* ProtocolID selectors - PROTID */ | 408 | /* ProtocolID selectors - PROTID */ |
409 | #define OP_PCLID_SHIFT 16 | 409 | #define OP_PCLID_SHIFT 16 |
410 | #define OP_PCLID_MASK (0xff << 16) | 410 | #define OP_PCLID_MASK (0xff << 16) |
411 | 411 | ||
412 | /* Assuming OP_TYPE = OP_TYPE_UNI_PROTOCOL */ | 412 | /* Assuming OP_TYPE = OP_TYPE_UNI_PROTOCOL */ |
413 | #define OP_PCLID_IKEV1_PRF (0x01 << OP_PCLID_SHIFT) | 413 | #define OP_PCLID_IKEV1_PRF (0x01 << OP_PCLID_SHIFT) |
414 | #define OP_PCLID_IKEV2_PRF (0x02 << OP_PCLID_SHIFT) | 414 | #define OP_PCLID_IKEV2_PRF (0x02 << OP_PCLID_SHIFT) |
415 | #define OP_PCLID_SSL30_PRF (0x08 << OP_PCLID_SHIFT) | 415 | #define OP_PCLID_SSL30_PRF (0x08 << OP_PCLID_SHIFT) |
416 | #define OP_PCLID_TLS10_PRF (0x09 << OP_PCLID_SHIFT) | 416 | #define OP_PCLID_TLS10_PRF (0x09 << OP_PCLID_SHIFT) |
417 | #define OP_PCLID_TLS11_PRF (0x0a << OP_PCLID_SHIFT) | 417 | #define OP_PCLID_TLS11_PRF (0x0a << OP_PCLID_SHIFT) |
418 | #define OP_PCLID_DTLS10_PRF (0x0c << OP_PCLID_SHIFT) | 418 | #define OP_PCLID_DTLS10_PRF (0x0c << OP_PCLID_SHIFT) |
419 | #define OP_PCLID_PRF (0x06 << OP_PCLID_SHIFT) | 419 | #define OP_PCLID_PRF (0x06 << OP_PCLID_SHIFT) |
420 | #define OP_PCLID_BLOB (0x0d << OP_PCLID_SHIFT) | 420 | #define OP_PCLID_BLOB (0x0d << OP_PCLID_SHIFT) |
421 | #define OP_PCLID_SECRETKEY (0x11 << OP_PCLID_SHIFT) | 421 | #define OP_PCLID_SECRETKEY (0x11 << OP_PCLID_SHIFT) |
422 | #define OP_PCLID_PUBLICKEYPAIR (0x14 << OP_PCLID_SHIFT) | 422 | #define OP_PCLID_PUBLICKEYPAIR (0x14 << OP_PCLID_SHIFT) |
423 | #define OP_PCLID_DSASIGN (0x15 << OP_PCLID_SHIFT) | 423 | #define OP_PCLID_DSASIGN (0x15 << OP_PCLID_SHIFT) |
424 | #define OP_PCLID_DSAVERIFY (0x16 << OP_PCLID_SHIFT) | 424 | #define OP_PCLID_DSAVERIFY (0x16 << OP_PCLID_SHIFT) |
425 | 425 | ||
426 | /* Assuming OP_TYPE = OP_TYPE_DECAP_PROTOCOL/ENCAP_PROTOCOL */ | 426 | /* Assuming OP_TYPE = OP_TYPE_DECAP_PROTOCOL/ENCAP_PROTOCOL */ |
427 | #define OP_PCLID_IPSEC (0x01 << OP_PCLID_SHIFT) | 427 | #define OP_PCLID_IPSEC (0x01 << OP_PCLID_SHIFT) |
428 | #define OP_PCLID_SRTP (0x02 << OP_PCLID_SHIFT) | 428 | #define OP_PCLID_SRTP (0x02 << OP_PCLID_SHIFT) |
429 | #define OP_PCLID_MACSEC (0x03 << OP_PCLID_SHIFT) | 429 | #define OP_PCLID_MACSEC (0x03 << OP_PCLID_SHIFT) |
430 | #define OP_PCLID_WIFI (0x04 << OP_PCLID_SHIFT) | 430 | #define OP_PCLID_WIFI (0x04 << OP_PCLID_SHIFT) |
431 | #define OP_PCLID_WIMAX (0x05 << OP_PCLID_SHIFT) | 431 | #define OP_PCLID_WIMAX (0x05 << OP_PCLID_SHIFT) |
432 | #define OP_PCLID_SSL30 (0x08 << OP_PCLID_SHIFT) | 432 | #define OP_PCLID_SSL30 (0x08 << OP_PCLID_SHIFT) |
433 | #define OP_PCLID_TLS10 (0x09 << OP_PCLID_SHIFT) | 433 | #define OP_PCLID_TLS10 (0x09 << OP_PCLID_SHIFT) |
434 | #define OP_PCLID_TLS11 (0x0a << OP_PCLID_SHIFT) | 434 | #define OP_PCLID_TLS11 (0x0a << OP_PCLID_SHIFT) |
435 | #define OP_PCLID_TLS12 (0x0b << OP_PCLID_SHIFT) | 435 | #define OP_PCLID_TLS12 (0x0b << OP_PCLID_SHIFT) |
436 | #define OP_PCLID_DTLS (0x0c << OP_PCLID_SHIFT) | 436 | #define OP_PCLID_DTLS (0x0c << OP_PCLID_SHIFT) |
437 | 437 | ||
438 | /* | 438 | /* |
439 | * ProtocolInfo selectors | 439 | * ProtocolInfo selectors |
440 | */ | 440 | */ |
441 | #define OP_PCLINFO_MASK 0xffff | 441 | #define OP_PCLINFO_MASK 0xffff |
442 | 442 | ||
443 | /* for OP_PCLID_IPSEC */ | 443 | /* for OP_PCLID_IPSEC */ |
444 | #define OP_PCL_IPSEC_CIPHER_MASK 0xff00 | 444 | #define OP_PCL_IPSEC_CIPHER_MASK 0xff00 |
445 | #define OP_PCL_IPSEC_AUTH_MASK 0x00ff | 445 | #define OP_PCL_IPSEC_AUTH_MASK 0x00ff |
446 | 446 | ||
447 | #define OP_PCL_IPSEC_DES_IV64 0x0100 | 447 | #define OP_PCL_IPSEC_DES_IV64 0x0100 |
448 | #define OP_PCL_IPSEC_DES 0x0200 | 448 | #define OP_PCL_IPSEC_DES 0x0200 |
449 | #define OP_PCL_IPSEC_3DES 0x0300 | 449 | #define OP_PCL_IPSEC_3DES 0x0300 |
450 | #define OP_PCL_IPSEC_AES_CBC 0x0c00 | 450 | #define OP_PCL_IPSEC_AES_CBC 0x0c00 |
451 | #define OP_PCL_IPSEC_AES_CTR 0x0d00 | 451 | #define OP_PCL_IPSEC_AES_CTR 0x0d00 |
452 | #define OP_PCL_IPSEC_AES_XTS 0x1600 | 452 | #define OP_PCL_IPSEC_AES_XTS 0x1600 |
453 | #define OP_PCL_IPSEC_AES_CCM8 0x0e00 | 453 | #define OP_PCL_IPSEC_AES_CCM8 0x0e00 |
454 | #define OP_PCL_IPSEC_AES_CCM12 0x0f00 | 454 | #define OP_PCL_IPSEC_AES_CCM12 0x0f00 |
455 | #define OP_PCL_IPSEC_AES_CCM16 0x1000 | 455 | #define OP_PCL_IPSEC_AES_CCM16 0x1000 |
456 | #define OP_PCL_IPSEC_AES_GCM8 0x1200 | 456 | #define OP_PCL_IPSEC_AES_GCM8 0x1200 |
457 | #define OP_PCL_IPSEC_AES_GCM12 0x1300 | 457 | #define OP_PCL_IPSEC_AES_GCM12 0x1300 |
458 | #define OP_PCL_IPSEC_AES_GCM16 0x1400 | 458 | #define OP_PCL_IPSEC_AES_GCM16 0x1400 |
459 | 459 | ||
460 | #define OP_PCL_IPSEC_HMAC_NULL 0x0000 | 460 | #define OP_PCL_IPSEC_HMAC_NULL 0x0000 |
461 | #define OP_PCL_IPSEC_HMAC_MD5_96 0x0001 | 461 | #define OP_PCL_IPSEC_HMAC_MD5_96 0x0001 |
462 | #define OP_PCL_IPSEC_HMAC_SHA1_96 0x0002 | 462 | #define OP_PCL_IPSEC_HMAC_SHA1_96 0x0002 |
463 | #define OP_PCL_IPSEC_AES_XCBC_MAC_96 0x0005 | 463 | #define OP_PCL_IPSEC_AES_XCBC_MAC_96 0x0005 |
464 | #define OP_PCL_IPSEC_HMAC_MD5_128 0x0006 | 464 | #define OP_PCL_IPSEC_HMAC_MD5_128 0x0006 |
465 | #define OP_PCL_IPSEC_HMAC_SHA1_160 0x0007 | 465 | #define OP_PCL_IPSEC_HMAC_SHA1_160 0x0007 |
466 | #define OP_PCL_IPSEC_HMAC_SHA2_256_128 0x000c | 466 | #define OP_PCL_IPSEC_HMAC_SHA2_256_128 0x000c |
467 | #define OP_PCL_IPSEC_HMAC_SHA2_384_192 0x000d | 467 | #define OP_PCL_IPSEC_HMAC_SHA2_384_192 0x000d |
468 | #define OP_PCL_IPSEC_HMAC_SHA2_512_256 0x000e | 468 | #define OP_PCL_IPSEC_HMAC_SHA2_512_256 0x000e |
469 | 469 | ||
470 | /* For SRTP - OP_PCLID_SRTP */ | 470 | /* For SRTP - OP_PCLID_SRTP */ |
471 | #define OP_PCL_SRTP_CIPHER_MASK 0xff00 | 471 | #define OP_PCL_SRTP_CIPHER_MASK 0xff00 |
472 | #define OP_PCL_SRTP_AUTH_MASK 0x00ff | 472 | #define OP_PCL_SRTP_AUTH_MASK 0x00ff |
473 | 473 | ||
474 | #define OP_PCL_SRTP_AES_CTR 0x0d00 | 474 | #define OP_PCL_SRTP_AES_CTR 0x0d00 |
475 | 475 | ||
476 | #define OP_PCL_SRTP_HMAC_SHA1_160 0x0007 | 476 | #define OP_PCL_SRTP_HMAC_SHA1_160 0x0007 |
477 | 477 | ||
478 | /* For SSL 3.0 - OP_PCLID_SSL30 */ | 478 | /* For SSL 3.0 - OP_PCLID_SSL30 */ |
479 | #define OP_PCL_SSL30_AES_128_CBC_SHA 0x002f | 479 | #define OP_PCL_SSL30_AES_128_CBC_SHA 0x002f |
480 | #define OP_PCL_SSL30_AES_128_CBC_SHA_2 0x0030 | 480 | #define OP_PCL_SSL30_AES_128_CBC_SHA_2 0x0030 |
481 | #define OP_PCL_SSL30_AES_128_CBC_SHA_3 0x0031 | 481 | #define OP_PCL_SSL30_AES_128_CBC_SHA_3 0x0031 |
482 | #define OP_PCL_SSL30_AES_128_CBC_SHA_4 0x0032 | 482 | #define OP_PCL_SSL30_AES_128_CBC_SHA_4 0x0032 |
483 | #define OP_PCL_SSL30_AES_128_CBC_SHA_5 0x0033 | 483 | #define OP_PCL_SSL30_AES_128_CBC_SHA_5 0x0033 |
484 | #define OP_PCL_SSL30_AES_128_CBC_SHA_6 0x0034 | 484 | #define OP_PCL_SSL30_AES_128_CBC_SHA_6 0x0034 |
485 | #define OP_PCL_SSL30_AES_128_CBC_SHA_7 0x008c | 485 | #define OP_PCL_SSL30_AES_128_CBC_SHA_7 0x008c |
486 | #define OP_PCL_SSL30_AES_128_CBC_SHA_8 0x0090 | 486 | #define OP_PCL_SSL30_AES_128_CBC_SHA_8 0x0090 |
487 | #define OP_PCL_SSL30_AES_128_CBC_SHA_9 0x0094 | 487 | #define OP_PCL_SSL30_AES_128_CBC_SHA_9 0x0094 |
488 | #define OP_PCL_SSL30_AES_128_CBC_SHA_10 0xc004 | 488 | #define OP_PCL_SSL30_AES_128_CBC_SHA_10 0xc004 |
489 | #define OP_PCL_SSL30_AES_128_CBC_SHA_11 0xc009 | 489 | #define OP_PCL_SSL30_AES_128_CBC_SHA_11 0xc009 |
490 | #define OP_PCL_SSL30_AES_128_CBC_SHA_12 0xc00e | 490 | #define OP_PCL_SSL30_AES_128_CBC_SHA_12 0xc00e |
491 | #define OP_PCL_SSL30_AES_128_CBC_SHA_13 0xc013 | 491 | #define OP_PCL_SSL30_AES_128_CBC_SHA_13 0xc013 |
492 | #define OP_PCL_SSL30_AES_128_CBC_SHA_14 0xc018 | 492 | #define OP_PCL_SSL30_AES_128_CBC_SHA_14 0xc018 |
493 | #define OP_PCL_SSL30_AES_128_CBC_SHA_15 0xc01d | 493 | #define OP_PCL_SSL30_AES_128_CBC_SHA_15 0xc01d |
494 | #define OP_PCL_SSL30_AES_128_CBC_SHA_16 0xc01e | 494 | #define OP_PCL_SSL30_AES_128_CBC_SHA_16 0xc01e |
495 | #define OP_PCL_SSL30_AES_128_CBC_SHA_17 0xc01f | 495 | #define OP_PCL_SSL30_AES_128_CBC_SHA_17 0xc01f |
496 | 496 | ||
497 | #define OP_PCL_SSL30_AES_256_CBC_SHA 0x0035 | 497 | #define OP_PCL_SSL30_AES_256_CBC_SHA 0x0035 |
498 | #define OP_PCL_SSL30_AES_256_CBC_SHA_2 0x0036 | 498 | #define OP_PCL_SSL30_AES_256_CBC_SHA_2 0x0036 |
499 | #define OP_PCL_SSL30_AES_256_CBC_SHA_3 0x0037 | 499 | #define OP_PCL_SSL30_AES_256_CBC_SHA_3 0x0037 |
500 | #define OP_PCL_SSL30_AES_256_CBC_SHA_4 0x0038 | 500 | #define OP_PCL_SSL30_AES_256_CBC_SHA_4 0x0038 |
501 | #define OP_PCL_SSL30_AES_256_CBC_SHA_5 0x0039 | 501 | #define OP_PCL_SSL30_AES_256_CBC_SHA_5 0x0039 |
502 | #define OP_PCL_SSL30_AES_256_CBC_SHA_6 0x003a | 502 | #define OP_PCL_SSL30_AES_256_CBC_SHA_6 0x003a |
503 | #define OP_PCL_SSL30_AES_256_CBC_SHA_7 0x008d | 503 | #define OP_PCL_SSL30_AES_256_CBC_SHA_7 0x008d |
504 | #define OP_PCL_SSL30_AES_256_CBC_SHA_8 0x0091 | 504 | #define OP_PCL_SSL30_AES_256_CBC_SHA_8 0x0091 |
505 | #define OP_PCL_SSL30_AES_256_CBC_SHA_9 0x0095 | 505 | #define OP_PCL_SSL30_AES_256_CBC_SHA_9 0x0095 |
506 | #define OP_PCL_SSL30_AES_256_CBC_SHA_10 0xc005 | 506 | #define OP_PCL_SSL30_AES_256_CBC_SHA_10 0xc005 |
507 | #define OP_PCL_SSL30_AES_256_CBC_SHA_11 0xc00a | 507 | #define OP_PCL_SSL30_AES_256_CBC_SHA_11 0xc00a |
508 | #define OP_PCL_SSL30_AES_256_CBC_SHA_12 0xc00f | 508 | #define OP_PCL_SSL30_AES_256_CBC_SHA_12 0xc00f |
509 | #define OP_PCL_SSL30_AES_256_CBC_SHA_13 0xc014 | 509 | #define OP_PCL_SSL30_AES_256_CBC_SHA_13 0xc014 |
510 | #define OP_PCL_SSL30_AES_256_CBC_SHA_14 0xc019 | 510 | #define OP_PCL_SSL30_AES_256_CBC_SHA_14 0xc019 |
511 | #define OP_PCL_SSL30_AES_256_CBC_SHA_15 0xc020 | 511 | #define OP_PCL_SSL30_AES_256_CBC_SHA_15 0xc020 |
512 | #define OP_PCL_SSL30_AES_256_CBC_SHA_16 0xc021 | 512 | #define OP_PCL_SSL30_AES_256_CBC_SHA_16 0xc021 |
513 | #define OP_PCL_SSL30_AES_256_CBC_SHA_17 0xc022 | 513 | #define OP_PCL_SSL30_AES_256_CBC_SHA_17 0xc022 |
514 | 514 | ||
515 | #define OP_PCL_SSL30_3DES_EDE_CBC_MD5 0x0023 | 515 | #define OP_PCL_SSL30_3DES_EDE_CBC_MD5 0x0023 |
516 | 516 | ||
517 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA 0x001f | 517 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA 0x001f |
518 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_2 0x008b | 518 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_2 0x008b |
519 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_3 0x008f | 519 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_3 0x008f |
520 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_4 0x0093 | 520 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_4 0x0093 |
521 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_5 0x000a | 521 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_5 0x000a |
522 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_6 0x000d | 522 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_6 0x000d |
523 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_7 0x0010 | 523 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_7 0x0010 |
524 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_8 0x0013 | 524 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_8 0x0013 |
525 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_9 0x0016 | 525 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_9 0x0016 |
526 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_10 0x001b | 526 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_10 0x001b |
527 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_11 0xc003 | 527 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_11 0xc003 |
528 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_12 0xc008 | 528 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_12 0xc008 |
529 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_13 0xc00d | 529 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_13 0xc00d |
530 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_14 0xc012 | 530 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_14 0xc012 |
531 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_15 0xc017 | 531 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_15 0xc017 |
532 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_16 0xc01a | 532 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_16 0xc01a |
533 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_17 0xc01b | 533 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_17 0xc01b |
534 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_18 0xc01c | 534 | #define OP_PCL_SSL30_3DES_EDE_CBC_SHA_18 0xc01c |
535 | 535 | ||
536 | #define OP_PCL_SSL30_DES40_CBC_MD5 0x0029 | 536 | #define OP_PCL_SSL30_DES40_CBC_MD5 0x0029 |
537 | 537 | ||
538 | #define OP_PCL_SSL30_DES_CBC_MD5 0x0022 | 538 | #define OP_PCL_SSL30_DES_CBC_MD5 0x0022 |
539 | 539 | ||
540 | #define OP_PCL_SSL30_DES40_CBC_SHA 0x0008 | 540 | #define OP_PCL_SSL30_DES40_CBC_SHA 0x0008 |
541 | #define OP_PCL_SSL30_DES40_CBC_SHA_2 0x000b | 541 | #define OP_PCL_SSL30_DES40_CBC_SHA_2 0x000b |
542 | #define OP_PCL_SSL30_DES40_CBC_SHA_3 0x000e | 542 | #define OP_PCL_SSL30_DES40_CBC_SHA_3 0x000e |
543 | #define OP_PCL_SSL30_DES40_CBC_SHA_4 0x0011 | 543 | #define OP_PCL_SSL30_DES40_CBC_SHA_4 0x0011 |
544 | #define OP_PCL_SSL30_DES40_CBC_SHA_5 0x0014 | 544 | #define OP_PCL_SSL30_DES40_CBC_SHA_5 0x0014 |
545 | #define OP_PCL_SSL30_DES40_CBC_SHA_6 0x0019 | 545 | #define OP_PCL_SSL30_DES40_CBC_SHA_6 0x0019 |
546 | #define OP_PCL_SSL30_DES40_CBC_SHA_7 0x0026 | 546 | #define OP_PCL_SSL30_DES40_CBC_SHA_7 0x0026 |
547 | 547 | ||
548 | #define OP_PCL_SSL30_DES_CBC_SHA 0x001e | 548 | #define OP_PCL_SSL30_DES_CBC_SHA 0x001e |
549 | #define OP_PCL_SSL30_DES_CBC_SHA_2 0x0009 | 549 | #define OP_PCL_SSL30_DES_CBC_SHA_2 0x0009 |
550 | #define OP_PCL_SSL30_DES_CBC_SHA_3 0x000c | 550 | #define OP_PCL_SSL30_DES_CBC_SHA_3 0x000c |
551 | #define OP_PCL_SSL30_DES_CBC_SHA_4 0x000f | 551 | #define OP_PCL_SSL30_DES_CBC_SHA_4 0x000f |
552 | #define OP_PCL_SSL30_DES_CBC_SHA_5 0x0012 | 552 | #define OP_PCL_SSL30_DES_CBC_SHA_5 0x0012 |
553 | #define OP_PCL_SSL30_DES_CBC_SHA_6 0x0015 | 553 | #define OP_PCL_SSL30_DES_CBC_SHA_6 0x0015 |
554 | #define OP_PCL_SSL30_DES_CBC_SHA_7 0x001a | 554 | #define OP_PCL_SSL30_DES_CBC_SHA_7 0x001a |
555 | 555 | ||
556 | #define OP_PCL_SSL30_RC4_128_MD5 0x0024 | 556 | #define OP_PCL_SSL30_RC4_128_MD5 0x0024 |
557 | #define OP_PCL_SSL30_RC4_128_MD5_2 0x0004 | 557 | #define OP_PCL_SSL30_RC4_128_MD5_2 0x0004 |
558 | #define OP_PCL_SSL30_RC4_128_MD5_3 0x0018 | 558 | #define OP_PCL_SSL30_RC4_128_MD5_3 0x0018 |
559 | 559 | ||
560 | #define OP_PCL_SSL30_RC4_40_MD5 0x002b | 560 | #define OP_PCL_SSL30_RC4_40_MD5 0x002b |
561 | #define OP_PCL_SSL30_RC4_40_MD5_2 0x0003 | 561 | #define OP_PCL_SSL30_RC4_40_MD5_2 0x0003 |
562 | #define OP_PCL_SSL30_RC4_40_MD5_3 0x0017 | 562 | #define OP_PCL_SSL30_RC4_40_MD5_3 0x0017 |
563 | 563 | ||
564 | #define OP_PCL_SSL30_RC4_128_SHA 0x0020 | 564 | #define OP_PCL_SSL30_RC4_128_SHA 0x0020 |
565 | #define OP_PCL_SSL30_RC4_128_SHA_2 0x008a | 565 | #define OP_PCL_SSL30_RC4_128_SHA_2 0x008a |
566 | #define OP_PCL_SSL30_RC4_128_SHA_3 0x008e | 566 | #define OP_PCL_SSL30_RC4_128_SHA_3 0x008e |
567 | #define OP_PCL_SSL30_RC4_128_SHA_4 0x0092 | 567 | #define OP_PCL_SSL30_RC4_128_SHA_4 0x0092 |
568 | #define OP_PCL_SSL30_RC4_128_SHA_5 0x0005 | 568 | #define OP_PCL_SSL30_RC4_128_SHA_5 0x0005 |
569 | #define OP_PCL_SSL30_RC4_128_SHA_6 0xc002 | 569 | #define OP_PCL_SSL30_RC4_128_SHA_6 0xc002 |
570 | #define OP_PCL_SSL30_RC4_128_SHA_7 0xc007 | 570 | #define OP_PCL_SSL30_RC4_128_SHA_7 0xc007 |
571 | #define OP_PCL_SSL30_RC4_128_SHA_8 0xc00c | 571 | #define OP_PCL_SSL30_RC4_128_SHA_8 0xc00c |
572 | #define OP_PCL_SSL30_RC4_128_SHA_9 0xc011 | 572 | #define OP_PCL_SSL30_RC4_128_SHA_9 0xc011 |
573 | #define OP_PCL_SSL30_RC4_128_SHA_10 0xc016 | 573 | #define OP_PCL_SSL30_RC4_128_SHA_10 0xc016 |
574 | 574 | ||
575 | #define OP_PCL_SSL30_RC4_40_SHA 0x0028 | 575 | #define OP_PCL_SSL30_RC4_40_SHA 0x0028 |
576 | 576 | ||
577 | 577 | ||
578 | /* For TLS 1.0 - OP_PCLID_TLS10 */ | 578 | /* For TLS 1.0 - OP_PCLID_TLS10 */ |
579 | #define OP_PCL_TLS10_AES_128_CBC_SHA 0x002f | 579 | #define OP_PCL_TLS10_AES_128_CBC_SHA 0x002f |
580 | #define OP_PCL_TLS10_AES_128_CBC_SHA_2 0x0030 | 580 | #define OP_PCL_TLS10_AES_128_CBC_SHA_2 0x0030 |
581 | #define OP_PCL_TLS10_AES_128_CBC_SHA_3 0x0031 | 581 | #define OP_PCL_TLS10_AES_128_CBC_SHA_3 0x0031 |
582 | #define OP_PCL_TLS10_AES_128_CBC_SHA_4 0x0032 | 582 | #define OP_PCL_TLS10_AES_128_CBC_SHA_4 0x0032 |
583 | #define OP_PCL_TLS10_AES_128_CBC_SHA_5 0x0033 | 583 | #define OP_PCL_TLS10_AES_128_CBC_SHA_5 0x0033 |
584 | #define OP_PCL_TLS10_AES_128_CBC_SHA_6 0x0034 | 584 | #define OP_PCL_TLS10_AES_128_CBC_SHA_6 0x0034 |
585 | #define OP_PCL_TLS10_AES_128_CBC_SHA_7 0x008c | 585 | #define OP_PCL_TLS10_AES_128_CBC_SHA_7 0x008c |
586 | #define OP_PCL_TLS10_AES_128_CBC_SHA_8 0x0090 | 586 | #define OP_PCL_TLS10_AES_128_CBC_SHA_8 0x0090 |
587 | #define OP_PCL_TLS10_AES_128_CBC_SHA_9 0x0094 | 587 | #define OP_PCL_TLS10_AES_128_CBC_SHA_9 0x0094 |
588 | #define OP_PCL_TLS10_AES_128_CBC_SHA_10 0xc004 | 588 | #define OP_PCL_TLS10_AES_128_CBC_SHA_10 0xc004 |
589 | #define OP_PCL_TLS10_AES_128_CBC_SHA_11 0xc009 | 589 | #define OP_PCL_TLS10_AES_128_CBC_SHA_11 0xc009 |
590 | #define OP_PCL_TLS10_AES_128_CBC_SHA_12 0xc00e | 590 | #define OP_PCL_TLS10_AES_128_CBC_SHA_12 0xc00e |
591 | #define OP_PCL_TLS10_AES_128_CBC_SHA_13 0xc013 | 591 | #define OP_PCL_TLS10_AES_128_CBC_SHA_13 0xc013 |
592 | #define OP_PCL_TLS10_AES_128_CBC_SHA_14 0xc018 | 592 | #define OP_PCL_TLS10_AES_128_CBC_SHA_14 0xc018 |
593 | #define OP_PCL_TLS10_AES_128_CBC_SHA_15 0xc01d | 593 | #define OP_PCL_TLS10_AES_128_CBC_SHA_15 0xc01d |
594 | #define OP_PCL_TLS10_AES_128_CBC_SHA_16 0xc01e | 594 | #define OP_PCL_TLS10_AES_128_CBC_SHA_16 0xc01e |
595 | #define OP_PCL_TLS10_AES_128_CBC_SHA_17 0xc01f | 595 | #define OP_PCL_TLS10_AES_128_CBC_SHA_17 0xc01f |
596 | 596 | ||
597 | #define OP_PCL_TLS10_AES_256_CBC_SHA 0x0035 | 597 | #define OP_PCL_TLS10_AES_256_CBC_SHA 0x0035 |
598 | #define OP_PCL_TLS10_AES_256_CBC_SHA_2 0x0036 | 598 | #define OP_PCL_TLS10_AES_256_CBC_SHA_2 0x0036 |
599 | #define OP_PCL_TLS10_AES_256_CBC_SHA_3 0x0037 | 599 | #define OP_PCL_TLS10_AES_256_CBC_SHA_3 0x0037 |
600 | #define OP_PCL_TLS10_AES_256_CBC_SHA_4 0x0038 | 600 | #define OP_PCL_TLS10_AES_256_CBC_SHA_4 0x0038 |
601 | #define OP_PCL_TLS10_AES_256_CBC_SHA_5 0x0039 | 601 | #define OP_PCL_TLS10_AES_256_CBC_SHA_5 0x0039 |
602 | #define OP_PCL_TLS10_AES_256_CBC_SHA_6 0x003a | 602 | #define OP_PCL_TLS10_AES_256_CBC_SHA_6 0x003a |
603 | #define OP_PCL_TLS10_AES_256_CBC_SHA_7 0x008d | 603 | #define OP_PCL_TLS10_AES_256_CBC_SHA_7 0x008d |
604 | #define OP_PCL_TLS10_AES_256_CBC_SHA_8 0x0091 | 604 | #define OP_PCL_TLS10_AES_256_CBC_SHA_8 0x0091 |
605 | #define OP_PCL_TLS10_AES_256_CBC_SHA_9 0x0095 | 605 | #define OP_PCL_TLS10_AES_256_CBC_SHA_9 0x0095 |
606 | #define OP_PCL_TLS10_AES_256_CBC_SHA_10 0xc005 | 606 | #define OP_PCL_TLS10_AES_256_CBC_SHA_10 0xc005 |
607 | #define OP_PCL_TLS10_AES_256_CBC_SHA_11 0xc00a | 607 | #define OP_PCL_TLS10_AES_256_CBC_SHA_11 0xc00a |
608 | #define OP_PCL_TLS10_AES_256_CBC_SHA_12 0xc00f | 608 | #define OP_PCL_TLS10_AES_256_CBC_SHA_12 0xc00f |
609 | #define OP_PCL_TLS10_AES_256_CBC_SHA_13 0xc014 | 609 | #define OP_PCL_TLS10_AES_256_CBC_SHA_13 0xc014 |
610 | #define OP_PCL_TLS10_AES_256_CBC_SHA_14 0xc019 | 610 | #define OP_PCL_TLS10_AES_256_CBC_SHA_14 0xc019 |
611 | #define OP_PCL_TLS10_AES_256_CBC_SHA_15 0xc020 | 611 | #define OP_PCL_TLS10_AES_256_CBC_SHA_15 0xc020 |
612 | #define OP_PCL_TLS10_AES_256_CBC_SHA_16 0xc021 | 612 | #define OP_PCL_TLS10_AES_256_CBC_SHA_16 0xc021 |
613 | #define OP_PCL_TLS10_AES_256_CBC_SHA_17 0xc022 | 613 | #define OP_PCL_TLS10_AES_256_CBC_SHA_17 0xc022 |
614 | 614 | ||
615 | /* #define OP_PCL_TLS10_3DES_EDE_CBC_MD5 0x0023 */ | 615 | /* #define OP_PCL_TLS10_3DES_EDE_CBC_MD5 0x0023 */ |
616 | 616 | ||
617 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA 0x001f | 617 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA 0x001f |
618 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_2 0x008b | 618 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_2 0x008b |
619 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_3 0x008f | 619 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_3 0x008f |
620 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_4 0x0093 | 620 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_4 0x0093 |
621 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_5 0x000a | 621 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_5 0x000a |
622 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_6 0x000d | 622 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_6 0x000d |
623 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_7 0x0010 | 623 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_7 0x0010 |
624 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_8 0x0013 | 624 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_8 0x0013 |
625 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_9 0x0016 | 625 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_9 0x0016 |
626 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_10 0x001b | 626 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_10 0x001b |
627 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_11 0xc003 | 627 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_11 0xc003 |
628 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_12 0xc008 | 628 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_12 0xc008 |
629 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_13 0xc00d | 629 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_13 0xc00d |
630 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_14 0xc012 | 630 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_14 0xc012 |
631 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_15 0xc017 | 631 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_15 0xc017 |
632 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_16 0xc01a | 632 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_16 0xc01a |
633 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_17 0xc01b | 633 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_17 0xc01b |
634 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_18 0xc01c | 634 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA_18 0xc01c |
635 | 635 | ||
636 | #define OP_PCL_TLS10_DES40_CBC_MD5 0x0029 | 636 | #define OP_PCL_TLS10_DES40_CBC_MD5 0x0029 |
637 | 637 | ||
638 | #define OP_PCL_TLS10_DES_CBC_MD5 0x0022 | 638 | #define OP_PCL_TLS10_DES_CBC_MD5 0x0022 |
639 | 639 | ||
640 | #define OP_PCL_TLS10_DES40_CBC_SHA 0x0008 | 640 | #define OP_PCL_TLS10_DES40_CBC_SHA 0x0008 |
641 | #define OP_PCL_TLS10_DES40_CBC_SHA_2 0x000b | 641 | #define OP_PCL_TLS10_DES40_CBC_SHA_2 0x000b |
642 | #define OP_PCL_TLS10_DES40_CBC_SHA_3 0x000e | 642 | #define OP_PCL_TLS10_DES40_CBC_SHA_3 0x000e |
643 | #define OP_PCL_TLS10_DES40_CBC_SHA_4 0x0011 | 643 | #define OP_PCL_TLS10_DES40_CBC_SHA_4 0x0011 |
644 | #define OP_PCL_TLS10_DES40_CBC_SHA_5 0x0014 | 644 | #define OP_PCL_TLS10_DES40_CBC_SHA_5 0x0014 |
645 | #define OP_PCL_TLS10_DES40_CBC_SHA_6 0x0019 | 645 | #define OP_PCL_TLS10_DES40_CBC_SHA_6 0x0019 |
646 | #define OP_PCL_TLS10_DES40_CBC_SHA_7 0x0026 | 646 | #define OP_PCL_TLS10_DES40_CBC_SHA_7 0x0026 |
647 | 647 | ||
648 | 648 | ||
649 | #define OP_PCL_TLS10_DES_CBC_SHA 0x001e | 649 | #define OP_PCL_TLS10_DES_CBC_SHA 0x001e |
650 | #define OP_PCL_TLS10_DES_CBC_SHA_2 0x0009 | 650 | #define OP_PCL_TLS10_DES_CBC_SHA_2 0x0009 |
651 | #define OP_PCL_TLS10_DES_CBC_SHA_3 0x000c | 651 | #define OP_PCL_TLS10_DES_CBC_SHA_3 0x000c |
652 | #define OP_PCL_TLS10_DES_CBC_SHA_4 0x000f | 652 | #define OP_PCL_TLS10_DES_CBC_SHA_4 0x000f |
653 | #define OP_PCL_TLS10_DES_CBC_SHA_5 0x0012 | 653 | #define OP_PCL_TLS10_DES_CBC_SHA_5 0x0012 |
654 | #define OP_PCL_TLS10_DES_CBC_SHA_6 0x0015 | 654 | #define OP_PCL_TLS10_DES_CBC_SHA_6 0x0015 |
655 | #define OP_PCL_TLS10_DES_CBC_SHA_7 0x001a | 655 | #define OP_PCL_TLS10_DES_CBC_SHA_7 0x001a |
656 | 656 | ||
657 | #define OP_PCL_TLS10_RC4_128_MD5 0x0024 | 657 | #define OP_PCL_TLS10_RC4_128_MD5 0x0024 |
658 | #define OP_PCL_TLS10_RC4_128_MD5_2 0x0004 | 658 | #define OP_PCL_TLS10_RC4_128_MD5_2 0x0004 |
659 | #define OP_PCL_TLS10_RC4_128_MD5_3 0x0018 | 659 | #define OP_PCL_TLS10_RC4_128_MD5_3 0x0018 |
660 | 660 | ||
661 | #define OP_PCL_TLS10_RC4_40_MD5 0x002b | 661 | #define OP_PCL_TLS10_RC4_40_MD5 0x002b |
662 | #define OP_PCL_TLS10_RC4_40_MD5_2 0x0003 | 662 | #define OP_PCL_TLS10_RC4_40_MD5_2 0x0003 |
663 | #define OP_PCL_TLS10_RC4_40_MD5_3 0x0017 | 663 | #define OP_PCL_TLS10_RC4_40_MD5_3 0x0017 |
664 | 664 | ||
665 | #define OP_PCL_TLS10_RC4_128_SHA 0x0020 | 665 | #define OP_PCL_TLS10_RC4_128_SHA 0x0020 |
666 | #define OP_PCL_TLS10_RC4_128_SHA_2 0x008a | 666 | #define OP_PCL_TLS10_RC4_128_SHA_2 0x008a |
667 | #define OP_PCL_TLS10_RC4_128_SHA_3 0x008e | 667 | #define OP_PCL_TLS10_RC4_128_SHA_3 0x008e |
668 | #define OP_PCL_TLS10_RC4_128_SHA_4 0x0092 | 668 | #define OP_PCL_TLS10_RC4_128_SHA_4 0x0092 |
669 | #define OP_PCL_TLS10_RC4_128_SHA_5 0x0005 | 669 | #define OP_PCL_TLS10_RC4_128_SHA_5 0x0005 |
670 | #define OP_PCL_TLS10_RC4_128_SHA_6 0xc002 | 670 | #define OP_PCL_TLS10_RC4_128_SHA_6 0xc002 |
671 | #define OP_PCL_TLS10_RC4_128_SHA_7 0xc007 | 671 | #define OP_PCL_TLS10_RC4_128_SHA_7 0xc007 |
672 | #define OP_PCL_TLS10_RC4_128_SHA_8 0xc00c | 672 | #define OP_PCL_TLS10_RC4_128_SHA_8 0xc00c |
673 | #define OP_PCL_TLS10_RC4_128_SHA_9 0xc011 | 673 | #define OP_PCL_TLS10_RC4_128_SHA_9 0xc011 |
674 | #define OP_PCL_TLS10_RC4_128_SHA_10 0xc016 | 674 | #define OP_PCL_TLS10_RC4_128_SHA_10 0xc016 |
675 | 675 | ||
676 | #define OP_PCL_TLS10_RC4_40_SHA 0x0028 | 676 | #define OP_PCL_TLS10_RC4_40_SHA 0x0028 |
677 | 677 | ||
678 | #define OP_PCL_TLS10_3DES_EDE_CBC_MD5 0xff23 | 678 | #define OP_PCL_TLS10_3DES_EDE_CBC_MD5 0xff23 |
679 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA160 0xff30 | 679 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA160 0xff30 |
680 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA224 0xff34 | 680 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA224 0xff34 |
681 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA256 0xff36 | 681 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA256 0xff36 |
682 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA384 0xff33 | 682 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA384 0xff33 |
683 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA512 0xff35 | 683 | #define OP_PCL_TLS10_3DES_EDE_CBC_SHA512 0xff35 |
684 | #define OP_PCL_TLS10_AES_128_CBC_SHA160 0xff80 | 684 | #define OP_PCL_TLS10_AES_128_CBC_SHA160 0xff80 |
685 | #define OP_PCL_TLS10_AES_128_CBC_SHA224 0xff84 | 685 | #define OP_PCL_TLS10_AES_128_CBC_SHA224 0xff84 |
686 | #define OP_PCL_TLS10_AES_128_CBC_SHA256 0xff86 | 686 | #define OP_PCL_TLS10_AES_128_CBC_SHA256 0xff86 |
687 | #define OP_PCL_TLS10_AES_128_CBC_SHA384 0xff83 | 687 | #define OP_PCL_TLS10_AES_128_CBC_SHA384 0xff83 |
688 | #define OP_PCL_TLS10_AES_128_CBC_SHA512 0xff85 | 688 | #define OP_PCL_TLS10_AES_128_CBC_SHA512 0xff85 |
689 | #define OP_PCL_TLS10_AES_192_CBC_SHA160 0xff20 | 689 | #define OP_PCL_TLS10_AES_192_CBC_SHA160 0xff20 |
690 | #define OP_PCL_TLS10_AES_192_CBC_SHA224 0xff24 | 690 | #define OP_PCL_TLS10_AES_192_CBC_SHA224 0xff24 |
691 | #define OP_PCL_TLS10_AES_192_CBC_SHA256 0xff26 | 691 | #define OP_PCL_TLS10_AES_192_CBC_SHA256 0xff26 |
692 | #define OP_PCL_TLS10_AES_192_CBC_SHA384 0xff23 | 692 | #define OP_PCL_TLS10_AES_192_CBC_SHA384 0xff23 |
693 | #define OP_PCL_TLS10_AES_192_CBC_SHA512 0xff25 | 693 | #define OP_PCL_TLS10_AES_192_CBC_SHA512 0xff25 |
694 | #define OP_PCL_TLS10_AES_256_CBC_SHA160 0xff60 | 694 | #define OP_PCL_TLS10_AES_256_CBC_SHA160 0xff60 |
695 | #define OP_PCL_TLS10_AES_256_CBC_SHA224 0xff64 | 695 | #define OP_PCL_TLS10_AES_256_CBC_SHA224 0xff64 |
696 | #define OP_PCL_TLS10_AES_256_CBC_SHA256 0xff66 | 696 | #define OP_PCL_TLS10_AES_256_CBC_SHA256 0xff66 |
697 | #define OP_PCL_TLS10_AES_256_CBC_SHA384 0xff63 | 697 | #define OP_PCL_TLS10_AES_256_CBC_SHA384 0xff63 |
698 | #define OP_PCL_TLS10_AES_256_CBC_SHA512 0xff65 | 698 | #define OP_PCL_TLS10_AES_256_CBC_SHA512 0xff65 |
699 | 699 | ||
700 | 700 | ||
701 | 701 | ||
702 | /* For TLS 1.1 - OP_PCLID_TLS11 */ | 702 | /* For TLS 1.1 - OP_PCLID_TLS11 */ |
703 | #define OP_PCL_TLS11_AES_128_CBC_SHA 0x002f | 703 | #define OP_PCL_TLS11_AES_128_CBC_SHA 0x002f |
704 | #define OP_PCL_TLS11_AES_128_CBC_SHA_2 0x0030 | 704 | #define OP_PCL_TLS11_AES_128_CBC_SHA_2 0x0030 |
705 | #define OP_PCL_TLS11_AES_128_CBC_SHA_3 0x0031 | 705 | #define OP_PCL_TLS11_AES_128_CBC_SHA_3 0x0031 |
706 | #define OP_PCL_TLS11_AES_128_CBC_SHA_4 0x0032 | 706 | #define OP_PCL_TLS11_AES_128_CBC_SHA_4 0x0032 |
707 | #define OP_PCL_TLS11_AES_128_CBC_SHA_5 0x0033 | 707 | #define OP_PCL_TLS11_AES_128_CBC_SHA_5 0x0033 |
708 | #define OP_PCL_TLS11_AES_128_CBC_SHA_6 0x0034 | 708 | #define OP_PCL_TLS11_AES_128_CBC_SHA_6 0x0034 |
709 | #define OP_PCL_TLS11_AES_128_CBC_SHA_7 0x008c | 709 | #define OP_PCL_TLS11_AES_128_CBC_SHA_7 0x008c |
710 | #define OP_PCL_TLS11_AES_128_CBC_SHA_8 0x0090 | 710 | #define OP_PCL_TLS11_AES_128_CBC_SHA_8 0x0090 |
711 | #define OP_PCL_TLS11_AES_128_CBC_SHA_9 0x0094 | 711 | #define OP_PCL_TLS11_AES_128_CBC_SHA_9 0x0094 |
712 | #define OP_PCL_TLS11_AES_128_CBC_SHA_10 0xc004 | 712 | #define OP_PCL_TLS11_AES_128_CBC_SHA_10 0xc004 |
713 | #define OP_PCL_TLS11_AES_128_CBC_SHA_11 0xc009 | 713 | #define OP_PCL_TLS11_AES_128_CBC_SHA_11 0xc009 |
714 | #define OP_PCL_TLS11_AES_128_CBC_SHA_12 0xc00e | 714 | #define OP_PCL_TLS11_AES_128_CBC_SHA_12 0xc00e |
715 | #define OP_PCL_TLS11_AES_128_CBC_SHA_13 0xc013 | 715 | #define OP_PCL_TLS11_AES_128_CBC_SHA_13 0xc013 |
716 | #define OP_PCL_TLS11_AES_128_CBC_SHA_14 0xc018 | 716 | #define OP_PCL_TLS11_AES_128_CBC_SHA_14 0xc018 |
717 | #define OP_PCL_TLS11_AES_128_CBC_SHA_15 0xc01d | 717 | #define OP_PCL_TLS11_AES_128_CBC_SHA_15 0xc01d |
718 | #define OP_PCL_TLS11_AES_128_CBC_SHA_16 0xc01e | 718 | #define OP_PCL_TLS11_AES_128_CBC_SHA_16 0xc01e |
719 | #define OP_PCL_TLS11_AES_128_CBC_SHA_17 0xc01f | 719 | #define OP_PCL_TLS11_AES_128_CBC_SHA_17 0xc01f |
720 | 720 | ||
721 | #define OP_PCL_TLS11_AES_256_CBC_SHA 0x0035 | 721 | #define OP_PCL_TLS11_AES_256_CBC_SHA 0x0035 |
722 | #define OP_PCL_TLS11_AES_256_CBC_SHA_2 0x0036 | 722 | #define OP_PCL_TLS11_AES_256_CBC_SHA_2 0x0036 |
723 | #define OP_PCL_TLS11_AES_256_CBC_SHA_3 0x0037 | 723 | #define OP_PCL_TLS11_AES_256_CBC_SHA_3 0x0037 |
724 | #define OP_PCL_TLS11_AES_256_CBC_SHA_4 0x0038 | 724 | #define OP_PCL_TLS11_AES_256_CBC_SHA_4 0x0038 |
725 | #define OP_PCL_TLS11_AES_256_CBC_SHA_5 0x0039 | 725 | #define OP_PCL_TLS11_AES_256_CBC_SHA_5 0x0039 |
726 | #define OP_PCL_TLS11_AES_256_CBC_SHA_6 0x003a | 726 | #define OP_PCL_TLS11_AES_256_CBC_SHA_6 0x003a |
727 | #define OP_PCL_TLS11_AES_256_CBC_SHA_7 0x008d | 727 | #define OP_PCL_TLS11_AES_256_CBC_SHA_7 0x008d |
728 | #define OP_PCL_TLS11_AES_256_CBC_SHA_8 0x0091 | 728 | #define OP_PCL_TLS11_AES_256_CBC_SHA_8 0x0091 |
729 | #define OP_PCL_TLS11_AES_256_CBC_SHA_9 0x0095 | 729 | #define OP_PCL_TLS11_AES_256_CBC_SHA_9 0x0095 |
730 | #define OP_PCL_TLS11_AES_256_CBC_SHA_10 0xc005 | 730 | #define OP_PCL_TLS11_AES_256_CBC_SHA_10 0xc005 |
731 | #define OP_PCL_TLS11_AES_256_CBC_SHA_11 0xc00a | 731 | #define OP_PCL_TLS11_AES_256_CBC_SHA_11 0xc00a |
732 | #define OP_PCL_TLS11_AES_256_CBC_SHA_12 0xc00f | 732 | #define OP_PCL_TLS11_AES_256_CBC_SHA_12 0xc00f |
733 | #define OP_PCL_TLS11_AES_256_CBC_SHA_13 0xc014 | 733 | #define OP_PCL_TLS11_AES_256_CBC_SHA_13 0xc014 |
734 | #define OP_PCL_TLS11_AES_256_CBC_SHA_14 0xc019 | 734 | #define OP_PCL_TLS11_AES_256_CBC_SHA_14 0xc019 |
735 | #define OP_PCL_TLS11_AES_256_CBC_SHA_15 0xc020 | 735 | #define OP_PCL_TLS11_AES_256_CBC_SHA_15 0xc020 |
736 | #define OP_PCL_TLS11_AES_256_CBC_SHA_16 0xc021 | 736 | #define OP_PCL_TLS11_AES_256_CBC_SHA_16 0xc021 |
737 | #define OP_PCL_TLS11_AES_256_CBC_SHA_17 0xc022 | 737 | #define OP_PCL_TLS11_AES_256_CBC_SHA_17 0xc022 |
738 | 738 | ||
739 | /* #define OP_PCL_TLS11_3DES_EDE_CBC_MD5 0x0023 */ | 739 | /* #define OP_PCL_TLS11_3DES_EDE_CBC_MD5 0x0023 */ |
740 | 740 | ||
741 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA 0x001f | 741 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA 0x001f |
742 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_2 0x008b | 742 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_2 0x008b |
743 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_3 0x008f | 743 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_3 0x008f |
744 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_4 0x0093 | 744 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_4 0x0093 |
745 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_5 0x000a | 745 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_5 0x000a |
746 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_6 0x000d | 746 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_6 0x000d |
747 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_7 0x0010 | 747 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_7 0x0010 |
748 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_8 0x0013 | 748 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_8 0x0013 |
749 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_9 0x0016 | 749 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_9 0x0016 |
750 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_10 0x001b | 750 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_10 0x001b |
751 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_11 0xc003 | 751 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_11 0xc003 |
752 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_12 0xc008 | 752 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_12 0xc008 |
753 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_13 0xc00d | 753 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_13 0xc00d |
754 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_14 0xc012 | 754 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_14 0xc012 |
755 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_15 0xc017 | 755 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_15 0xc017 |
756 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_16 0xc01a | 756 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_16 0xc01a |
757 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_17 0xc01b | 757 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_17 0xc01b |
758 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_18 0xc01c | 758 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA_18 0xc01c |
759 | 759 | ||
760 | #define OP_PCL_TLS11_DES40_CBC_MD5 0x0029 | 760 | #define OP_PCL_TLS11_DES40_CBC_MD5 0x0029 |
761 | 761 | ||
762 | #define OP_PCL_TLS11_DES_CBC_MD5 0x0022 | 762 | #define OP_PCL_TLS11_DES_CBC_MD5 0x0022 |
763 | 763 | ||
764 | #define OP_PCL_TLS11_DES40_CBC_SHA 0x0008 | 764 | #define OP_PCL_TLS11_DES40_CBC_SHA 0x0008 |
765 | #define OP_PCL_TLS11_DES40_CBC_SHA_2 0x000b | 765 | #define OP_PCL_TLS11_DES40_CBC_SHA_2 0x000b |
766 | #define OP_PCL_TLS11_DES40_CBC_SHA_3 0x000e | 766 | #define OP_PCL_TLS11_DES40_CBC_SHA_3 0x000e |
767 | #define OP_PCL_TLS11_DES40_CBC_SHA_4 0x0011 | 767 | #define OP_PCL_TLS11_DES40_CBC_SHA_4 0x0011 |
768 | #define OP_PCL_TLS11_DES40_CBC_SHA_5 0x0014 | 768 | #define OP_PCL_TLS11_DES40_CBC_SHA_5 0x0014 |
769 | #define OP_PCL_TLS11_DES40_CBC_SHA_6 0x0019 | 769 | #define OP_PCL_TLS11_DES40_CBC_SHA_6 0x0019 |
770 | #define OP_PCL_TLS11_DES40_CBC_SHA_7 0x0026 | 770 | #define OP_PCL_TLS11_DES40_CBC_SHA_7 0x0026 |
771 | 771 | ||
772 | #define OP_PCL_TLS11_DES_CBC_SHA 0x001e | 772 | #define OP_PCL_TLS11_DES_CBC_SHA 0x001e |
773 | #define OP_PCL_TLS11_DES_CBC_SHA_2 0x0009 | 773 | #define OP_PCL_TLS11_DES_CBC_SHA_2 0x0009 |
774 | #define OP_PCL_TLS11_DES_CBC_SHA_3 0x000c | 774 | #define OP_PCL_TLS11_DES_CBC_SHA_3 0x000c |
775 | #define OP_PCL_TLS11_DES_CBC_SHA_4 0x000f | 775 | #define OP_PCL_TLS11_DES_CBC_SHA_4 0x000f |
776 | #define OP_PCL_TLS11_DES_CBC_SHA_5 0x0012 | 776 | #define OP_PCL_TLS11_DES_CBC_SHA_5 0x0012 |
777 | #define OP_PCL_TLS11_DES_CBC_SHA_6 0x0015 | 777 | #define OP_PCL_TLS11_DES_CBC_SHA_6 0x0015 |
778 | #define OP_PCL_TLS11_DES_CBC_SHA_7 0x001a | 778 | #define OP_PCL_TLS11_DES_CBC_SHA_7 0x001a |
779 | 779 | ||
780 | #define OP_PCL_TLS11_RC4_128_MD5 0x0024 | 780 | #define OP_PCL_TLS11_RC4_128_MD5 0x0024 |
781 | #define OP_PCL_TLS11_RC4_128_MD5_2 0x0004 | 781 | #define OP_PCL_TLS11_RC4_128_MD5_2 0x0004 |
782 | #define OP_PCL_TLS11_RC4_128_MD5_3 0x0018 | 782 | #define OP_PCL_TLS11_RC4_128_MD5_3 0x0018 |
783 | 783 | ||
784 | #define OP_PCL_TLS11_RC4_40_MD5 0x002b | 784 | #define OP_PCL_TLS11_RC4_40_MD5 0x002b |
785 | #define OP_PCL_TLS11_RC4_40_MD5_2 0x0003 | 785 | #define OP_PCL_TLS11_RC4_40_MD5_2 0x0003 |
786 | #define OP_PCL_TLS11_RC4_40_MD5_3 0x0017 | 786 | #define OP_PCL_TLS11_RC4_40_MD5_3 0x0017 |
787 | 787 | ||
788 | #define OP_PCL_TLS11_RC4_128_SHA 0x0020 | 788 | #define OP_PCL_TLS11_RC4_128_SHA 0x0020 |
789 | #define OP_PCL_TLS11_RC4_128_SHA_2 0x008a | 789 | #define OP_PCL_TLS11_RC4_128_SHA_2 0x008a |
790 | #define OP_PCL_TLS11_RC4_128_SHA_3 0x008e | 790 | #define OP_PCL_TLS11_RC4_128_SHA_3 0x008e |
791 | #define OP_PCL_TLS11_RC4_128_SHA_4 0x0092 | 791 | #define OP_PCL_TLS11_RC4_128_SHA_4 0x0092 |
792 | #define OP_PCL_TLS11_RC4_128_SHA_5 0x0005 | 792 | #define OP_PCL_TLS11_RC4_128_SHA_5 0x0005 |
793 | #define OP_PCL_TLS11_RC4_128_SHA_6 0xc002 | 793 | #define OP_PCL_TLS11_RC4_128_SHA_6 0xc002 |
794 | #define OP_PCL_TLS11_RC4_128_SHA_7 0xc007 | 794 | #define OP_PCL_TLS11_RC4_128_SHA_7 0xc007 |
795 | #define OP_PCL_TLS11_RC4_128_SHA_8 0xc00c | 795 | #define OP_PCL_TLS11_RC4_128_SHA_8 0xc00c |
796 | #define OP_PCL_TLS11_RC4_128_SHA_9 0xc011 | 796 | #define OP_PCL_TLS11_RC4_128_SHA_9 0xc011 |
797 | #define OP_PCL_TLS11_RC4_128_SHA_10 0xc016 | 797 | #define OP_PCL_TLS11_RC4_128_SHA_10 0xc016 |
798 | 798 | ||
799 | #define OP_PCL_TLS11_RC4_40_SHA 0x0028 | 799 | #define OP_PCL_TLS11_RC4_40_SHA 0x0028 |
800 | 800 | ||
801 | #define OP_PCL_TLS11_3DES_EDE_CBC_MD5 0xff23 | 801 | #define OP_PCL_TLS11_3DES_EDE_CBC_MD5 0xff23 |
802 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA160 0xff30 | 802 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA160 0xff30 |
803 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA224 0xff34 | 803 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA224 0xff34 |
804 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA256 0xff36 | 804 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA256 0xff36 |
805 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA384 0xff33 | 805 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA384 0xff33 |
806 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA512 0xff35 | 806 | #define OP_PCL_TLS11_3DES_EDE_CBC_SHA512 0xff35 |
807 | #define OP_PCL_TLS11_AES_128_CBC_SHA160 0xff80 | 807 | #define OP_PCL_TLS11_AES_128_CBC_SHA160 0xff80 |
808 | #define OP_PCL_TLS11_AES_128_CBC_SHA224 0xff84 | 808 | #define OP_PCL_TLS11_AES_128_CBC_SHA224 0xff84 |
809 | #define OP_PCL_TLS11_AES_128_CBC_SHA256 0xff86 | 809 | #define OP_PCL_TLS11_AES_128_CBC_SHA256 0xff86 |
810 | #define OP_PCL_TLS11_AES_128_CBC_SHA384 0xff83 | 810 | #define OP_PCL_TLS11_AES_128_CBC_SHA384 0xff83 |
811 | #define OP_PCL_TLS11_AES_128_CBC_SHA512 0xff85 | 811 | #define OP_PCL_TLS11_AES_128_CBC_SHA512 0xff85 |
812 | #define OP_PCL_TLS11_AES_192_CBC_SHA160 0xff20 | 812 | #define OP_PCL_TLS11_AES_192_CBC_SHA160 0xff20 |
813 | #define OP_PCL_TLS11_AES_192_CBC_SHA224 0xff24 | 813 | #define OP_PCL_TLS11_AES_192_CBC_SHA224 0xff24 |
814 | #define OP_PCL_TLS11_AES_192_CBC_SHA256 0xff26 | 814 | #define OP_PCL_TLS11_AES_192_CBC_SHA256 0xff26 |
815 | #define OP_PCL_TLS11_AES_192_CBC_SHA384 0xff23 | 815 | #define OP_PCL_TLS11_AES_192_CBC_SHA384 0xff23 |
816 | #define OP_PCL_TLS11_AES_192_CBC_SHA512 0xff25 | 816 | #define OP_PCL_TLS11_AES_192_CBC_SHA512 0xff25 |
817 | #define OP_PCL_TLS11_AES_256_CBC_SHA160 0xff60 | 817 | #define OP_PCL_TLS11_AES_256_CBC_SHA160 0xff60 |
818 | #define OP_PCL_TLS11_AES_256_CBC_SHA224 0xff64 | 818 | #define OP_PCL_TLS11_AES_256_CBC_SHA224 0xff64 |
819 | #define OP_PCL_TLS11_AES_256_CBC_SHA256 0xff66 | 819 | #define OP_PCL_TLS11_AES_256_CBC_SHA256 0xff66 |
820 | #define OP_PCL_TLS11_AES_256_CBC_SHA384 0xff63 | 820 | #define OP_PCL_TLS11_AES_256_CBC_SHA384 0xff63 |
821 | #define OP_PCL_TLS11_AES_256_CBC_SHA512 0xff65 | 821 | #define OP_PCL_TLS11_AES_256_CBC_SHA512 0xff65 |
822 | 822 | ||
823 | 823 | ||
824 | /* For TLS 1.2 - OP_PCLID_TLS12 */ | 824 | /* For TLS 1.2 - OP_PCLID_TLS12 */ |
825 | #define OP_PCL_TLS12_AES_128_CBC_SHA 0x002f | 825 | #define OP_PCL_TLS12_AES_128_CBC_SHA 0x002f |
826 | #define OP_PCL_TLS12_AES_128_CBC_SHA_2 0x0030 | 826 | #define OP_PCL_TLS12_AES_128_CBC_SHA_2 0x0030 |
827 | #define OP_PCL_TLS12_AES_128_CBC_SHA_3 0x0031 | 827 | #define OP_PCL_TLS12_AES_128_CBC_SHA_3 0x0031 |
828 | #define OP_PCL_TLS12_AES_128_CBC_SHA_4 0x0032 | 828 | #define OP_PCL_TLS12_AES_128_CBC_SHA_4 0x0032 |
829 | #define OP_PCL_TLS12_AES_128_CBC_SHA_5 0x0033 | 829 | #define OP_PCL_TLS12_AES_128_CBC_SHA_5 0x0033 |
830 | #define OP_PCL_TLS12_AES_128_CBC_SHA_6 0x0034 | 830 | #define OP_PCL_TLS12_AES_128_CBC_SHA_6 0x0034 |
831 | #define OP_PCL_TLS12_AES_128_CBC_SHA_7 0x008c | 831 | #define OP_PCL_TLS12_AES_128_CBC_SHA_7 0x008c |
832 | #define OP_PCL_TLS12_AES_128_CBC_SHA_8 0x0090 | 832 | #define OP_PCL_TLS12_AES_128_CBC_SHA_8 0x0090 |
833 | #define OP_PCL_TLS12_AES_128_CBC_SHA_9 0x0094 | 833 | #define OP_PCL_TLS12_AES_128_CBC_SHA_9 0x0094 |
834 | #define OP_PCL_TLS12_AES_128_CBC_SHA_10 0xc004 | 834 | #define OP_PCL_TLS12_AES_128_CBC_SHA_10 0xc004 |
835 | #define OP_PCL_TLS12_AES_128_CBC_SHA_11 0xc009 | 835 | #define OP_PCL_TLS12_AES_128_CBC_SHA_11 0xc009 |
836 | #define OP_PCL_TLS12_AES_128_CBC_SHA_12 0xc00e | 836 | #define OP_PCL_TLS12_AES_128_CBC_SHA_12 0xc00e |
837 | #define OP_PCL_TLS12_AES_128_CBC_SHA_13 0xc013 | 837 | #define OP_PCL_TLS12_AES_128_CBC_SHA_13 0xc013 |
838 | #define OP_PCL_TLS12_AES_128_CBC_SHA_14 0xc018 | 838 | #define OP_PCL_TLS12_AES_128_CBC_SHA_14 0xc018 |
839 | #define OP_PCL_TLS12_AES_128_CBC_SHA_15 0xc01d | 839 | #define OP_PCL_TLS12_AES_128_CBC_SHA_15 0xc01d |
840 | #define OP_PCL_TLS12_AES_128_CBC_SHA_16 0xc01e | 840 | #define OP_PCL_TLS12_AES_128_CBC_SHA_16 0xc01e |
841 | #define OP_PCL_TLS12_AES_128_CBC_SHA_17 0xc01f | 841 | #define OP_PCL_TLS12_AES_128_CBC_SHA_17 0xc01f |
842 | 842 | ||
843 | #define OP_PCL_TLS12_AES_256_CBC_SHA 0x0035 | 843 | #define OP_PCL_TLS12_AES_256_CBC_SHA 0x0035 |
844 | #define OP_PCL_TLS12_AES_256_CBC_SHA_2 0x0036 | 844 | #define OP_PCL_TLS12_AES_256_CBC_SHA_2 0x0036 |
845 | #define OP_PCL_TLS12_AES_256_CBC_SHA_3 0x0037 | 845 | #define OP_PCL_TLS12_AES_256_CBC_SHA_3 0x0037 |
846 | #define OP_PCL_TLS12_AES_256_CBC_SHA_4 0x0038 | 846 | #define OP_PCL_TLS12_AES_256_CBC_SHA_4 0x0038 |
847 | #define OP_PCL_TLS12_AES_256_CBC_SHA_5 0x0039 | 847 | #define OP_PCL_TLS12_AES_256_CBC_SHA_5 0x0039 |
848 | #define OP_PCL_TLS12_AES_256_CBC_SHA_6 0x003a | 848 | #define OP_PCL_TLS12_AES_256_CBC_SHA_6 0x003a |
849 | #define OP_PCL_TLS12_AES_256_CBC_SHA_7 0x008d | 849 | #define OP_PCL_TLS12_AES_256_CBC_SHA_7 0x008d |
850 | #define OP_PCL_TLS12_AES_256_CBC_SHA_8 0x0091 | 850 | #define OP_PCL_TLS12_AES_256_CBC_SHA_8 0x0091 |
851 | #define OP_PCL_TLS12_AES_256_CBC_SHA_9 0x0095 | 851 | #define OP_PCL_TLS12_AES_256_CBC_SHA_9 0x0095 |
852 | #define OP_PCL_TLS12_AES_256_CBC_SHA_10 0xc005 | 852 | #define OP_PCL_TLS12_AES_256_CBC_SHA_10 0xc005 |
853 | #define OP_PCL_TLS12_AES_256_CBC_SHA_11 0xc00a | 853 | #define OP_PCL_TLS12_AES_256_CBC_SHA_11 0xc00a |
854 | #define OP_PCL_TLS12_AES_256_CBC_SHA_12 0xc00f | 854 | #define OP_PCL_TLS12_AES_256_CBC_SHA_12 0xc00f |
855 | #define OP_PCL_TLS12_AES_256_CBC_SHA_13 0xc014 | 855 | #define OP_PCL_TLS12_AES_256_CBC_SHA_13 0xc014 |
856 | #define OP_PCL_TLS12_AES_256_CBC_SHA_14 0xc019 | 856 | #define OP_PCL_TLS12_AES_256_CBC_SHA_14 0xc019 |
857 | #define OP_PCL_TLS12_AES_256_CBC_SHA_15 0xc020 | 857 | #define OP_PCL_TLS12_AES_256_CBC_SHA_15 0xc020 |
858 | #define OP_PCL_TLS12_AES_256_CBC_SHA_16 0xc021 | 858 | #define OP_PCL_TLS12_AES_256_CBC_SHA_16 0xc021 |
859 | #define OP_PCL_TLS12_AES_256_CBC_SHA_17 0xc022 | 859 | #define OP_PCL_TLS12_AES_256_CBC_SHA_17 0xc022 |
860 | 860 | ||
861 | /* #define OP_PCL_TLS12_3DES_EDE_CBC_MD5 0x0023 */ | 861 | /* #define OP_PCL_TLS12_3DES_EDE_CBC_MD5 0x0023 */ |
862 | 862 | ||
863 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA 0x001f | 863 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA 0x001f |
864 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_2 0x008b | 864 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_2 0x008b |
865 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_3 0x008f | 865 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_3 0x008f |
866 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_4 0x0093 | 866 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_4 0x0093 |
867 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_5 0x000a | 867 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_5 0x000a |
868 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_6 0x000d | 868 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_6 0x000d |
869 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_7 0x0010 | 869 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_7 0x0010 |
870 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_8 0x0013 | 870 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_8 0x0013 |
871 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_9 0x0016 | 871 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_9 0x0016 |
872 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_10 0x001b | 872 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_10 0x001b |
873 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_11 0xc003 | 873 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_11 0xc003 |
874 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_12 0xc008 | 874 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_12 0xc008 |
875 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_13 0xc00d | 875 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_13 0xc00d |
876 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_14 0xc012 | 876 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_14 0xc012 |
877 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_15 0xc017 | 877 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_15 0xc017 |
878 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_16 0xc01a | 878 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_16 0xc01a |
879 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_17 0xc01b | 879 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_17 0xc01b |
880 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_18 0xc01c | 880 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA_18 0xc01c |
881 | 881 | ||
882 | #define OP_PCL_TLS12_DES40_CBC_MD5 0x0029 | 882 | #define OP_PCL_TLS12_DES40_CBC_MD5 0x0029 |
883 | 883 | ||
884 | #define OP_PCL_TLS12_DES_CBC_MD5 0x0022 | 884 | #define OP_PCL_TLS12_DES_CBC_MD5 0x0022 |
885 | 885 | ||
886 | #define OP_PCL_TLS12_DES40_CBC_SHA 0x0008 | 886 | #define OP_PCL_TLS12_DES40_CBC_SHA 0x0008 |
887 | #define OP_PCL_TLS12_DES40_CBC_SHA_2 0x000b | 887 | #define OP_PCL_TLS12_DES40_CBC_SHA_2 0x000b |
888 | #define OP_PCL_TLS12_DES40_CBC_SHA_3 0x000e | 888 | #define OP_PCL_TLS12_DES40_CBC_SHA_3 0x000e |
889 | #define OP_PCL_TLS12_DES40_CBC_SHA_4 0x0011 | 889 | #define OP_PCL_TLS12_DES40_CBC_SHA_4 0x0011 |
890 | #define OP_PCL_TLS12_DES40_CBC_SHA_5 0x0014 | 890 | #define OP_PCL_TLS12_DES40_CBC_SHA_5 0x0014 |
891 | #define OP_PCL_TLS12_DES40_CBC_SHA_6 0x0019 | 891 | #define OP_PCL_TLS12_DES40_CBC_SHA_6 0x0019 |
892 | #define OP_PCL_TLS12_DES40_CBC_SHA_7 0x0026 | 892 | #define OP_PCL_TLS12_DES40_CBC_SHA_7 0x0026 |
893 | 893 | ||
894 | #define OP_PCL_TLS12_DES_CBC_SHA 0x001e | 894 | #define OP_PCL_TLS12_DES_CBC_SHA 0x001e |
895 | #define OP_PCL_TLS12_DES_CBC_SHA_2 0x0009 | 895 | #define OP_PCL_TLS12_DES_CBC_SHA_2 0x0009 |
896 | #define OP_PCL_TLS12_DES_CBC_SHA_3 0x000c | 896 | #define OP_PCL_TLS12_DES_CBC_SHA_3 0x000c |
897 | #define OP_PCL_TLS12_DES_CBC_SHA_4 0x000f | 897 | #define OP_PCL_TLS12_DES_CBC_SHA_4 0x000f |
898 | #define OP_PCL_TLS12_DES_CBC_SHA_5 0x0012 | 898 | #define OP_PCL_TLS12_DES_CBC_SHA_5 0x0012 |
899 | #define OP_PCL_TLS12_DES_CBC_SHA_6 0x0015 | 899 | #define OP_PCL_TLS12_DES_CBC_SHA_6 0x0015 |
900 | #define OP_PCL_TLS12_DES_CBC_SHA_7 0x001a | 900 | #define OP_PCL_TLS12_DES_CBC_SHA_7 0x001a |
901 | 901 | ||
902 | #define OP_PCL_TLS12_RC4_128_MD5 0x0024 | 902 | #define OP_PCL_TLS12_RC4_128_MD5 0x0024 |
903 | #define OP_PCL_TLS12_RC4_128_MD5_2 0x0004 | 903 | #define OP_PCL_TLS12_RC4_128_MD5_2 0x0004 |
904 | #define OP_PCL_TLS12_RC4_128_MD5_3 0x0018 | 904 | #define OP_PCL_TLS12_RC4_128_MD5_3 0x0018 |
905 | 905 | ||
906 | #define OP_PCL_TLS12_RC4_40_MD5 0x002b | 906 | #define OP_PCL_TLS12_RC4_40_MD5 0x002b |
907 | #define OP_PCL_TLS12_RC4_40_MD5_2 0x0003 | 907 | #define OP_PCL_TLS12_RC4_40_MD5_2 0x0003 |
908 | #define OP_PCL_TLS12_RC4_40_MD5_3 0x0017 | 908 | #define OP_PCL_TLS12_RC4_40_MD5_3 0x0017 |
909 | 909 | ||
910 | #define OP_PCL_TLS12_RC4_128_SHA 0x0020 | 910 | #define OP_PCL_TLS12_RC4_128_SHA 0x0020 |
911 | #define OP_PCL_TLS12_RC4_128_SHA_2 0x008a | 911 | #define OP_PCL_TLS12_RC4_128_SHA_2 0x008a |
912 | #define OP_PCL_TLS12_RC4_128_SHA_3 0x008e | 912 | #define OP_PCL_TLS12_RC4_128_SHA_3 0x008e |
913 | #define OP_PCL_TLS12_RC4_128_SHA_4 0x0092 | 913 | #define OP_PCL_TLS12_RC4_128_SHA_4 0x0092 |
914 | #define OP_PCL_TLS12_RC4_128_SHA_5 0x0005 | 914 | #define OP_PCL_TLS12_RC4_128_SHA_5 0x0005 |
915 | #define OP_PCL_TLS12_RC4_128_SHA_6 0xc002 | 915 | #define OP_PCL_TLS12_RC4_128_SHA_6 0xc002 |
916 | #define OP_PCL_TLS12_RC4_128_SHA_7 0xc007 | 916 | #define OP_PCL_TLS12_RC4_128_SHA_7 0xc007 |
917 | #define OP_PCL_TLS12_RC4_128_SHA_8 0xc00c | 917 | #define OP_PCL_TLS12_RC4_128_SHA_8 0xc00c |
918 | #define OP_PCL_TLS12_RC4_128_SHA_9 0xc011 | 918 | #define OP_PCL_TLS12_RC4_128_SHA_9 0xc011 |
919 | #define OP_PCL_TLS12_RC4_128_SHA_10 0xc016 | 919 | #define OP_PCL_TLS12_RC4_128_SHA_10 0xc016 |
920 | 920 | ||
921 | #define OP_PCL_TLS12_RC4_40_SHA 0x0028 | 921 | #define OP_PCL_TLS12_RC4_40_SHA 0x0028 |
922 | 922 | ||
923 | /* #define OP_PCL_TLS12_AES_128_CBC_SHA256 0x003c */ | 923 | /* #define OP_PCL_TLS12_AES_128_CBC_SHA256 0x003c */ |
924 | #define OP_PCL_TLS12_AES_128_CBC_SHA256_2 0x003e | 924 | #define OP_PCL_TLS12_AES_128_CBC_SHA256_2 0x003e |
925 | #define OP_PCL_TLS12_AES_128_CBC_SHA256_3 0x003f | 925 | #define OP_PCL_TLS12_AES_128_CBC_SHA256_3 0x003f |
926 | #define OP_PCL_TLS12_AES_128_CBC_SHA256_4 0x0040 | 926 | #define OP_PCL_TLS12_AES_128_CBC_SHA256_4 0x0040 |
927 | #define OP_PCL_TLS12_AES_128_CBC_SHA256_5 0x0067 | 927 | #define OP_PCL_TLS12_AES_128_CBC_SHA256_5 0x0067 |
928 | #define OP_PCL_TLS12_AES_128_CBC_SHA256_6 0x006c | 928 | #define OP_PCL_TLS12_AES_128_CBC_SHA256_6 0x006c |
929 | 929 | ||
930 | /* #define OP_PCL_TLS12_AES_256_CBC_SHA256 0x003d */ | 930 | /* #define OP_PCL_TLS12_AES_256_CBC_SHA256 0x003d */ |
931 | #define OP_PCL_TLS12_AES_256_CBC_SHA256_2 0x0068 | 931 | #define OP_PCL_TLS12_AES_256_CBC_SHA256_2 0x0068 |
932 | #define OP_PCL_TLS12_AES_256_CBC_SHA256_3 0x0069 | 932 | #define OP_PCL_TLS12_AES_256_CBC_SHA256_3 0x0069 |
933 | #define OP_PCL_TLS12_AES_256_CBC_SHA256_4 0x006a | 933 | #define OP_PCL_TLS12_AES_256_CBC_SHA256_4 0x006a |
934 | #define OP_PCL_TLS12_AES_256_CBC_SHA256_5 0x006b | 934 | #define OP_PCL_TLS12_AES_256_CBC_SHA256_5 0x006b |
935 | #define OP_PCL_TLS12_AES_256_CBC_SHA256_6 0x006d | 935 | #define OP_PCL_TLS12_AES_256_CBC_SHA256_6 0x006d |
936 | 936 | ||
937 | /* AEAD_AES_xxx_CCM/GCM remain to be defined... */ | 937 | /* AEAD_AES_xxx_CCM/GCM remain to be defined... */ |
938 | 938 | ||
939 | #define OP_PCL_TLS12_3DES_EDE_CBC_MD5 0xff23 | 939 | #define OP_PCL_TLS12_3DES_EDE_CBC_MD5 0xff23 |
940 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA160 0xff30 | 940 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA160 0xff30 |
941 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA224 0xff34 | 941 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA224 0xff34 |
942 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA256 0xff36 | 942 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA256 0xff36 |
943 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA384 0xff33 | 943 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA384 0xff33 |
944 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA512 0xff35 | 944 | #define OP_PCL_TLS12_3DES_EDE_CBC_SHA512 0xff35 |
945 | #define OP_PCL_TLS12_AES_128_CBC_SHA160 0xff80 | 945 | #define OP_PCL_TLS12_AES_128_CBC_SHA160 0xff80 |
946 | #define OP_PCL_TLS12_AES_128_CBC_SHA224 0xff84 | 946 | #define OP_PCL_TLS12_AES_128_CBC_SHA224 0xff84 |
947 | #define OP_PCL_TLS12_AES_128_CBC_SHA256 0xff86 | 947 | #define OP_PCL_TLS12_AES_128_CBC_SHA256 0xff86 |
948 | #define OP_PCL_TLS12_AES_128_CBC_SHA384 0xff83 | 948 | #define OP_PCL_TLS12_AES_128_CBC_SHA384 0xff83 |
949 | #define OP_PCL_TLS12_AES_128_CBC_SHA512 0xff85 | 949 | #define OP_PCL_TLS12_AES_128_CBC_SHA512 0xff85 |
950 | #define OP_PCL_TLS12_AES_192_CBC_SHA160 0xff20 | 950 | #define OP_PCL_TLS12_AES_192_CBC_SHA160 0xff20 |
951 | #define OP_PCL_TLS12_AES_192_CBC_SHA224 0xff24 | 951 | #define OP_PCL_TLS12_AES_192_CBC_SHA224 0xff24 |
952 | #define OP_PCL_TLS12_AES_192_CBC_SHA256 0xff26 | 952 | #define OP_PCL_TLS12_AES_192_CBC_SHA256 0xff26 |
953 | #define OP_PCL_TLS12_AES_192_CBC_SHA384 0xff23 | 953 | #define OP_PCL_TLS12_AES_192_CBC_SHA384 0xff23 |
954 | #define OP_PCL_TLS12_AES_192_CBC_SHA512 0xff25 | 954 | #define OP_PCL_TLS12_AES_192_CBC_SHA512 0xff25 |
955 | #define OP_PCL_TLS12_AES_256_CBC_SHA160 0xff60 | 955 | #define OP_PCL_TLS12_AES_256_CBC_SHA160 0xff60 |
956 | #define OP_PCL_TLS12_AES_256_CBC_SHA224 0xff64 | 956 | #define OP_PCL_TLS12_AES_256_CBC_SHA224 0xff64 |
957 | #define OP_PCL_TLS12_AES_256_CBC_SHA256 0xff66 | 957 | #define OP_PCL_TLS12_AES_256_CBC_SHA256 0xff66 |
958 | #define OP_PCL_TLS12_AES_256_CBC_SHA384 0xff63 | 958 | #define OP_PCL_TLS12_AES_256_CBC_SHA384 0xff63 |
959 | #define OP_PCL_TLS12_AES_256_CBC_SHA512 0xff65 | 959 | #define OP_PCL_TLS12_AES_256_CBC_SHA512 0xff65 |
960 | 960 | ||
961 | /* For DTLS - OP_PCLID_DTLS */ | 961 | /* For DTLS - OP_PCLID_DTLS */ |
962 | 962 | ||
963 | #define OP_PCL_DTLS_AES_128_CBC_SHA 0x002f | 963 | #define OP_PCL_DTLS_AES_128_CBC_SHA 0x002f |
964 | #define OP_PCL_DTLS_AES_128_CBC_SHA_2 0x0030 | 964 | #define OP_PCL_DTLS_AES_128_CBC_SHA_2 0x0030 |
965 | #define OP_PCL_DTLS_AES_128_CBC_SHA_3 0x0031 | 965 | #define OP_PCL_DTLS_AES_128_CBC_SHA_3 0x0031 |
966 | #define OP_PCL_DTLS_AES_128_CBC_SHA_4 0x0032 | 966 | #define OP_PCL_DTLS_AES_128_CBC_SHA_4 0x0032 |
967 | #define OP_PCL_DTLS_AES_128_CBC_SHA_5 0x0033 | 967 | #define OP_PCL_DTLS_AES_128_CBC_SHA_5 0x0033 |
968 | #define OP_PCL_DTLS_AES_128_CBC_SHA_6 0x0034 | 968 | #define OP_PCL_DTLS_AES_128_CBC_SHA_6 0x0034 |
969 | #define OP_PCL_DTLS_AES_128_CBC_SHA_7 0x008c | 969 | #define OP_PCL_DTLS_AES_128_CBC_SHA_7 0x008c |
970 | #define OP_PCL_DTLS_AES_128_CBC_SHA_8 0x0090 | 970 | #define OP_PCL_DTLS_AES_128_CBC_SHA_8 0x0090 |
971 | #define OP_PCL_DTLS_AES_128_CBC_SHA_9 0x0094 | 971 | #define OP_PCL_DTLS_AES_128_CBC_SHA_9 0x0094 |
972 | #define OP_PCL_DTLS_AES_128_CBC_SHA_10 0xc004 | 972 | #define OP_PCL_DTLS_AES_128_CBC_SHA_10 0xc004 |
973 | #define OP_PCL_DTLS_AES_128_CBC_SHA_11 0xc009 | 973 | #define OP_PCL_DTLS_AES_128_CBC_SHA_11 0xc009 |
974 | #define OP_PCL_DTLS_AES_128_CBC_SHA_12 0xc00e | 974 | #define OP_PCL_DTLS_AES_128_CBC_SHA_12 0xc00e |
975 | #define OP_PCL_DTLS_AES_128_CBC_SHA_13 0xc013 | 975 | #define OP_PCL_DTLS_AES_128_CBC_SHA_13 0xc013 |
976 | #define OP_PCL_DTLS_AES_128_CBC_SHA_14 0xc018 | 976 | #define OP_PCL_DTLS_AES_128_CBC_SHA_14 0xc018 |
977 | #define OP_PCL_DTLS_AES_128_CBC_SHA_15 0xc01d | 977 | #define OP_PCL_DTLS_AES_128_CBC_SHA_15 0xc01d |
978 | #define OP_PCL_DTLS_AES_128_CBC_SHA_16 0xc01e | 978 | #define OP_PCL_DTLS_AES_128_CBC_SHA_16 0xc01e |
979 | #define OP_PCL_DTLS_AES_128_CBC_SHA_17 0xc01f | 979 | #define OP_PCL_DTLS_AES_128_CBC_SHA_17 0xc01f |
980 | 980 | ||
981 | #define OP_PCL_DTLS_AES_256_CBC_SHA 0x0035 | 981 | #define OP_PCL_DTLS_AES_256_CBC_SHA 0x0035 |
982 | #define OP_PCL_DTLS_AES_256_CBC_SHA_2 0x0036 | 982 | #define OP_PCL_DTLS_AES_256_CBC_SHA_2 0x0036 |
983 | #define OP_PCL_DTLS_AES_256_CBC_SHA_3 0x0037 | 983 | #define OP_PCL_DTLS_AES_256_CBC_SHA_3 0x0037 |
984 | #define OP_PCL_DTLS_AES_256_CBC_SHA_4 0x0038 | 984 | #define OP_PCL_DTLS_AES_256_CBC_SHA_4 0x0038 |
985 | #define OP_PCL_DTLS_AES_256_CBC_SHA_5 0x0039 | 985 | #define OP_PCL_DTLS_AES_256_CBC_SHA_5 0x0039 |
986 | #define OP_PCL_DTLS_AES_256_CBC_SHA_6 0x003a | 986 | #define OP_PCL_DTLS_AES_256_CBC_SHA_6 0x003a |
987 | #define OP_PCL_DTLS_AES_256_CBC_SHA_7 0x008d | 987 | #define OP_PCL_DTLS_AES_256_CBC_SHA_7 0x008d |
988 | #define OP_PCL_DTLS_AES_256_CBC_SHA_8 0x0091 | 988 | #define OP_PCL_DTLS_AES_256_CBC_SHA_8 0x0091 |
989 | #define OP_PCL_DTLS_AES_256_CBC_SHA_9 0x0095 | 989 | #define OP_PCL_DTLS_AES_256_CBC_SHA_9 0x0095 |
990 | #define OP_PCL_DTLS_AES_256_CBC_SHA_10 0xc005 | 990 | #define OP_PCL_DTLS_AES_256_CBC_SHA_10 0xc005 |
991 | #define OP_PCL_DTLS_AES_256_CBC_SHA_11 0xc00a | 991 | #define OP_PCL_DTLS_AES_256_CBC_SHA_11 0xc00a |
992 | #define OP_PCL_DTLS_AES_256_CBC_SHA_12 0xc00f | 992 | #define OP_PCL_DTLS_AES_256_CBC_SHA_12 0xc00f |
993 | #define OP_PCL_DTLS_AES_256_CBC_SHA_13 0xc014 | 993 | #define OP_PCL_DTLS_AES_256_CBC_SHA_13 0xc014 |
994 | #define OP_PCL_DTLS_AES_256_CBC_SHA_14 0xc019 | 994 | #define OP_PCL_DTLS_AES_256_CBC_SHA_14 0xc019 |
995 | #define OP_PCL_DTLS_AES_256_CBC_SHA_15 0xc020 | 995 | #define OP_PCL_DTLS_AES_256_CBC_SHA_15 0xc020 |
996 | #define OP_PCL_DTLS_AES_256_CBC_SHA_16 0xc021 | 996 | #define OP_PCL_DTLS_AES_256_CBC_SHA_16 0xc021 |
997 | #define OP_PCL_DTLS_AES_256_CBC_SHA_17 0xc022 | 997 | #define OP_PCL_DTLS_AES_256_CBC_SHA_17 0xc022 |
998 | 998 | ||
999 | /* #define OP_PCL_DTLS_3DES_EDE_CBC_MD5 0x0023 */ | 999 | /* #define OP_PCL_DTLS_3DES_EDE_CBC_MD5 0x0023 */ |
1000 | 1000 | ||
1001 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA 0x001f | 1001 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA 0x001f |
1002 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_2 0x008b | 1002 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_2 0x008b |
1003 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_3 0x008f | 1003 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_3 0x008f |
1004 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_4 0x0093 | 1004 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_4 0x0093 |
1005 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_5 0x000a | 1005 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_5 0x000a |
1006 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_6 0x000d | 1006 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_6 0x000d |
1007 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_7 0x0010 | 1007 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_7 0x0010 |
1008 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_8 0x0013 | 1008 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_8 0x0013 |
1009 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_9 0x0016 | 1009 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_9 0x0016 |
1010 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_10 0x001b | 1010 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_10 0x001b |
1011 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_11 0xc003 | 1011 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_11 0xc003 |
1012 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_12 0xc008 | 1012 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_12 0xc008 |
1013 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_13 0xc00d | 1013 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_13 0xc00d |
1014 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_14 0xc012 | 1014 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_14 0xc012 |
1015 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_15 0xc017 | 1015 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_15 0xc017 |
1016 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_16 0xc01a | 1016 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_16 0xc01a |
1017 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_17 0xc01b | 1017 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_17 0xc01b |
1018 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_18 0xc01c | 1018 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA_18 0xc01c |
1019 | 1019 | ||
1020 | #define OP_PCL_DTLS_DES40_CBC_MD5 0x0029 | 1020 | #define OP_PCL_DTLS_DES40_CBC_MD5 0x0029 |
1021 | 1021 | ||
1022 | #define OP_PCL_DTLS_DES_CBC_MD5 0x0022 | 1022 | #define OP_PCL_DTLS_DES_CBC_MD5 0x0022 |
1023 | 1023 | ||
1024 | #define OP_PCL_DTLS_DES40_CBC_SHA 0x0008 | 1024 | #define OP_PCL_DTLS_DES40_CBC_SHA 0x0008 |
1025 | #define OP_PCL_DTLS_DES40_CBC_SHA_2 0x000b | 1025 | #define OP_PCL_DTLS_DES40_CBC_SHA_2 0x000b |
1026 | #define OP_PCL_DTLS_DES40_CBC_SHA_3 0x000e | 1026 | #define OP_PCL_DTLS_DES40_CBC_SHA_3 0x000e |
1027 | #define OP_PCL_DTLS_DES40_CBC_SHA_4 0x0011 | 1027 | #define OP_PCL_DTLS_DES40_CBC_SHA_4 0x0011 |
1028 | #define OP_PCL_DTLS_DES40_CBC_SHA_5 0x0014 | 1028 | #define OP_PCL_DTLS_DES40_CBC_SHA_5 0x0014 |
1029 | #define OP_PCL_DTLS_DES40_CBC_SHA_6 0x0019 | 1029 | #define OP_PCL_DTLS_DES40_CBC_SHA_6 0x0019 |
1030 | #define OP_PCL_DTLS_DES40_CBC_SHA_7 0x0026 | 1030 | #define OP_PCL_DTLS_DES40_CBC_SHA_7 0x0026 |
1031 | 1031 | ||
1032 | 1032 | ||
1033 | #define OP_PCL_DTLS_DES_CBC_SHA 0x001e | 1033 | #define OP_PCL_DTLS_DES_CBC_SHA 0x001e |
1034 | #define OP_PCL_DTLS_DES_CBC_SHA_2 0x0009 | 1034 | #define OP_PCL_DTLS_DES_CBC_SHA_2 0x0009 |
1035 | #define OP_PCL_DTLS_DES_CBC_SHA_3 0x000c | 1035 | #define OP_PCL_DTLS_DES_CBC_SHA_3 0x000c |
1036 | #define OP_PCL_DTLS_DES_CBC_SHA_4 0x000f | 1036 | #define OP_PCL_DTLS_DES_CBC_SHA_4 0x000f |
1037 | #define OP_PCL_DTLS_DES_CBC_SHA_5 0x0012 | 1037 | #define OP_PCL_DTLS_DES_CBC_SHA_5 0x0012 |
1038 | #define OP_PCL_DTLS_DES_CBC_SHA_6 0x0015 | 1038 | #define OP_PCL_DTLS_DES_CBC_SHA_6 0x0015 |
1039 | #define OP_PCL_DTLS_DES_CBC_SHA_7 0x001a | 1039 | #define OP_PCL_DTLS_DES_CBC_SHA_7 0x001a |
1040 | 1040 | ||
1041 | 1041 | ||
1042 | #define OP_PCL_DTLS_3DES_EDE_CBC_MD5 0xff23 | 1042 | #define OP_PCL_DTLS_3DES_EDE_CBC_MD5 0xff23 |
1043 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA160 0xff30 | 1043 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA160 0xff30 |
1044 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA224 0xff34 | 1044 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA224 0xff34 |
1045 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA256 0xff36 | 1045 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA256 0xff36 |
1046 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA384 0xff33 | 1046 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA384 0xff33 |
1047 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA512 0xff35 | 1047 | #define OP_PCL_DTLS_3DES_EDE_CBC_SHA512 0xff35 |
1048 | #define OP_PCL_DTLS_AES_128_CBC_SHA160 0xff80 | 1048 | #define OP_PCL_DTLS_AES_128_CBC_SHA160 0xff80 |
1049 | #define OP_PCL_DTLS_AES_128_CBC_SHA224 0xff84 | 1049 | #define OP_PCL_DTLS_AES_128_CBC_SHA224 0xff84 |
1050 | #define OP_PCL_DTLS_AES_128_CBC_SHA256 0xff86 | 1050 | #define OP_PCL_DTLS_AES_128_CBC_SHA256 0xff86 |
1051 | #define OP_PCL_DTLS_AES_128_CBC_SHA384 0xff83 | 1051 | #define OP_PCL_DTLS_AES_128_CBC_SHA384 0xff83 |
1052 | #define OP_PCL_DTLS_AES_128_CBC_SHA512 0xff85 | 1052 | #define OP_PCL_DTLS_AES_128_CBC_SHA512 0xff85 |
1053 | #define OP_PCL_DTLS_AES_192_CBC_SHA160 0xff20 | 1053 | #define OP_PCL_DTLS_AES_192_CBC_SHA160 0xff20 |
1054 | #define OP_PCL_DTLS_AES_192_CBC_SHA224 0xff24 | 1054 | #define OP_PCL_DTLS_AES_192_CBC_SHA224 0xff24 |
1055 | #define OP_PCL_DTLS_AES_192_CBC_SHA256 0xff26 | 1055 | #define OP_PCL_DTLS_AES_192_CBC_SHA256 0xff26 |
1056 | #define OP_PCL_DTLS_AES_192_CBC_SHA384 0xff23 | 1056 | #define OP_PCL_DTLS_AES_192_CBC_SHA384 0xff23 |
1057 | #define OP_PCL_DTLS_AES_192_CBC_SHA512 0xff25 | 1057 | #define OP_PCL_DTLS_AES_192_CBC_SHA512 0xff25 |
1058 | #define OP_PCL_DTLS_AES_256_CBC_SHA160 0xff60 | 1058 | #define OP_PCL_DTLS_AES_256_CBC_SHA160 0xff60 |
1059 | #define OP_PCL_DTLS_AES_256_CBC_SHA224 0xff64 | 1059 | #define OP_PCL_DTLS_AES_256_CBC_SHA224 0xff64 |
1060 | #define OP_PCL_DTLS_AES_256_CBC_SHA256 0xff66 | 1060 | #define OP_PCL_DTLS_AES_256_CBC_SHA256 0xff66 |
1061 | #define OP_PCL_DTLS_AES_256_CBC_SHA384 0xff63 | 1061 | #define OP_PCL_DTLS_AES_256_CBC_SHA384 0xff63 |
1062 | #define OP_PCL_DTLS_AES_256_CBC_SHA512 0xff65 | 1062 | #define OP_PCL_DTLS_AES_256_CBC_SHA512 0xff65 |
1063 | 1063 | ||
1064 | /* 802.16 WiMAX protinfos */ | 1064 | /* 802.16 WiMAX protinfos */ |
1065 | #define OP_PCL_WIMAX_OFDM 0x0201 | 1065 | #define OP_PCL_WIMAX_OFDM 0x0201 |
1066 | #define OP_PCL_WIMAX_OFDMA 0x0231 | 1066 | #define OP_PCL_WIMAX_OFDMA 0x0231 |
1067 | 1067 | ||
1068 | /* 802.11 WiFi protinfos */ | 1068 | /* 802.11 WiFi protinfos */ |
1069 | #define OP_PCL_WIFI 0xac04 | 1069 | #define OP_PCL_WIFI 0xac04 |
1070 | 1070 | ||
1071 | /* MacSec protinfos */ | 1071 | /* MacSec protinfos */ |
1072 | #define OP_PCL_MACSEC 0x0001 | 1072 | #define OP_PCL_MACSEC 0x0001 |
1073 | 1073 | ||
1074 | /* PKI unidirectional protocol protinfo bits */ | 1074 | /* PKI unidirectional protocol protinfo bits */ |
1075 | #define OP_PCL_PKPROT_TEST 0x0008 | 1075 | #define OP_PCL_PKPROT_TEST 0x0008 |
1076 | #define OP_PCL_PKPROT_DECRYPT 0x0004 | 1076 | #define OP_PCL_PKPROT_DECRYPT 0x0004 |
1077 | #define OP_PCL_PKPROT_ECC 0x0002 | 1077 | #define OP_PCL_PKPROT_ECC 0x0002 |
1078 | #define OP_PCL_PKPROT_F2M 0x0001 | 1078 | #define OP_PCL_PKPROT_F2M 0x0001 |
1079 | 1079 | ||
1080 | /* For non-protocol/alg-only op commands */ | 1080 | /* For non-protocol/alg-only op commands */ |
1081 | #define OP_ALG_TYPE_SHIFT 24 | 1081 | #define OP_ALG_TYPE_SHIFT 24 |
@@ -1181,114 +1181,114 @@ | |||
1181 | #define OP_ALG_ENCRYPT 1 | 1181 | #define OP_ALG_ENCRYPT 1 |
1182 | 1182 | ||
1183 | /* PKHA algorithm type set */ | 1183 | /* PKHA algorithm type set */ |
1184 | #define OP_ALG_PK 0x00800000 | 1184 | #define OP_ALG_PK 0x00800000 |
1185 | #define OP_ALG_PK_FUN_MASK 0x3f /* clrmem, modmath, or cpymem */ | 1185 | #define OP_ALG_PK_FUN_MASK 0x3f /* clrmem, modmath, or cpymem */ |
1186 | 1186 | ||
1187 | /* PKHA mode clear memory functions */ | 1187 | /* PKHA mode clear memory functions */ |
1188 | #define OP_ALG_PKMODE_A_RAM 0x80000 | 1188 | #define OP_ALG_PKMODE_A_RAM 0x80000 |
1189 | #define OP_ALG_PKMODE_B_RAM 0x40000 | 1189 | #define OP_ALG_PKMODE_B_RAM 0x40000 |
1190 | #define OP_ALG_PKMODE_E_RAM 0x20000 | 1190 | #define OP_ALG_PKMODE_E_RAM 0x20000 |
1191 | #define OP_ALG_PKMODE_N_RAM 0x10000 | 1191 | #define OP_ALG_PKMODE_N_RAM 0x10000 |
1192 | #define OP_ALG_PKMODE_CLEARMEM 0x00001 | 1192 | #define OP_ALG_PKMODE_CLEARMEM 0x00001 |
1193 | 1193 | ||
1194 | /* PKHA mode modular-arithmetic functions */ | 1194 | /* PKHA mode modular-arithmetic functions */ |
1195 | #define OP_ALG_PKMODE_MOD_IN_MONTY 0x80000 | 1195 | #define OP_ALG_PKMODE_MOD_IN_MONTY 0x80000 |
1196 | #define OP_ALG_PKMODE_MOD_OUT_MONTY 0x40000 | 1196 | #define OP_ALG_PKMODE_MOD_OUT_MONTY 0x40000 |
1197 | #define OP_ALG_PKMODE_MOD_F2M 0x20000 | 1197 | #define OP_ALG_PKMODE_MOD_F2M 0x20000 |
1198 | #define OP_ALG_PKMODE_MOD_R2_IN 0x10000 | 1198 | #define OP_ALG_PKMODE_MOD_R2_IN 0x10000 |
1199 | #define OP_ALG_PKMODE_PRJECTV 0x00800 | 1199 | #define OP_ALG_PKMODE_PRJECTV 0x00800 |
1200 | #define OP_ALG_PKMODE_TIME_EQ 0x400 | 1200 | #define OP_ALG_PKMODE_TIME_EQ 0x400 |
1201 | #define OP_ALG_PKMODE_OUT_B 0x000 | 1201 | #define OP_ALG_PKMODE_OUT_B 0x000 |
1202 | #define OP_ALG_PKMODE_OUT_A 0x100 | 1202 | #define OP_ALG_PKMODE_OUT_A 0x100 |
1203 | #define OP_ALG_PKMODE_MOD_ADD 0x002 | 1203 | #define OP_ALG_PKMODE_MOD_ADD 0x002 |
1204 | #define OP_ALG_PKMODE_MOD_SUB_AB 0x003 | 1204 | #define OP_ALG_PKMODE_MOD_SUB_AB 0x003 |
1205 | #define OP_ALG_PKMODE_MOD_SUB_BA 0x004 | 1205 | #define OP_ALG_PKMODE_MOD_SUB_BA 0x004 |
1206 | #define OP_ALG_PKMODE_MOD_MULT 0x005 | 1206 | #define OP_ALG_PKMODE_MOD_MULT 0x005 |
1207 | #define OP_ALG_PKMODE_MOD_EXPO 0x006 | 1207 | #define OP_ALG_PKMODE_MOD_EXPO 0x006 |
1208 | #define OP_ALG_PKMODE_MOD_REDUCT 0x007 | 1208 | #define OP_ALG_PKMODE_MOD_REDUCT 0x007 |
1209 | #define OP_ALG_PKMODE_MOD_INV 0x008 | 1209 | #define OP_ALG_PKMODE_MOD_INV 0x008 |
1210 | #define OP_ALG_PKMODE_MOD_ECC_ADD 0x009 | 1210 | #define OP_ALG_PKMODE_MOD_ECC_ADD 0x009 |
1211 | #define OP_ALG_PKMODE_MOD_ECC_DBL 0x00a | 1211 | #define OP_ALG_PKMODE_MOD_ECC_DBL 0x00a |
1212 | #define OP_ALG_PKMODE_MOD_ECC_MULT 0x00b | 1212 | #define OP_ALG_PKMODE_MOD_ECC_MULT 0x00b |
1213 | #define OP_ALG_PKMODE_MOD_MONT_CNST 0x00c | 1213 | #define OP_ALG_PKMODE_MOD_MONT_CNST 0x00c |
1214 | #define OP_ALG_PKMODE_MOD_CRT_CNST 0x00d | 1214 | #define OP_ALG_PKMODE_MOD_CRT_CNST 0x00d |
1215 | #define OP_ALG_PKMODE_MOD_GCD 0x00e | 1215 | #define OP_ALG_PKMODE_MOD_GCD 0x00e |
1216 | #define OP_ALG_PKMODE_MOD_PRIMALITY 0x00f | 1216 | #define OP_ALG_PKMODE_MOD_PRIMALITY 0x00f |
1217 | 1217 | ||
1218 | /* PKHA mode copy-memory functions */ | 1218 | /* PKHA mode copy-memory functions */ |
1219 | #define OP_ALG_PKMODE_SRC_REG_SHIFT 13 | 1219 | #define OP_ALG_PKMODE_SRC_REG_SHIFT 13 |
1220 | #define OP_ALG_PKMODE_SRC_REG_MASK (7 << OP_ALG_PKMODE_SRC_REG_SHIFT) | 1220 | #define OP_ALG_PKMODE_SRC_REG_MASK (7 << OP_ALG_PKMODE_SRC_REG_SHIFT) |
1221 | #define OP_ALG_PKMODE_DST_REG_SHIFT 10 | 1221 | #define OP_ALG_PKMODE_DST_REG_SHIFT 10 |
1222 | #define OP_ALG_PKMODE_DST_REG_MASK (7 << OP_ALG_PKMODE_DST_REG_SHIFT) | 1222 | #define OP_ALG_PKMODE_DST_REG_MASK (7 << OP_ALG_PKMODE_DST_REG_SHIFT) |
1223 | #define OP_ALG_PKMODE_SRC_SEG_SHIFT 8 | 1223 | #define OP_ALG_PKMODE_SRC_SEG_SHIFT 8 |
1224 | #define OP_ALG_PKMODE_SRC_SEG_MASK (3 << OP_ALG_PKMODE_SRC_SEG_SHIFT) | 1224 | #define OP_ALG_PKMODE_SRC_SEG_MASK (3 << OP_ALG_PKMODE_SRC_SEG_SHIFT) |
1225 | #define OP_ALG_PKMODE_DST_SEG_SHIFT 6 | 1225 | #define OP_ALG_PKMODE_DST_SEG_SHIFT 6 |
1226 | #define OP_ALG_PKMODE_DST_SEG_MASK (3 << OP_ALG_PKMODE_DST_SEG_SHIFT) | 1226 | #define OP_ALG_PKMODE_DST_SEG_MASK (3 << OP_ALG_PKMODE_DST_SEG_SHIFT) |
1227 | 1227 | ||
1228 | #define OP_ALG_PKMODE_SRC_REG_A (0 << OP_ALG_PKMODE_SRC_REG_SHIFT) | 1228 | #define OP_ALG_PKMODE_SRC_REG_A (0 << OP_ALG_PKMODE_SRC_REG_SHIFT) |
1229 | #define OP_ALG_PKMODE_SRC_REG_B (1 << OP_ALG_PKMODE_SRC_REG_SHIFT) | 1229 | #define OP_ALG_PKMODE_SRC_REG_B (1 << OP_ALG_PKMODE_SRC_REG_SHIFT) |
1230 | #define OP_ALG_PKMODE_SRC_REG_N (3 << OP_ALG_PKMODE_SRC_REG_SHIFT) | 1230 | #define OP_ALG_PKMODE_SRC_REG_N (3 << OP_ALG_PKMODE_SRC_REG_SHIFT) |
1231 | #define OP_ALG_PKMODE_DST_REG_A (0 << OP_ALG_PKMODE_DST_REG_SHIFT) | 1231 | #define OP_ALG_PKMODE_DST_REG_A (0 << OP_ALG_PKMODE_DST_REG_SHIFT) |
1232 | #define OP_ALG_PKMODE_DST_REG_B (1 << OP_ALG_PKMODE_DST_REG_SHIFT) | 1232 | #define OP_ALG_PKMODE_DST_REG_B (1 << OP_ALG_PKMODE_DST_REG_SHIFT) |
1233 | #define OP_ALG_PKMODE_DST_REG_E (2 << OP_ALG_PKMODE_DST_REG_SHIFT) | 1233 | #define OP_ALG_PKMODE_DST_REG_E (2 << OP_ALG_PKMODE_DST_REG_SHIFT) |
1234 | #define OP_ALG_PKMODE_DST_REG_N (3 << OP_ALG_PKMODE_DST_REG_SHIFT) | 1234 | #define OP_ALG_PKMODE_DST_REG_N (3 << OP_ALG_PKMODE_DST_REG_SHIFT) |
1235 | #define OP_ALG_PKMODE_SRC_SEG_0 (0 << OP_ALG_PKMODE_SRC_SEG_SHIFT) | 1235 | #define OP_ALG_PKMODE_SRC_SEG_0 (0 << OP_ALG_PKMODE_SRC_SEG_SHIFT) |
1236 | #define OP_ALG_PKMODE_SRC_SEG_1 (1 << OP_ALG_PKMODE_SRC_SEG_SHIFT) | 1236 | #define OP_ALG_PKMODE_SRC_SEG_1 (1 << OP_ALG_PKMODE_SRC_SEG_SHIFT) |
1237 | #define OP_ALG_PKMODE_SRC_SEG_2 (2 << OP_ALG_PKMODE_SRC_SEG_SHIFT) | 1237 | #define OP_ALG_PKMODE_SRC_SEG_2 (2 << OP_ALG_PKMODE_SRC_SEG_SHIFT) |
1238 | #define OP_ALG_PKMODE_SRC_SEG_3 (3 << OP_ALG_PKMODE_SRC_SEG_SHIFT) | 1238 | #define OP_ALG_PKMODE_SRC_SEG_3 (3 << OP_ALG_PKMODE_SRC_SEG_SHIFT) |
1239 | #define OP_ALG_PKMODE_DST_SEG_0 (0 << OP_ALG_PKMODE_DST_SEG_SHIFT) | 1239 | #define OP_ALG_PKMODE_DST_SEG_0 (0 << OP_ALG_PKMODE_DST_SEG_SHIFT) |
1240 | #define OP_ALG_PKMODE_DST_SEG_1 (1 << OP_ALG_PKMODE_DST_SEG_SHIFT) | 1240 | #define OP_ALG_PKMODE_DST_SEG_1 (1 << OP_ALG_PKMODE_DST_SEG_SHIFT) |
1241 | #define OP_ALG_PKMODE_DST_SEG_2 (2 << OP_ALG_PKMODE_DST_SEG_SHIFT) | 1241 | #define OP_ALG_PKMODE_DST_SEG_2 (2 << OP_ALG_PKMODE_DST_SEG_SHIFT) |
1242 | #define OP_ALG_PKMODE_DST_SEG_3 (3 << OP_ALG_PKMODE_DST_SEG_SHIFT) | 1242 | #define OP_ALG_PKMODE_DST_SEG_3 (3 << OP_ALG_PKMODE_DST_SEG_SHIFT) |
1243 | #define OP_ALG_PKMODE_CPYMEM_N_SZ 0x80 | 1243 | #define OP_ALG_PKMODE_CPYMEM_N_SZ 0x80 |
1244 | #define OP_ALG_PKMODE_CPYMEM_SRC_SZ 0x81 | 1244 | #define OP_ALG_PKMODE_CPYMEM_SRC_SZ 0x81 |
1245 | 1245 | ||
1246 | /* | 1246 | /* |
1247 | * SEQ_IN_PTR Command Constructs | 1247 | * SEQ_IN_PTR Command Constructs |
1248 | */ | 1248 | */ |
1249 | 1249 | ||
1250 | /* Release Buffers */ | 1250 | /* Release Buffers */ |
1251 | #define SQIN_RBS 0x04000000 | 1251 | #define SQIN_RBS 0x04000000 |
1252 | 1252 | ||
1253 | /* Sequence pointer is really a descriptor */ | 1253 | /* Sequence pointer is really a descriptor */ |
1254 | #define SQIN_INL 0x02000000 | 1254 | #define SQIN_INL 0x02000000 |
1255 | 1255 | ||
1256 | /* Sequence pointer is a scatter-gather table */ | 1256 | /* Sequence pointer is a scatter-gather table */ |
1257 | #define SQIN_SGF 0x01000000 | 1257 | #define SQIN_SGF 0x01000000 |
1258 | 1258 | ||
1259 | /* Appends to a previous pointer */ | 1259 | /* Appends to a previous pointer */ |
1260 | #define SQIN_PRE 0x00800000 | 1260 | #define SQIN_PRE 0x00800000 |
1261 | 1261 | ||
1262 | /* Use extended length following pointer */ | 1262 | /* Use extended length following pointer */ |
1263 | #define SQIN_EXT 0x00400000 | 1263 | #define SQIN_EXT 0x00400000 |
1264 | 1264 | ||
1265 | /* Restore sequence with pointer/length */ | 1265 | /* Restore sequence with pointer/length */ |
1266 | #define SQIN_RTO 0x00200000 | 1266 | #define SQIN_RTO 0x00200000 |
1267 | 1267 | ||
1268 | /* Replace job descriptor */ | 1268 | /* Replace job descriptor */ |
1269 | #define SQIN_RJD 0x00100000 | 1269 | #define SQIN_RJD 0x00100000 |
1270 | 1270 | ||
1271 | #define SQIN_LEN_SHIFT 0 | 1271 | #define SQIN_LEN_SHIFT 0 |
1272 | #define SQIN_LEN_MASK (0xffff << SQIN_LEN_SHIFT) | 1272 | #define SQIN_LEN_MASK (0xffff << SQIN_LEN_SHIFT) |
1273 | 1273 | ||
1274 | /* | 1274 | /* |
1275 | * SEQ_OUT_PTR Command Constructs | 1275 | * SEQ_OUT_PTR Command Constructs |
1276 | */ | 1276 | */ |
1277 | 1277 | ||
1278 | /* Sequence pointer is a scatter-gather table */ | 1278 | /* Sequence pointer is a scatter-gather table */ |
1279 | #define SQOUT_SGF 0x01000000 | 1279 | #define SQOUT_SGF 0x01000000 |
1280 | 1280 | ||
1281 | /* Appends to a previous pointer */ | 1281 | /* Appends to a previous pointer */ |
1282 | #define SQOUT_PRE 0x00800000 | 1282 | #define SQOUT_PRE 0x00800000 |
1283 | 1283 | ||
1284 | /* Restore sequence with pointer/length */ | 1284 | /* Restore sequence with pointer/length */ |
1285 | #define SQOUT_RTO 0x00200000 | 1285 | #define SQOUT_RTO 0x00200000 |
1286 | 1286 | ||
1287 | /* Use extended length following pointer */ | 1287 | /* Use extended length following pointer */ |
1288 | #define SQOUT_EXT 0x00400000 | 1288 | #define SQOUT_EXT 0x00400000 |
1289 | 1289 | ||
1290 | #define SQOUT_LEN_SHIFT 0 | 1290 | #define SQOUT_LEN_SHIFT 0 |
1291 | #define SQOUT_LEN_MASK (0xffff << SQOUT_LEN_SHIFT) | 1291 | #define SQOUT_LEN_MASK (0xffff << SQOUT_LEN_SHIFT) |
1292 | 1292 | ||
1293 | 1293 | ||
1294 | /* | 1294 | /* |
@@ -1296,196 +1296,196 @@ | |||
1296 | */ | 1296 | */ |
1297 | 1297 | ||
1298 | /* TYPE field is all that's relevant */ | 1298 | /* TYPE field is all that's relevant */ |
1299 | #define SIGN_TYPE_SHIFT 16 | 1299 | #define SIGN_TYPE_SHIFT 16 |
1300 | #define SIGN_TYPE_MASK (0x0f << SIGN_TYPE_SHIFT) | 1300 | #define SIGN_TYPE_MASK (0x0f << SIGN_TYPE_SHIFT) |
1301 | 1301 | ||
1302 | #define SIGN_TYPE_FINAL (0x00 << SIGN_TYPE_SHIFT) | 1302 | #define SIGN_TYPE_FINAL (0x00 << SIGN_TYPE_SHIFT) |
1303 | #define SIGN_TYPE_FINAL_RESTORE (0x01 << SIGN_TYPE_SHIFT) | 1303 | #define SIGN_TYPE_FINAL_RESTORE (0x01 << SIGN_TYPE_SHIFT) |
1304 | #define SIGN_TYPE_FINAL_NONZERO (0x02 << SIGN_TYPE_SHIFT) | 1304 | #define SIGN_TYPE_FINAL_NONZERO (0x02 << SIGN_TYPE_SHIFT) |
1305 | #define SIGN_TYPE_IMM_2 (0x0a << SIGN_TYPE_SHIFT) | 1305 | #define SIGN_TYPE_IMM_2 (0x0a << SIGN_TYPE_SHIFT) |
1306 | #define SIGN_TYPE_IMM_3 (0x0b << SIGN_TYPE_SHIFT) | 1306 | #define SIGN_TYPE_IMM_3 (0x0b << SIGN_TYPE_SHIFT) |
1307 | #define SIGN_TYPE_IMM_4 (0x0c << SIGN_TYPE_SHIFT) | 1307 | #define SIGN_TYPE_IMM_4 (0x0c << SIGN_TYPE_SHIFT) |
1308 | 1308 | ||
1309 | /* | 1309 | /* |
1310 | * MOVE Command Constructs | 1310 | * MOVE Command Constructs |
1311 | */ | 1311 | */ |
1312 | 1312 | ||
1313 | #define MOVE_AUX_SHIFT 25 | 1313 | #define MOVE_AUX_SHIFT 25 |
1314 | #define MOVE_AUX_MASK (3 << MOVE_AUX_SHIFT) | 1314 | #define MOVE_AUX_MASK (3 << MOVE_AUX_SHIFT) |
1315 | #define MOVE_AUX_MS (2 << MOVE_AUX_SHIFT) | 1315 | #define MOVE_AUX_MS (2 << MOVE_AUX_SHIFT) |
1316 | #define MOVE_AUX_LS (1 << MOVE_AUX_SHIFT) | 1316 | #define MOVE_AUX_LS (1 << MOVE_AUX_SHIFT) |
1317 | 1317 | ||
1318 | #define MOVE_WAITCOMP_SHIFT 24 | 1318 | #define MOVE_WAITCOMP_SHIFT 24 |
1319 | #define MOVE_WAITCOMP_MASK (1 << MOVE_WAITCOMP_SHIFT) | 1319 | #define MOVE_WAITCOMP_MASK (1 << MOVE_WAITCOMP_SHIFT) |
1320 | #define MOVE_WAITCOMP (1 << MOVE_WAITCOMP_SHIFT) | 1320 | #define MOVE_WAITCOMP (1 << MOVE_WAITCOMP_SHIFT) |
1321 | 1321 | ||
1322 | #define MOVE_SRC_SHIFT 20 | 1322 | #define MOVE_SRC_SHIFT 20 |
1323 | #define MOVE_SRC_MASK (0x0f << MOVE_SRC_SHIFT) | 1323 | #define MOVE_SRC_MASK (0x0f << MOVE_SRC_SHIFT) |
1324 | #define MOVE_SRC_CLASS1CTX (0x00 << MOVE_SRC_SHIFT) | 1324 | #define MOVE_SRC_CLASS1CTX (0x00 << MOVE_SRC_SHIFT) |
1325 | #define MOVE_SRC_CLASS2CTX (0x01 << MOVE_SRC_SHIFT) | 1325 | #define MOVE_SRC_CLASS2CTX (0x01 << MOVE_SRC_SHIFT) |
1326 | #define MOVE_SRC_OUTFIFO (0x02 << MOVE_SRC_SHIFT) | 1326 | #define MOVE_SRC_OUTFIFO (0x02 << MOVE_SRC_SHIFT) |
1327 | #define MOVE_SRC_DESCBUF (0x03 << MOVE_SRC_SHIFT) | 1327 | #define MOVE_SRC_DESCBUF (0x03 << MOVE_SRC_SHIFT) |
1328 | #define MOVE_SRC_MATH0 (0x04 << MOVE_SRC_SHIFT) | 1328 | #define MOVE_SRC_MATH0 (0x04 << MOVE_SRC_SHIFT) |
1329 | #define MOVE_SRC_MATH1 (0x05 << MOVE_SRC_SHIFT) | 1329 | #define MOVE_SRC_MATH1 (0x05 << MOVE_SRC_SHIFT) |
1330 | #define MOVE_SRC_MATH2 (0x06 << MOVE_SRC_SHIFT) | 1330 | #define MOVE_SRC_MATH2 (0x06 << MOVE_SRC_SHIFT) |
1331 | #define MOVE_SRC_MATH3 (0x07 << MOVE_SRC_SHIFT) | 1331 | #define MOVE_SRC_MATH3 (0x07 << MOVE_SRC_SHIFT) |
1332 | #define MOVE_SRC_INFIFO (0x08 << MOVE_SRC_SHIFT) | 1332 | #define MOVE_SRC_INFIFO (0x08 << MOVE_SRC_SHIFT) |
1333 | #define MOVE_SRC_INFIFO_CL (0x09 << MOVE_SRC_SHIFT) | 1333 | #define MOVE_SRC_INFIFO_CL (0x09 << MOVE_SRC_SHIFT) |
1334 | 1334 | ||
1335 | #define MOVE_DEST_SHIFT 16 | 1335 | #define MOVE_DEST_SHIFT 16 |
1336 | #define MOVE_DEST_MASK (0x0f << MOVE_DEST_SHIFT) | 1336 | #define MOVE_DEST_MASK (0x0f << MOVE_DEST_SHIFT) |
1337 | #define MOVE_DEST_CLASS1CTX (0x00 << MOVE_DEST_SHIFT) | 1337 | #define MOVE_DEST_CLASS1CTX (0x00 << MOVE_DEST_SHIFT) |
1338 | #define MOVE_DEST_CLASS2CTX (0x01 << MOVE_DEST_SHIFT) | 1338 | #define MOVE_DEST_CLASS2CTX (0x01 << MOVE_DEST_SHIFT) |
1339 | #define MOVE_DEST_OUTFIFO (0x02 << MOVE_DEST_SHIFT) | 1339 | #define MOVE_DEST_OUTFIFO (0x02 << MOVE_DEST_SHIFT) |
1340 | #define MOVE_DEST_DESCBUF (0x03 << MOVE_DEST_SHIFT) | 1340 | #define MOVE_DEST_DESCBUF (0x03 << MOVE_DEST_SHIFT) |
1341 | #define MOVE_DEST_MATH0 (0x04 << MOVE_DEST_SHIFT) | 1341 | #define MOVE_DEST_MATH0 (0x04 << MOVE_DEST_SHIFT) |
1342 | #define MOVE_DEST_MATH1 (0x05 << MOVE_DEST_SHIFT) | 1342 | #define MOVE_DEST_MATH1 (0x05 << MOVE_DEST_SHIFT) |
1343 | #define MOVE_DEST_MATH2 (0x06 << MOVE_DEST_SHIFT) | 1343 | #define MOVE_DEST_MATH2 (0x06 << MOVE_DEST_SHIFT) |
1344 | #define MOVE_DEST_MATH3 (0x07 << MOVE_DEST_SHIFT) | 1344 | #define MOVE_DEST_MATH3 (0x07 << MOVE_DEST_SHIFT) |
1345 | #define MOVE_DEST_CLASS1INFIFO (0x08 << MOVE_DEST_SHIFT) | 1345 | #define MOVE_DEST_CLASS1INFIFO (0x08 << MOVE_DEST_SHIFT) |
1346 | #define MOVE_DEST_CLASS2INFIFO (0x09 << MOVE_DEST_SHIFT) | 1346 | #define MOVE_DEST_CLASS2INFIFO (0x09 << MOVE_DEST_SHIFT) |
1347 | #define MOVE_DEST_PK_A (0x0c << MOVE_DEST_SHIFT) | 1347 | #define MOVE_DEST_PK_A (0x0c << MOVE_DEST_SHIFT) |
1348 | #define MOVE_DEST_CLASS1KEY (0x0d << MOVE_DEST_SHIFT) | 1348 | #define MOVE_DEST_CLASS1KEY (0x0d << MOVE_DEST_SHIFT) |
1349 | #define MOVE_DEST_CLASS2KEY (0x0e << MOVE_DEST_SHIFT) | 1349 | #define MOVE_DEST_CLASS2KEY (0x0e << MOVE_DEST_SHIFT) |
1350 | 1350 | ||
1351 | #define MOVE_OFFSET_SHIFT 8 | 1351 | #define MOVE_OFFSET_SHIFT 8 |
1352 | #define MOVE_OFFSET_MASK (0xff << MOVE_OFFSET_SHIFT) | 1352 | #define MOVE_OFFSET_MASK (0xff << MOVE_OFFSET_SHIFT) |
1353 | 1353 | ||
1354 | #define MOVE_LEN_SHIFT 0 | 1354 | #define MOVE_LEN_SHIFT 0 |
1355 | #define MOVE_LEN_MASK (0xff << MOVE_LEN_SHIFT) | 1355 | #define MOVE_LEN_MASK (0xff << MOVE_LEN_SHIFT) |
1356 | 1356 | ||
1357 | #define MOVELEN_MRSEL_SHIFT 0 | 1357 | #define MOVELEN_MRSEL_SHIFT 0 |
1358 | #define MOVELEN_MRSEL_MASK (0x3 << MOVE_LEN_SHIFT) | 1358 | #define MOVELEN_MRSEL_MASK (0x3 << MOVE_LEN_SHIFT) |
1359 | 1359 | ||
1360 | /* | 1360 | /* |
1361 | * MATH Command Constructs | 1361 | * MATH Command Constructs |
1362 | */ | 1362 | */ |
1363 | 1363 | ||
1364 | #define MATH_IFB_SHIFT 26 | 1364 | #define MATH_IFB_SHIFT 26 |
1365 | #define MATH_IFB_MASK (1 << MATH_IFB_SHIFT) | 1365 | #define MATH_IFB_MASK (1 << MATH_IFB_SHIFT) |
1366 | #define MATH_IFB (1 << MATH_IFB_SHIFT) | 1366 | #define MATH_IFB (1 << MATH_IFB_SHIFT) |
1367 | 1367 | ||
1368 | #define MATH_NFU_SHIFT 25 | 1368 | #define MATH_NFU_SHIFT 25 |
1369 | #define MATH_NFU_MASK (1 << MATH_NFU_SHIFT) | 1369 | #define MATH_NFU_MASK (1 << MATH_NFU_SHIFT) |
1370 | #define MATH_NFU (1 << MATH_NFU_SHIFT) | 1370 | #define MATH_NFU (1 << MATH_NFU_SHIFT) |
1371 | 1371 | ||
1372 | #define MATH_STL_SHIFT 24 | 1372 | #define MATH_STL_SHIFT 24 |
1373 | #define MATH_STL_MASK (1 << MATH_STL_SHIFT) | 1373 | #define MATH_STL_MASK (1 << MATH_STL_SHIFT) |
1374 | #define MATH_STL (1 << MATH_STL_SHIFT) | 1374 | #define MATH_STL (1 << MATH_STL_SHIFT) |
1375 | 1375 | ||
1376 | /* Function selectors */ | 1376 | /* Function selectors */ |
1377 | #define MATH_FUN_SHIFT 20 | 1377 | #define MATH_FUN_SHIFT 20 |
1378 | #define MATH_FUN_MASK (0x0f << MATH_FUN_SHIFT) | 1378 | #define MATH_FUN_MASK (0x0f << MATH_FUN_SHIFT) |
1379 | #define MATH_FUN_ADD (0x00 << MATH_FUN_SHIFT) | 1379 | #define MATH_FUN_ADD (0x00 << MATH_FUN_SHIFT) |
1380 | #define MATH_FUN_ADDC (0x01 << MATH_FUN_SHIFT) | 1380 | #define MATH_FUN_ADDC (0x01 << MATH_FUN_SHIFT) |
1381 | #define MATH_FUN_SUB (0x02 << MATH_FUN_SHIFT) | 1381 | #define MATH_FUN_SUB (0x02 << MATH_FUN_SHIFT) |
1382 | #define MATH_FUN_SUBB (0x03 << MATH_FUN_SHIFT) | 1382 | #define MATH_FUN_SUBB (0x03 << MATH_FUN_SHIFT) |
1383 | #define MATH_FUN_OR (0x04 << MATH_FUN_SHIFT) | 1383 | #define MATH_FUN_OR (0x04 << MATH_FUN_SHIFT) |
1384 | #define MATH_FUN_AND (0x05 << MATH_FUN_SHIFT) | 1384 | #define MATH_FUN_AND (0x05 << MATH_FUN_SHIFT) |
1385 | #define MATH_FUN_XOR (0x06 << MATH_FUN_SHIFT) | 1385 | #define MATH_FUN_XOR (0x06 << MATH_FUN_SHIFT) |
1386 | #define MATH_FUN_LSHIFT (0x07 << MATH_FUN_SHIFT) | 1386 | #define MATH_FUN_LSHIFT (0x07 << MATH_FUN_SHIFT) |
1387 | #define MATH_FUN_RSHIFT (0x08 << MATH_FUN_SHIFT) | 1387 | #define MATH_FUN_RSHIFT (0x08 << MATH_FUN_SHIFT) |
1388 | #define MATH_FUN_SHLD (0x09 << MATH_FUN_SHIFT) | 1388 | #define MATH_FUN_SHLD (0x09 << MATH_FUN_SHIFT) |
1389 | #define MATH_FUN_ZBYT (0x0a << MATH_FUN_SHIFT) | 1389 | #define MATH_FUN_ZBYT (0x0a << MATH_FUN_SHIFT) |
1390 | 1390 | ||
1391 | /* Source 0 selectors */ | 1391 | /* Source 0 selectors */ |
1392 | #define MATH_SRC0_SHIFT 16 | 1392 | #define MATH_SRC0_SHIFT 16 |
1393 | #define MATH_SRC0_MASK (0x0f << MATH_SRC0_SHIFT) | 1393 | #define MATH_SRC0_MASK (0x0f << MATH_SRC0_SHIFT) |
1394 | #define MATH_SRC0_REG0 (0x00 << MATH_SRC0_SHIFT) | 1394 | #define MATH_SRC0_REG0 (0x00 << MATH_SRC0_SHIFT) |
1395 | #define MATH_SRC0_REG1 (0x01 << MATH_SRC0_SHIFT) | 1395 | #define MATH_SRC0_REG1 (0x01 << MATH_SRC0_SHIFT) |
1396 | #define MATH_SRC0_REG2 (0x02 << MATH_SRC0_SHIFT) | 1396 | #define MATH_SRC0_REG2 (0x02 << MATH_SRC0_SHIFT) |
1397 | #define MATH_SRC0_REG3 (0x03 << MATH_SRC0_SHIFT) | 1397 | #define MATH_SRC0_REG3 (0x03 << MATH_SRC0_SHIFT) |
1398 | #define MATH_SRC0_IMM (0x04 << MATH_SRC0_SHIFT) | 1398 | #define MATH_SRC0_IMM (0x04 << MATH_SRC0_SHIFT) |
1399 | #define MATH_SRC0_SEQINLEN (0x08 << MATH_SRC0_SHIFT) | 1399 | #define MATH_SRC0_SEQINLEN (0x08 << MATH_SRC0_SHIFT) |
1400 | #define MATH_SRC0_SEQOUTLEN (0x09 << MATH_SRC0_SHIFT) | 1400 | #define MATH_SRC0_SEQOUTLEN (0x09 << MATH_SRC0_SHIFT) |
1401 | #define MATH_SRC0_VARSEQINLEN (0x0a << MATH_SRC0_SHIFT) | 1401 | #define MATH_SRC0_VARSEQINLEN (0x0a << MATH_SRC0_SHIFT) |
1402 | #define MATH_SRC0_VARSEQOUTLEN (0x0b << MATH_SRC0_SHIFT) | 1402 | #define MATH_SRC0_VARSEQOUTLEN (0x0b << MATH_SRC0_SHIFT) |
1403 | #define MATH_SRC0_ZERO (0x0c << MATH_SRC0_SHIFT) | 1403 | #define MATH_SRC0_ZERO (0x0c << MATH_SRC0_SHIFT) |
1404 | 1404 | ||
1405 | /* Source 1 selectors */ | 1405 | /* Source 1 selectors */ |
1406 | #define MATH_SRC1_SHIFT 12 | 1406 | #define MATH_SRC1_SHIFT 12 |
1407 | #define MATH_SRC1_MASK (0x0f << MATH_SRC1_SHIFT) | 1407 | #define MATH_SRC1_MASK (0x0f << MATH_SRC1_SHIFT) |
1408 | #define MATH_SRC1_REG0 (0x00 << MATH_SRC1_SHIFT) | 1408 | #define MATH_SRC1_REG0 (0x00 << MATH_SRC1_SHIFT) |
1409 | #define MATH_SRC1_REG1 (0x01 << MATH_SRC1_SHIFT) | 1409 | #define MATH_SRC1_REG1 (0x01 << MATH_SRC1_SHIFT) |
1410 | #define MATH_SRC1_REG2 (0x02 << MATH_SRC1_SHIFT) | 1410 | #define MATH_SRC1_REG2 (0x02 << MATH_SRC1_SHIFT) |
1411 | #define MATH_SRC1_REG3 (0x03 << MATH_SRC1_SHIFT) | 1411 | #define MATH_SRC1_REG3 (0x03 << MATH_SRC1_SHIFT) |
1412 | #define MATH_SRC1_IMM (0x04 << MATH_SRC1_SHIFT) | 1412 | #define MATH_SRC1_IMM (0x04 << MATH_SRC1_SHIFT) |
1413 | #define MATH_SRC1_INFIFO (0x0a << MATH_SRC1_SHIFT) | 1413 | #define MATH_SRC1_INFIFO (0x0a << MATH_SRC1_SHIFT) |
1414 | #define MATH_SRC1_OUTFIFO (0x0b << MATH_SRC1_SHIFT) | 1414 | #define MATH_SRC1_OUTFIFO (0x0b << MATH_SRC1_SHIFT) |
1415 | #define MATH_SRC1_ONE (0x0c << MATH_SRC1_SHIFT) | 1415 | #define MATH_SRC1_ONE (0x0c << MATH_SRC1_SHIFT) |
1416 | 1416 | ||
1417 | /* Destination selectors */ | 1417 | /* Destination selectors */ |
1418 | #define MATH_DEST_SHIFT 8 | 1418 | #define MATH_DEST_SHIFT 8 |
1419 | #define MATH_DEST_MASK (0x0f << MATH_DEST_SHIFT) | 1419 | #define MATH_DEST_MASK (0x0f << MATH_DEST_SHIFT) |
1420 | #define MATH_DEST_REG0 (0x00 << MATH_DEST_SHIFT) | 1420 | #define MATH_DEST_REG0 (0x00 << MATH_DEST_SHIFT) |
1421 | #define MATH_DEST_REG1 (0x01 << MATH_DEST_SHIFT) | 1421 | #define MATH_DEST_REG1 (0x01 << MATH_DEST_SHIFT) |
1422 | #define MATH_DEST_REG2 (0x02 << MATH_DEST_SHIFT) | 1422 | #define MATH_DEST_REG2 (0x02 << MATH_DEST_SHIFT) |
1423 | #define MATH_DEST_REG3 (0x03 << MATH_DEST_SHIFT) | 1423 | #define MATH_DEST_REG3 (0x03 << MATH_DEST_SHIFT) |
1424 | #define MATH_DEST_SEQINLEN (0x08 << MATH_DEST_SHIFT) | 1424 | #define MATH_DEST_SEQINLEN (0x08 << MATH_DEST_SHIFT) |
1425 | #define MATH_DEST_SEQOUTLEN (0x09 << MATH_DEST_SHIFT) | 1425 | #define MATH_DEST_SEQOUTLEN (0x09 << MATH_DEST_SHIFT) |
1426 | #define MATH_DEST_VARSEQINLEN (0x0a << MATH_DEST_SHIFT) | 1426 | #define MATH_DEST_VARSEQINLEN (0x0a << MATH_DEST_SHIFT) |
1427 | #define MATH_DEST_VARSEQOUTLEN (0x0b << MATH_DEST_SHIFT) | 1427 | #define MATH_DEST_VARSEQOUTLEN (0x0b << MATH_DEST_SHIFT) |
1428 | #define MATH_DEST_NONE (0x0f << MATH_DEST_SHIFT) | 1428 | #define MATH_DEST_NONE (0x0f << MATH_DEST_SHIFT) |
1429 | 1429 | ||
1430 | /* Length selectors */ | 1430 | /* Length selectors */ |
1431 | #define MATH_LEN_SHIFT 0 | 1431 | #define MATH_LEN_SHIFT 0 |
1432 | #define MATH_LEN_MASK (0x0f << MATH_LEN_SHIFT) | 1432 | #define MATH_LEN_MASK (0x0f << MATH_LEN_SHIFT) |
1433 | #define MATH_LEN_1BYTE 0x01 | 1433 | #define MATH_LEN_1BYTE 0x01 |
1434 | #define MATH_LEN_2BYTE 0x02 | 1434 | #define MATH_LEN_2BYTE 0x02 |
1435 | #define MATH_LEN_4BYTE 0x04 | 1435 | #define MATH_LEN_4BYTE 0x04 |
1436 | #define MATH_LEN_8BYTE 0x08 | 1436 | #define MATH_LEN_8BYTE 0x08 |
1437 | 1437 | ||
1438 | /* | 1438 | /* |
1439 | * JUMP Command Constructs | 1439 | * JUMP Command Constructs |
1440 | */ | 1440 | */ |
1441 | 1441 | ||
1442 | #define JUMP_CLASS_SHIFT 25 | 1442 | #define JUMP_CLASS_SHIFT 25 |
1443 | #define JUMP_CLASS_MASK (3 << JUMP_CLASS_SHIFT) | 1443 | #define JUMP_CLASS_MASK (3 << JUMP_CLASS_SHIFT) |
1444 | #define JUMP_CLASS_NONE 0 | 1444 | #define JUMP_CLASS_NONE 0 |
1445 | #define JUMP_CLASS_CLASS1 (1 << JUMP_CLASS_SHIFT) | 1445 | #define JUMP_CLASS_CLASS1 (1 << JUMP_CLASS_SHIFT) |
1446 | #define JUMP_CLASS_CLASS2 (2 << JUMP_CLASS_SHIFT) | 1446 | #define JUMP_CLASS_CLASS2 (2 << JUMP_CLASS_SHIFT) |
1447 | #define JUMP_CLASS_BOTH (3 << JUMP_CLASS_SHIFT) | 1447 | #define JUMP_CLASS_BOTH (3 << JUMP_CLASS_SHIFT) |
1448 | 1448 | ||
1449 | #define JUMP_JSL_SHIFT 24 | 1449 | #define JUMP_JSL_SHIFT 24 |
1450 | #define JUMP_JSL_MASK (1 << JUMP_JSL_SHIFT) | 1450 | #define JUMP_JSL_MASK (1 << JUMP_JSL_SHIFT) |
1451 | #define JUMP_JSL (1 << JUMP_JSL_SHIFT) | 1451 | #define JUMP_JSL (1 << JUMP_JSL_SHIFT) |
1452 | 1452 | ||
1453 | #define JUMP_TYPE_SHIFT 22 | 1453 | #define JUMP_TYPE_SHIFT 22 |
1454 | #define JUMP_TYPE_MASK (0x03 << JUMP_TYPE_SHIFT) | 1454 | #define JUMP_TYPE_MASK (0x03 << JUMP_TYPE_SHIFT) |
1455 | #define JUMP_TYPE_LOCAL (0x00 << JUMP_TYPE_SHIFT) | 1455 | #define JUMP_TYPE_LOCAL (0x00 << JUMP_TYPE_SHIFT) |
1456 | #define JUMP_TYPE_NONLOCAL (0x01 << JUMP_TYPE_SHIFT) | 1456 | #define JUMP_TYPE_NONLOCAL (0x01 << JUMP_TYPE_SHIFT) |
1457 | #define JUMP_TYPE_HALT (0x02 << JUMP_TYPE_SHIFT) | 1457 | #define JUMP_TYPE_HALT (0x02 << JUMP_TYPE_SHIFT) |
1458 | #define JUMP_TYPE_HALT_USER (0x03 << JUMP_TYPE_SHIFT) | 1458 | #define JUMP_TYPE_HALT_USER (0x03 << JUMP_TYPE_SHIFT) |
1459 | 1459 | ||
1460 | #define JUMP_TEST_SHIFT 16 | 1460 | #define JUMP_TEST_SHIFT 16 |
1461 | #define JUMP_TEST_MASK (0x03 << JUMP_TEST_SHIFT) | 1461 | #define JUMP_TEST_MASK (0x03 << JUMP_TEST_SHIFT) |
1462 | #define JUMP_TEST_ALL (0x00 << JUMP_TEST_SHIFT) | 1462 | #define JUMP_TEST_ALL (0x00 << JUMP_TEST_SHIFT) |
1463 | #define JUMP_TEST_INVALL (0x01 << JUMP_TEST_SHIFT) | 1463 | #define JUMP_TEST_INVALL (0x01 << JUMP_TEST_SHIFT) |
1464 | #define JUMP_TEST_ANY (0x02 << JUMP_TEST_SHIFT) | 1464 | #define JUMP_TEST_ANY (0x02 << JUMP_TEST_SHIFT) |
1465 | #define JUMP_TEST_INVANY (0x03 << JUMP_TEST_SHIFT) | 1465 | #define JUMP_TEST_INVANY (0x03 << JUMP_TEST_SHIFT) |
1466 | 1466 | ||
1467 | /* Condition codes. JSL bit is factored in */ | 1467 | /* Condition codes. JSL bit is factored in */ |
1468 | #define JUMP_COND_SHIFT 8 | 1468 | #define JUMP_COND_SHIFT 8 |
1469 | #define JUMP_COND_MASK (0x100ff << JUMP_COND_SHIFT) | 1469 | #define JUMP_COND_MASK (0x100ff << JUMP_COND_SHIFT) |
1470 | #define JUMP_COND_PK_0 (0x80 << JUMP_COND_SHIFT) | 1470 | #define JUMP_COND_PK_0 (0x80 << JUMP_COND_SHIFT) |
1471 | #define JUMP_COND_PK_GCD_1 (0x40 << JUMP_COND_SHIFT) | 1471 | #define JUMP_COND_PK_GCD_1 (0x40 << JUMP_COND_SHIFT) |
1472 | #define JUMP_COND_PK_PRIME (0x20 << JUMP_COND_SHIFT) | 1472 | #define JUMP_COND_PK_PRIME (0x20 << JUMP_COND_SHIFT) |
1473 | #define JUMP_COND_MATH_N (0x08 << JUMP_COND_SHIFT) | 1473 | #define JUMP_COND_MATH_N (0x08 << JUMP_COND_SHIFT) |
1474 | #define JUMP_COND_MATH_Z (0x04 << JUMP_COND_SHIFT) | 1474 | #define JUMP_COND_MATH_Z (0x04 << JUMP_COND_SHIFT) |
1475 | #define JUMP_COND_MATH_C (0x02 << JUMP_COND_SHIFT) | 1475 | #define JUMP_COND_MATH_C (0x02 << JUMP_COND_SHIFT) |
1476 | #define JUMP_COND_MATH_NV (0x01 << JUMP_COND_SHIFT) | 1476 | #define JUMP_COND_MATH_NV (0x01 << JUMP_COND_SHIFT) |
1477 | 1477 | ||
1478 | #define JUMP_COND_JRP ((0x80 << JUMP_COND_SHIFT) | JUMP_JSL) | 1478 | #define JUMP_COND_JRP ((0x80 << JUMP_COND_SHIFT) | JUMP_JSL) |
1479 | #define JUMP_COND_SHRD ((0x40 << JUMP_COND_SHIFT) | JUMP_JSL) | 1479 | #define JUMP_COND_SHRD ((0x40 << JUMP_COND_SHIFT) | JUMP_JSL) |
1480 | #define JUMP_COND_SELF ((0x20 << JUMP_COND_SHIFT) | JUMP_JSL) | 1480 | #define JUMP_COND_SELF ((0x20 << JUMP_COND_SHIFT) | JUMP_JSL) |
1481 | #define JUMP_COND_CALM ((0x10 << JUMP_COND_SHIFT) | JUMP_JSL) | 1481 | #define JUMP_COND_CALM ((0x10 << JUMP_COND_SHIFT) | JUMP_JSL) |
1482 | #define JUMP_COND_NIP ((0x08 << JUMP_COND_SHIFT) | JUMP_JSL) | 1482 | #define JUMP_COND_NIP ((0x08 << JUMP_COND_SHIFT) | JUMP_JSL) |
1483 | #define JUMP_COND_NIFP ((0x04 << JUMP_COND_SHIFT) | JUMP_JSL) | 1483 | #define JUMP_COND_NIFP ((0x04 << JUMP_COND_SHIFT) | JUMP_JSL) |
1484 | #define JUMP_COND_NOP ((0x02 << JUMP_COND_SHIFT) | JUMP_JSL) | 1484 | #define JUMP_COND_NOP ((0x02 << JUMP_COND_SHIFT) | JUMP_JSL) |
1485 | #define JUMP_COND_NCP ((0x01 << JUMP_COND_SHIFT) | JUMP_JSL) | 1485 | #define JUMP_COND_NCP ((0x01 << JUMP_COND_SHIFT) | JUMP_JSL) |
1486 | 1486 | ||
1487 | #define JUMP_OFFSET_SHIFT 0 | 1487 | #define JUMP_OFFSET_SHIFT 0 |
1488 | #define JUMP_OFFSET_MASK (0xff << JUMP_OFFSET_SHIFT) | 1488 | #define JUMP_OFFSET_MASK (0xff << JUMP_OFFSET_SHIFT) |
1489 | 1489 | ||
1490 | /* | 1490 | /* |
1491 | * NFIFO ENTRY | 1491 | * NFIFO ENTRY |
@@ -1500,20 +1500,20 @@ | |||
1500 | #define NFIFOENTRY_DEST_BOTH (3 << NFIFOENTRY_DEST_SHIFT) | 1500 | #define NFIFOENTRY_DEST_BOTH (3 << NFIFOENTRY_DEST_SHIFT) |
1501 | 1501 | ||
1502 | #define NFIFOENTRY_LC2_SHIFT 29 | 1502 | #define NFIFOENTRY_LC2_SHIFT 29 |
1503 | #define NFIFOENTRY_LC2_MASK (1 << NFIFOENTRY_LC2_SHIFT) | 1503 | #define NFIFOENTRY_LC2_MASK (1 << NFIFOENTRY_LC2_SHIFT) |
1504 | #define NFIFOENTRY_LC2 (1 << NFIFOENTRY_LC2_SHIFT) | 1504 | #define NFIFOENTRY_LC2 (1 << NFIFOENTRY_LC2_SHIFT) |
1505 | 1505 | ||
1506 | #define NFIFOENTRY_LC1_SHIFT 28 | 1506 | #define NFIFOENTRY_LC1_SHIFT 28 |
1507 | #define NFIFOENTRY_LC1_MASK (1 << NFIFOENTRY_LC1_SHIFT) | 1507 | #define NFIFOENTRY_LC1_MASK (1 << NFIFOENTRY_LC1_SHIFT) |
1508 | #define NFIFOENTRY_LC1 (1 << NFIFOENTRY_LC1_SHIFT) | 1508 | #define NFIFOENTRY_LC1 (1 << NFIFOENTRY_LC1_SHIFT) |
1509 | 1509 | ||
1510 | #define NFIFOENTRY_FC2_SHIFT 27 | 1510 | #define NFIFOENTRY_FC2_SHIFT 27 |
1511 | #define NFIFOENTRY_FC2_MASK (1 << NFIFOENTRY_FC2_SHIFT) | 1511 | #define NFIFOENTRY_FC2_MASK (1 << NFIFOENTRY_FC2_SHIFT) |
1512 | #define NFIFOENTRY_FC2 (1 << NFIFOENTRY_FC2_SHIFT) | 1512 | #define NFIFOENTRY_FC2 (1 << NFIFOENTRY_FC2_SHIFT) |
1513 | 1513 | ||
1514 | #define NFIFOENTRY_FC1_SHIFT 26 | 1514 | #define NFIFOENTRY_FC1_SHIFT 26 |
1515 | #define NFIFOENTRY_FC1_MASK (1 << NFIFOENTRY_FC1_SHIFT) | 1515 | #define NFIFOENTRY_FC1_MASK (1 << NFIFOENTRY_FC1_SHIFT) |
1516 | #define NFIFOENTRY_FC1 (1 << NFIFOENTRY_FC1_SHIFT) | 1516 | #define NFIFOENTRY_FC1 (1 << NFIFOENTRY_FC1_SHIFT) |
1517 | 1517 | ||
1518 | #define NFIFOENTRY_STYPE_SHIFT 24 | 1518 | #define NFIFOENTRY_STYPE_SHIFT 24 |
1519 | #define NFIFOENTRY_STYPE_MASK (3 << NFIFOENTRY_STYPE_SHIFT) | 1519 | #define NFIFOENTRY_STYPE_MASK (3 << NFIFOENTRY_STYPE_SHIFT) |
@@ -1525,60 +1525,59 @@ | |||
1525 | #define NFIFOENTRY_DTYPE_SHIFT 20 | 1525 | #define NFIFOENTRY_DTYPE_SHIFT 20 |
1526 | #define NFIFOENTRY_DTYPE_MASK (0xF << NFIFOENTRY_DTYPE_SHIFT) | 1526 | #define NFIFOENTRY_DTYPE_MASK (0xF << NFIFOENTRY_DTYPE_SHIFT) |
1527 | 1527 | ||
1528 | #define NFIFOENTRY_DTYPE_SBOX (0x0 << NFIFOENTRY_DTYPE_SHIFT) | 1528 | #define NFIFOENTRY_DTYPE_SBOX (0x0 << NFIFOENTRY_DTYPE_SHIFT) |
1529 | #define NFIFOENTRY_DTYPE_AAD (0x1 << NFIFOENTRY_DTYPE_SHIFT) | 1529 | #define NFIFOENTRY_DTYPE_AAD (0x1 << NFIFOENTRY_DTYPE_SHIFT) |
1530 | #define NFIFOENTRY_DTYPE_IV (0x2 << NFIFOENTRY_DTYPE_SHIFT) | 1530 | #define NFIFOENTRY_DTYPE_IV (0x2 << NFIFOENTRY_DTYPE_SHIFT) |
1531 | #define NFIFOENTRY_DTYPE_SAD (0x3 << NFIFOENTRY_DTYPE_SHIFT) | 1531 | #define NFIFOENTRY_DTYPE_SAD (0x3 << NFIFOENTRY_DTYPE_SHIFT) |
1532 | #define NFIFOENTRY_DTYPE_ICV (0xA << NFIFOENTRY_DTYPE_SHIFT) | 1532 | #define NFIFOENTRY_DTYPE_ICV (0xA << NFIFOENTRY_DTYPE_SHIFT) |
1533 | #define NFIFOENTRY_DTYPE_SKIP (0xE << NFIFOENTRY_DTYPE_SHIFT) | 1533 | #define NFIFOENTRY_DTYPE_SKIP (0xE << NFIFOENTRY_DTYPE_SHIFT) |
1534 | #define NFIFOENTRY_DTYPE_MSG (0xF << NFIFOENTRY_DTYPE_SHIFT) | 1534 | #define NFIFOENTRY_DTYPE_MSG (0xF << NFIFOENTRY_DTYPE_SHIFT) |
1535 | 1535 | ||
1536 | #define NFIFOENTRY_DTYPE_PK_A0 (0x0 << NFIFOENTRY_DTYPE_SHIFT) | 1536 | #define NFIFOENTRY_DTYPE_PK_A0 (0x0 << NFIFOENTRY_DTYPE_SHIFT) |
1537 | #define NFIFOENTRY_DTYPE_PK_A1 (0x1 << NFIFOENTRY_DTYPE_SHIFT) | 1537 | #define NFIFOENTRY_DTYPE_PK_A1 (0x1 << NFIFOENTRY_DTYPE_SHIFT) |
1538 | #define NFIFOENTRY_DTYPE_PK_A2 (0x2 << NFIFOENTRY_DTYPE_SHIFT) | 1538 | #define NFIFOENTRY_DTYPE_PK_A2 (0x2 << NFIFOENTRY_DTYPE_SHIFT) |
1539 | #define NFIFOENTRY_DTYPE_PK_A3 (0x3 << NFIFOENTRY_DTYPE_SHIFT) | 1539 | #define NFIFOENTRY_DTYPE_PK_A3 (0x3 << NFIFOENTRY_DTYPE_SHIFT) |
1540 | #define NFIFOENTRY_DTYPE_PK_B0 (0x4 << NFIFOENTRY_DTYPE_SHIFT) | 1540 | #define NFIFOENTRY_DTYPE_PK_B0 (0x4 << NFIFOENTRY_DTYPE_SHIFT) |
1541 | #define NFIFOENTRY_DTYPE_PK_B1 (0x5 << NFIFOENTRY_DTYPE_SHIFT) | 1541 | #define NFIFOENTRY_DTYPE_PK_B1 (0x5 << NFIFOENTRY_DTYPE_SHIFT) |
1542 | #define NFIFOENTRY_DTYPE_PK_B2 (0x6 << NFIFOENTRY_DTYPE_SHIFT) | 1542 | #define NFIFOENTRY_DTYPE_PK_B2 (0x6 << NFIFOENTRY_DTYPE_SHIFT) |
1543 | #define NFIFOENTRY_DTYPE_PK_B3 (0x7 << NFIFOENTRY_DTYPE_SHIFT) | 1543 | #define NFIFOENTRY_DTYPE_PK_B3 (0x7 << NFIFOENTRY_DTYPE_SHIFT) |
1544 | #define NFIFOENTRY_DTYPE_PK_N (0x8 << NFIFOENTRY_DTYPE_SHIFT) | 1544 | #define NFIFOENTRY_DTYPE_PK_N (0x8 << NFIFOENTRY_DTYPE_SHIFT) |
1545 | #define NFIFOENTRY_DTYPE_PK_E (0x9 << NFIFOENTRY_DTYPE_SHIFT) | 1545 | #define NFIFOENTRY_DTYPE_PK_E (0x9 << NFIFOENTRY_DTYPE_SHIFT) |
1546 | #define NFIFOENTRY_DTYPE_PK_A (0xC << NFIFOENTRY_DTYPE_SHIFT) | 1546 | #define NFIFOENTRY_DTYPE_PK_A (0xC << NFIFOENTRY_DTYPE_SHIFT) |
1547 | #define NFIFOENTRY_DTYPE_PK_B (0xD << NFIFOENTRY_DTYPE_SHIFT) | 1547 | #define NFIFOENTRY_DTYPE_PK_B (0xD << NFIFOENTRY_DTYPE_SHIFT) |
1548 | 1548 | ||
1549 | 1549 | ||
1550 | #define NFIFOENTRY_BND_SHIFT 19 | 1550 | #define NFIFOENTRY_BND_SHIFT 19 |
1551 | #define NFIFOENTRY_BND_MASK (1 << NFIFOENTRY_BND_SHIFT) | 1551 | #define NFIFOENTRY_BND_MASK (1 << NFIFOENTRY_BND_SHIFT) |
1552 | #define NFIFOENTRY_BND (1 << NFIFOENTRY_BND_SHIFT) | 1552 | #define NFIFOENTRY_BND (1 << NFIFOENTRY_BND_SHIFT) |
1553 | 1553 | ||
1554 | #define NFIFOENTRY_PTYPE_SHIFT 16 | 1554 | #define NFIFOENTRY_PTYPE_SHIFT 16 |
1555 | #define NFIFOENTRY_PTYPE_MASK (0x7 << NFIFOENTRY_PTYPE_SHIFT) | 1555 | #define NFIFOENTRY_PTYPE_MASK (0x7 << NFIFOENTRY_PTYPE_SHIFT) |
1556 | 1556 | ||
1557 | #define NFIFOENTRY_PTYPE_ZEROS (0x0 << NFIFOENTRY_PTYPE_SHIFT) | 1557 | #define NFIFOENTRY_PTYPE_ZEROS (0x0 << NFIFOENTRY_PTYPE_SHIFT) |
1558 | #define NFIFOENTRY_PTYPE_RND_NOZEROS (0x1 << NFIFOENTRY_PTYPE_SHIFT) | 1558 | #define NFIFOENTRY_PTYPE_RND_NOZEROS (0x1 << NFIFOENTRY_PTYPE_SHIFT) |
1559 | #define NFIFOENTRY_PTYPE_INCREMENT (0x2 << NFIFOENTRY_PTYPE_SHIFT) | 1559 | #define NFIFOENTRY_PTYPE_INCREMENT (0x2 << NFIFOENTRY_PTYPE_SHIFT) |
1560 | #define NFIFOENTRY_PTYPE_RND (0x3 << NFIFOENTRY_PTYPE_SHIFT) | 1560 | #define NFIFOENTRY_PTYPE_RND (0x3 << NFIFOENTRY_PTYPE_SHIFT) |
1561 | #define NFIFOENTRY_PTYPE_ZEROS_NZ (0x4 << NFIFOENTRY_PTYPE_SHIFT) | 1561 | #define NFIFOENTRY_PTYPE_ZEROS_NZ (0x4 << NFIFOENTRY_PTYPE_SHIFT) |
1562 | #define NFIFOENTRY_PTYPE_RND_NZ_LZ (0x5 << NFIFOENTRY_PTYPE_SHIFT) | 1562 | #define NFIFOENTRY_PTYPE_RND_NZ_LZ (0x5 << NFIFOENTRY_PTYPE_SHIFT) |
1563 | #define NFIFOENTRY_PTYPE_N (0x6 << NFIFOENTRY_PTYPE_SHIFT) | 1563 | #define NFIFOENTRY_PTYPE_N (0x6 << NFIFOENTRY_PTYPE_SHIFT) |
1564 | #define NFIFOENTRY_PTYPE_RND_NZ_N (0x7 << NFIFOENTRY_PTYPE_SHIFT) | 1564 | #define NFIFOENTRY_PTYPE_RND_NZ_N (0x7 << NFIFOENTRY_PTYPE_SHIFT) |
1565 | 1565 | ||
1566 | #define NFIFOENTRY_OC_SHIFT 15 | 1566 | #define NFIFOENTRY_OC_SHIFT 15 |
1567 | #define NFIFOENTRY_OC_MASK (1 << NFIFOENTRY_OC_SHIFT) | 1567 | #define NFIFOENTRY_OC_MASK (1 << NFIFOENTRY_OC_SHIFT) |
1568 | #define NFIFOENTRY_OC (1 << NFIFOENTRY_OC_SHIFT) | 1568 | #define NFIFOENTRY_OC (1 << NFIFOENTRY_OC_SHIFT) |
1569 | 1569 | ||
1570 | #define NFIFOENTRY_AST_SHIFT 14 | 1570 | #define NFIFOENTRY_AST_SHIFT 14 |
1571 | #define NFIFOENTRY_AST_MASK (1 << NFIFOENTRY_OC_SHIFT) | 1571 | #define NFIFOENTRY_AST_MASK (1 << NFIFOENTRY_OC_SHIFT) |
1572 | #define NFIFOENTRY_AST (1 << NFIFOENTRY_OC_SHIFT) | 1572 | #define NFIFOENTRY_AST (1 << NFIFOENTRY_OC_SHIFT) |
1573 | 1573 | ||
1574 | #define NFIFOENTRY_BM_SHIFT 11 | 1574 | #define NFIFOENTRY_BM_SHIFT 11 |
1575 | #define NFIFOENTRY_BM_MASK (1 << NFIFOENTRY_BM_SHIFT) | 1575 | #define NFIFOENTRY_BM_MASK (1 << NFIFOENTRY_BM_SHIFT) |
1576 | #define NFIFOENTRY_BM (1 << NFIFOENTRY_BM_SHIFT) | 1576 | #define NFIFOENTRY_BM (1 << NFIFOENTRY_BM_SHIFT) |
1577 | |||
1578 | #define NFIFOENTRY_PS_SHIFT 10 | ||
1579 | #define NFIFOENTRY_PS_MASK (1 << NFIFOENTRY_PS_SHIFT) | ||
1580 | #define NFIFOENTRY_PS (1 << NFIFOENTRY_PS_SHIFT) | ||
1581 | 1577 | ||
1578 | #define NFIFOENTRY_PS_SHIFT 10 | ||
1579 | #define NFIFOENTRY_PS_MASK (1 << NFIFOENTRY_PS_SHIFT) | ||
1580 | #define NFIFOENTRY_PS (1 << NFIFOENTRY_PS_SHIFT) | ||
1582 | 1581 | ||
1583 | #define NFIFOENTRY_DLEN_SHIFT 0 | 1582 | #define NFIFOENTRY_DLEN_SHIFT 0 |
1584 | #define NFIFOENTRY_DLEN_MASK (0xFFF << NFIFOENTRY_DLEN_SHIFT) | 1583 | #define NFIFOENTRY_DLEN_MASK (0xFFF << NFIFOENTRY_DLEN_SHIFT) |
@@ -1591,15 +1590,15 @@ | |||
1591 | */ | 1590 | */ |
1592 | 1591 | ||
1593 | /* IPSec ESP CBC Encap/Decap Options */ | 1592 | /* IPSec ESP CBC Encap/Decap Options */ |
1594 | #define PDBOPTS_ESPCBC_ARSNONE 0x00 /* no antireplay window */ | 1593 | #define PDBOPTS_ESPCBC_ARSNONE 0x00 /* no antireplay window */ |
1595 | #define PDBOPTS_ESPCBC_ARS32 0x40 /* 32-entry antireplay window */ | 1594 | #define PDBOPTS_ESPCBC_ARS32 0x40 /* 32-entry antireplay window */ |
1596 | #define PDBOPTS_ESPCBC_ARS64 0xc0 /* 64-entry antireplay window */ | 1595 | #define PDBOPTS_ESPCBC_ARS64 0xc0 /* 64-entry antireplay window */ |
1597 | #define PDBOPTS_ESPCBC_IVSRC 0x20 /* IV comes from internal random gen */ | 1596 | #define PDBOPTS_ESPCBC_IVSRC 0x20 /* IV comes from internal random gen */ |
1598 | #define PDBOPTS_ESPCBC_ESN 0x10 /* extended sequence included */ | 1597 | #define PDBOPTS_ESPCBC_ESN 0x10 /* extended sequence included */ |
1599 | #define PDBOPTS_ESPCBC_OUTFMT 0x08 /* output only decapsulation (decap) */ | 1598 | #define PDBOPTS_ESPCBC_OUTFMT 0x08 /* output only decapsulation (decap) */ |
1600 | #define PDBOPTS_ESPCBC_IPHDRSRC 0x08 /* IP header comes from PDB (encap) */ | 1599 | #define PDBOPTS_ESPCBC_IPHDRSRC 0x08 /* IP header comes from PDB (encap) */ |
1601 | #define PDBOPTS_ESPCBC_INCIPHDR 0x04 /* Prepend IP header to output frame */ | 1600 | #define PDBOPTS_ESPCBC_INCIPHDR 0x04 /* Prepend IP header to output frame */ |
1602 | #define PDBOPTS_ESPCBC_IPVSN 0x02 /* process IPv6 header */ | 1601 | #define PDBOPTS_ESPCBC_IPVSN 0x02 /* process IPv6 header */ |
1603 | #define PDBOPTS_ESPCBC_TUNNEL 0x01 /* tunnel mode next-header byte */ | 1602 | #define PDBOPTS_ESPCBC_TUNNEL 0x01 /* tunnel mode next-header byte */ |
1604 | 1603 | ||
1605 | #endif /* DESC_H */ | 1604 | #endif /* DESC_H */ |
diff --git a/drivers/crypto/caam/desc_constr.h b/drivers/crypto/caam/desc_constr.h index 0991323cf3fd..348b882275f0 100644 --- a/drivers/crypto/caam/desc_constr.h +++ b/drivers/crypto/caam/desc_constr.h | |||
@@ -18,9 +18,10 @@ | |||
18 | #define PRINT_POS | 18 | #define PRINT_POS |
19 | #endif | 19 | #endif |
20 | 20 | ||
21 | #define SET_OK_PROP_ERRORS (IMMEDIATE | LDST_CLASS_DECO | \ | 21 | #define SET_OK_NO_PROP_ERRORS (IMMEDIATE | LDST_CLASS_DECO | \ |
22 | LDST_SRCDST_WORD_DECOCTRL | \ | 22 | LDST_SRCDST_WORD_DECOCTRL | \ |
23 | (LDOFF_CHG_SHARE_OK_PROP << LDST_OFFSET_SHIFT)) | 23 | (LDOFF_CHG_SHARE_OK_NO_PROP << \ |
24 | LDST_OFFSET_SHIFT)) | ||
24 | #define DISABLE_AUTO_INFO_FIFO (IMMEDIATE | LDST_CLASS_DECO | \ | 25 | #define DISABLE_AUTO_INFO_FIFO (IMMEDIATE | LDST_CLASS_DECO | \ |
25 | LDST_SRCDST_WORD_DECOCTRL | \ | 26 | LDST_SRCDST_WORD_DECOCTRL | \ |
26 | (LDOFF_DISABLE_AUTO_NFIFO << LDST_OFFSET_SHIFT)) | 27 | (LDOFF_DISABLE_AUTO_NFIFO << LDST_OFFSET_SHIFT)) |
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h index aee394e39056..e9f7a70cdd5e 100644 --- a/drivers/crypto/caam/regs.h +++ b/drivers/crypto/caam/regs.h | |||
@@ -657,7 +657,6 @@ struct caam_full { | |||
657 | u64 rsvd[512]; | 657 | u64 rsvd[512]; |
658 | struct caam_assurance assure; | 658 | struct caam_assurance assure; |
659 | struct caam_queue_if qi; | 659 | struct caam_queue_if qi; |
660 | struct caam_deco *deco; | ||
661 | }; | 660 | }; |
662 | 661 | ||
663 | #endif /* REGS_H */ | 662 | #endif /* REGS_H */ |
diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c index dcd8babae9eb..597235a2f8f9 100644 --- a/drivers/crypto/mv_cesa.c +++ b/drivers/crypto/mv_cesa.c | |||
@@ -1128,17 +1128,7 @@ static struct platform_driver marvell_crypto = { | |||
1128 | }; | 1128 | }; |
1129 | MODULE_ALIAS("platform:mv_crypto"); | 1129 | MODULE_ALIAS("platform:mv_crypto"); |
1130 | 1130 | ||
1131 | static int __init mv_crypto_init(void) | 1131 | module_platform_driver(marvell_crypto); |
1132 | { | ||
1133 | return platform_driver_register(&marvell_crypto); | ||
1134 | } | ||
1135 | module_init(mv_crypto_init); | ||
1136 | |||
1137 | static void __exit mv_crypto_exit(void) | ||
1138 | { | ||
1139 | platform_driver_unregister(&marvell_crypto); | ||
1140 | } | ||
1141 | module_exit(mv_crypto_exit); | ||
1142 | 1132 | ||
1143 | MODULE_AUTHOR("Sebastian Andrzej Siewior <sebastian@breakpoint.cc>"); | 1133 | MODULE_AUTHOR("Sebastian Andrzej Siewior <sebastian@breakpoint.cc>"); |
1144 | MODULE_DESCRIPTION("Support for Marvell's cryptographic engine"); | 1134 | MODULE_DESCRIPTION("Support for Marvell's cryptographic engine"); |
diff --git a/drivers/crypto/picoxcell_crypto.c b/drivers/crypto/picoxcell_crypto.c index a2b553eabbdb..58480d009324 100644 --- a/drivers/crypto/picoxcell_crypto.c +++ b/drivers/crypto/picoxcell_crypto.c | |||
@@ -873,7 +873,7 @@ static int spacc_aes_setkey(struct crypto_ablkcipher *cipher, const u8 *key, | |||
873 | * request for any other size (192 bits) then we need to do a software | 873 | * request for any other size (192 bits) then we need to do a software |
874 | * fallback. | 874 | * fallback. |
875 | */ | 875 | */ |
876 | if ((len != AES_KEYSIZE_128 || len != AES_KEYSIZE_256) && | 876 | if (len != AES_KEYSIZE_128 && len != AES_KEYSIZE_256 && |
877 | ctx->sw_cipher) { | 877 | ctx->sw_cipher) { |
878 | /* | 878 | /* |
879 | * Set the fallback transform to use the same request flags as | 879 | * Set the fallback transform to use the same request flags as |
@@ -886,7 +886,7 @@ static int spacc_aes_setkey(struct crypto_ablkcipher *cipher, const u8 *key, | |||
886 | err = crypto_ablkcipher_setkey(ctx->sw_cipher, key, len); | 886 | err = crypto_ablkcipher_setkey(ctx->sw_cipher, key, len); |
887 | if (err) | 887 | if (err) |
888 | goto sw_setkey_failed; | 888 | goto sw_setkey_failed; |
889 | } else if ((len != AES_KEYSIZE_128 || len != AES_KEYSIZE_256) && | 889 | } else if (len != AES_KEYSIZE_128 && len != AES_KEYSIZE_256 && |
890 | !ctx->sw_cipher) | 890 | !ctx->sw_cipher) |
891 | err = -EINVAL; | 891 | err = -EINVAL; |
892 | 892 | ||
@@ -1854,17 +1854,7 @@ static struct platform_driver spacc_driver = { | |||
1854 | .id_table = spacc_id_table, | 1854 | .id_table = spacc_id_table, |
1855 | }; | 1855 | }; |
1856 | 1856 | ||
1857 | static int __init spacc_init(void) | 1857 | module_platform_driver(spacc_driver); |
1858 | { | ||
1859 | return platform_driver_register(&spacc_driver); | ||
1860 | } | ||
1861 | module_init(spacc_init); | ||
1862 | |||
1863 | static void __exit spacc_exit(void) | ||
1864 | { | ||
1865 | platform_driver_unregister(&spacc_driver); | ||
1866 | } | ||
1867 | module_exit(spacc_exit); | ||
1868 | 1858 | ||
1869 | MODULE_LICENSE("GPL"); | 1859 | MODULE_LICENSE("GPL"); |
1870 | MODULE_AUTHOR("Jamie Iles"); | 1860 | MODULE_AUTHOR("Jamie Iles"); |
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c index 8115417a1c93..3376bca200fc 100644 --- a/drivers/crypto/s5p-sss.c +++ b/drivers/crypto/s5p-sss.c | |||
@@ -683,18 +683,7 @@ static struct platform_driver s5p_aes_crypto = { | |||
683 | }, | 683 | }, |
684 | }; | 684 | }; |
685 | 685 | ||
686 | static int __init s5p_aes_mod_init(void) | 686 | module_platform_driver(s5p_aes_crypto); |
687 | { | ||
688 | return platform_driver_register(&s5p_aes_crypto); | ||
689 | } | ||
690 | |||
691 | static void __exit s5p_aes_mod_exit(void) | ||
692 | { | ||
693 | platform_driver_unregister(&s5p_aes_crypto); | ||
694 | } | ||
695 | |||
696 | module_init(s5p_aes_mod_init); | ||
697 | module_exit(s5p_aes_mod_exit); | ||
698 | 687 | ||
699 | MODULE_DESCRIPTION("S5PV210 AES hw acceleration support."); | 688 | MODULE_DESCRIPTION("S5PV210 AES hw acceleration support."); |
700 | MODULE_LICENSE("GPL v2"); | 689 | MODULE_LICENSE("GPL v2"); |
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c index dbe76b5df9cf..2d8c78901686 100644 --- a/drivers/crypto/talitos.c +++ b/drivers/crypto/talitos.c | |||
@@ -99,6 +99,8 @@ struct talitos_request { | |||
99 | 99 | ||
100 | /* per-channel fifo management */ | 100 | /* per-channel fifo management */ |
101 | struct talitos_channel { | 101 | struct talitos_channel { |
102 | void __iomem *reg; | ||
103 | |||
102 | /* request fifo */ | 104 | /* request fifo */ |
103 | struct talitos_request *fifo; | 105 | struct talitos_request *fifo; |
104 | 106 | ||
@@ -120,7 +122,7 @@ struct talitos_private { | |||
120 | struct device *dev; | 122 | struct device *dev; |
121 | struct platform_device *ofdev; | 123 | struct platform_device *ofdev; |
122 | void __iomem *reg; | 124 | void __iomem *reg; |
123 | int irq; | 125 | int irq[2]; |
124 | 126 | ||
125 | /* SEC version geometry (from device tree node) */ | 127 | /* SEC version geometry (from device tree node) */ |
126 | unsigned int num_channels; | 128 | unsigned int num_channels; |
@@ -144,7 +146,7 @@ struct talitos_private { | |||
144 | atomic_t last_chan ____cacheline_aligned; | 146 | atomic_t last_chan ____cacheline_aligned; |
145 | 147 | ||
146 | /* request callback tasklet */ | 148 | /* request callback tasklet */ |
147 | struct tasklet_struct done_task; | 149 | struct tasklet_struct done_task[2]; |
148 | 150 | ||
149 | /* list of registered algorithms */ | 151 | /* list of registered algorithms */ |
150 | struct list_head alg_list; | 152 | struct list_head alg_list; |
@@ -157,6 +159,7 @@ struct talitos_private { | |||
157 | #define TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT 0x00000001 | 159 | #define TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT 0x00000001 |
158 | #define TALITOS_FTR_HW_AUTH_CHECK 0x00000002 | 160 | #define TALITOS_FTR_HW_AUTH_CHECK 0x00000002 |
159 | #define TALITOS_FTR_SHA224_HWINIT 0x00000004 | 161 | #define TALITOS_FTR_SHA224_HWINIT 0x00000004 |
162 | #define TALITOS_FTR_HMAC_OK 0x00000008 | ||
160 | 163 | ||
161 | static void to_talitos_ptr(struct talitos_ptr *talitos_ptr, dma_addr_t dma_addr) | 164 | static void to_talitos_ptr(struct talitos_ptr *talitos_ptr, dma_addr_t dma_addr) |
162 | { | 165 | { |
@@ -196,9 +199,9 @@ static int reset_channel(struct device *dev, int ch) | |||
196 | struct talitos_private *priv = dev_get_drvdata(dev); | 199 | struct talitos_private *priv = dev_get_drvdata(dev); |
197 | unsigned int timeout = TALITOS_TIMEOUT; | 200 | unsigned int timeout = TALITOS_TIMEOUT; |
198 | 201 | ||
199 | setbits32(priv->reg + TALITOS_CCCR(ch), TALITOS_CCCR_RESET); | 202 | setbits32(priv->chan[ch].reg + TALITOS_CCCR, TALITOS_CCCR_RESET); |
200 | 203 | ||
201 | while ((in_be32(priv->reg + TALITOS_CCCR(ch)) & TALITOS_CCCR_RESET) | 204 | while ((in_be32(priv->chan[ch].reg + TALITOS_CCCR) & TALITOS_CCCR_RESET) |
202 | && --timeout) | 205 | && --timeout) |
203 | cpu_relax(); | 206 | cpu_relax(); |
204 | 207 | ||
@@ -208,12 +211,12 @@ static int reset_channel(struct device *dev, int ch) | |||
208 | } | 211 | } |
209 | 212 | ||
210 | /* set 36-bit addressing, done writeback enable and done IRQ enable */ | 213 | /* set 36-bit addressing, done writeback enable and done IRQ enable */ |
211 | setbits32(priv->reg + TALITOS_CCCR_LO(ch), TALITOS_CCCR_LO_EAE | | 214 | setbits32(priv->chan[ch].reg + TALITOS_CCCR_LO, TALITOS_CCCR_LO_EAE | |
212 | TALITOS_CCCR_LO_CDWE | TALITOS_CCCR_LO_CDIE); | 215 | TALITOS_CCCR_LO_CDWE | TALITOS_CCCR_LO_CDIE); |
213 | 216 | ||
214 | /* and ICCR writeback, if available */ | 217 | /* and ICCR writeback, if available */ |
215 | if (priv->features & TALITOS_FTR_HW_AUTH_CHECK) | 218 | if (priv->features & TALITOS_FTR_HW_AUTH_CHECK) |
216 | setbits32(priv->reg + TALITOS_CCCR_LO(ch), | 219 | setbits32(priv->chan[ch].reg + TALITOS_CCCR_LO, |
217 | TALITOS_CCCR_LO_IWSE); | 220 | TALITOS_CCCR_LO_IWSE); |
218 | 221 | ||
219 | return 0; | 222 | return 0; |
@@ -223,13 +226,19 @@ static int reset_device(struct device *dev) | |||
223 | { | 226 | { |
224 | struct talitos_private *priv = dev_get_drvdata(dev); | 227 | struct talitos_private *priv = dev_get_drvdata(dev); |
225 | unsigned int timeout = TALITOS_TIMEOUT; | 228 | unsigned int timeout = TALITOS_TIMEOUT; |
229 | u32 mcr = TALITOS_MCR_SWR; | ||
226 | 230 | ||
227 | setbits32(priv->reg + TALITOS_MCR, TALITOS_MCR_SWR); | 231 | setbits32(priv->reg + TALITOS_MCR, mcr); |
228 | 232 | ||
229 | while ((in_be32(priv->reg + TALITOS_MCR) & TALITOS_MCR_SWR) | 233 | while ((in_be32(priv->reg + TALITOS_MCR) & TALITOS_MCR_SWR) |
230 | && --timeout) | 234 | && --timeout) |
231 | cpu_relax(); | 235 | cpu_relax(); |
232 | 236 | ||
237 | if (priv->irq[1]) { | ||
238 | mcr = TALITOS_MCR_RCA1 | TALITOS_MCR_RCA3; | ||
239 | setbits32(priv->reg + TALITOS_MCR, mcr); | ||
240 | } | ||
241 | |||
233 | if (timeout == 0) { | 242 | if (timeout == 0) { |
234 | dev_err(dev, "failed to reset device\n"); | 243 | dev_err(dev, "failed to reset device\n"); |
235 | return -EIO; | 244 | return -EIO; |
@@ -327,8 +336,9 @@ static int talitos_submit(struct device *dev, int ch, struct talitos_desc *desc, | |||
327 | 336 | ||
328 | /* GO! */ | 337 | /* GO! */ |
329 | wmb(); | 338 | wmb(); |
330 | out_be32(priv->reg + TALITOS_FF(ch), upper_32_bits(request->dma_desc)); | 339 | out_be32(priv->chan[ch].reg + TALITOS_FF, |
331 | out_be32(priv->reg + TALITOS_FF_LO(ch), | 340 | upper_32_bits(request->dma_desc)); |
341 | out_be32(priv->chan[ch].reg + TALITOS_FF_LO, | ||
332 | lower_32_bits(request->dma_desc)); | 342 | lower_32_bits(request->dma_desc)); |
333 | 343 | ||
334 | spin_unlock_irqrestore(&priv->chan[ch].head_lock, flags); | 344 | spin_unlock_irqrestore(&priv->chan[ch].head_lock, flags); |
@@ -397,21 +407,32 @@ static void flush_channel(struct device *dev, int ch, int error, int reset_ch) | |||
397 | /* | 407 | /* |
398 | * process completed requests for channels that have done status | 408 | * process completed requests for channels that have done status |
399 | */ | 409 | */ |
400 | static void talitos_done(unsigned long data) | 410 | #define DEF_TALITOS_DONE(name, ch_done_mask) \ |
401 | { | 411 | static void talitos_done_##name(unsigned long data) \ |
402 | struct device *dev = (struct device *)data; | 412 | { \ |
403 | struct talitos_private *priv = dev_get_drvdata(dev); | 413 | struct device *dev = (struct device *)data; \ |
404 | int ch; | 414 | struct talitos_private *priv = dev_get_drvdata(dev); \ |
405 | 415 | \ | |
406 | for (ch = 0; ch < priv->num_channels; ch++) | 416 | if (ch_done_mask & 1) \ |
407 | flush_channel(dev, ch, 0, 0); | 417 | flush_channel(dev, 0, 0, 0); \ |
408 | 418 | if (priv->num_channels == 1) \ | |
409 | /* At this point, all completed channels have been processed. | 419 | goto out; \ |
410 | * Unmask done interrupts for channels completed later on. | 420 | if (ch_done_mask & (1 << 2)) \ |
411 | */ | 421 | flush_channel(dev, 1, 0, 0); \ |
412 | setbits32(priv->reg + TALITOS_IMR, TALITOS_IMR_INIT); | 422 | if (ch_done_mask & (1 << 4)) \ |
413 | setbits32(priv->reg + TALITOS_IMR_LO, TALITOS_IMR_LO_INIT); | 423 | flush_channel(dev, 2, 0, 0); \ |
424 | if (ch_done_mask & (1 << 6)) \ | ||
425 | flush_channel(dev, 3, 0, 0); \ | ||
426 | \ | ||
427 | out: \ | ||
428 | /* At this point, all completed channels have been processed */ \ | ||
429 | /* Unmask done interrupts for channels completed later on. */ \ | ||
430 | setbits32(priv->reg + TALITOS_IMR, ch_done_mask); \ | ||
431 | setbits32(priv->reg + TALITOS_IMR_LO, TALITOS_IMR_LO_INIT); \ | ||
414 | } | 432 | } |
433 | DEF_TALITOS_DONE(4ch, TALITOS_ISR_4CHDONE) | ||
434 | DEF_TALITOS_DONE(ch0_2, TALITOS_ISR_CH_0_2_DONE) | ||
435 | DEF_TALITOS_DONE(ch1_3, TALITOS_ISR_CH_1_3_DONE) | ||
415 | 436 | ||
416 | /* | 437 | /* |
417 | * locate current (offending) descriptor | 438 | * locate current (offending) descriptor |
@@ -422,7 +443,7 @@ static u32 current_desc_hdr(struct device *dev, int ch) | |||
422 | int tail = priv->chan[ch].tail; | 443 | int tail = priv->chan[ch].tail; |
423 | dma_addr_t cur_desc; | 444 | dma_addr_t cur_desc; |
424 | 445 | ||
425 | cur_desc = in_be32(priv->reg + TALITOS_CDPR_LO(ch)); | 446 | cur_desc = in_be32(priv->chan[ch].reg + TALITOS_CDPR_LO); |
426 | 447 | ||
427 | while (priv->chan[ch].fifo[tail].dma_desc != cur_desc) { | 448 | while (priv->chan[ch].fifo[tail].dma_desc != cur_desc) { |
428 | tail = (tail + 1) & (priv->fifo_len - 1); | 449 | tail = (tail + 1) & (priv->fifo_len - 1); |
@@ -444,7 +465,7 @@ static void report_eu_error(struct device *dev, int ch, u32 desc_hdr) | |||
444 | int i; | 465 | int i; |
445 | 466 | ||
446 | if (!desc_hdr) | 467 | if (!desc_hdr) |
447 | desc_hdr = in_be32(priv->reg + TALITOS_DESCBUF(ch)); | 468 | desc_hdr = in_be32(priv->chan[ch].reg + TALITOS_DESCBUF); |
448 | 469 | ||
449 | switch (desc_hdr & DESC_HDR_SEL0_MASK) { | 470 | switch (desc_hdr & DESC_HDR_SEL0_MASK) { |
450 | case DESC_HDR_SEL0_AFEU: | 471 | case DESC_HDR_SEL0_AFEU: |
@@ -506,16 +527,15 @@ static void report_eu_error(struct device *dev, int ch, u32 desc_hdr) | |||
506 | 527 | ||
507 | for (i = 0; i < 8; i++) | 528 | for (i = 0; i < 8; i++) |
508 | dev_err(dev, "DESCBUF 0x%08x_%08x\n", | 529 | dev_err(dev, "DESCBUF 0x%08x_%08x\n", |
509 | in_be32(priv->reg + TALITOS_DESCBUF(ch) + 8*i), | 530 | in_be32(priv->chan[ch].reg + TALITOS_DESCBUF + 8*i), |
510 | in_be32(priv->reg + TALITOS_DESCBUF_LO(ch) + 8*i)); | 531 | in_be32(priv->chan[ch].reg + TALITOS_DESCBUF_LO + 8*i)); |
511 | } | 532 | } |
512 | 533 | ||
513 | /* | 534 | /* |
514 | * recover from error interrupts | 535 | * recover from error interrupts |
515 | */ | 536 | */ |
516 | static void talitos_error(unsigned long data, u32 isr, u32 isr_lo) | 537 | static void talitos_error(struct device *dev, u32 isr, u32 isr_lo) |
517 | { | 538 | { |
518 | struct device *dev = (struct device *)data; | ||
519 | struct talitos_private *priv = dev_get_drvdata(dev); | 539 | struct talitos_private *priv = dev_get_drvdata(dev); |
520 | unsigned int timeout = TALITOS_TIMEOUT; | 540 | unsigned int timeout = TALITOS_TIMEOUT; |
521 | int ch, error, reset_dev = 0, reset_ch = 0; | 541 | int ch, error, reset_dev = 0, reset_ch = 0; |
@@ -528,8 +548,8 @@ static void talitos_error(unsigned long data, u32 isr, u32 isr_lo) | |||
528 | 548 | ||
529 | error = -EINVAL; | 549 | error = -EINVAL; |
530 | 550 | ||
531 | v = in_be32(priv->reg + TALITOS_CCPSR(ch)); | 551 | v = in_be32(priv->chan[ch].reg + TALITOS_CCPSR); |
532 | v_lo = in_be32(priv->reg + TALITOS_CCPSR_LO(ch)); | 552 | v_lo = in_be32(priv->chan[ch].reg + TALITOS_CCPSR_LO); |
533 | 553 | ||
534 | if (v_lo & TALITOS_CCPSR_LO_DOF) { | 554 | if (v_lo & TALITOS_CCPSR_LO_DOF) { |
535 | dev_err(dev, "double fetch fifo overflow error\n"); | 555 | dev_err(dev, "double fetch fifo overflow error\n"); |
@@ -567,10 +587,10 @@ static void talitos_error(unsigned long data, u32 isr, u32 isr_lo) | |||
567 | if (reset_ch) { | 587 | if (reset_ch) { |
568 | reset_channel(dev, ch); | 588 | reset_channel(dev, ch); |
569 | } else { | 589 | } else { |
570 | setbits32(priv->reg + TALITOS_CCCR(ch), | 590 | setbits32(priv->chan[ch].reg + TALITOS_CCCR, |
571 | TALITOS_CCCR_CONT); | 591 | TALITOS_CCCR_CONT); |
572 | setbits32(priv->reg + TALITOS_CCCR_LO(ch), 0); | 592 | setbits32(priv->chan[ch].reg + TALITOS_CCCR_LO, 0); |
573 | while ((in_be32(priv->reg + TALITOS_CCCR(ch)) & | 593 | while ((in_be32(priv->chan[ch].reg + TALITOS_CCCR) & |
574 | TALITOS_CCCR_CONT) && --timeout) | 594 | TALITOS_CCCR_CONT) && --timeout) |
575 | cpu_relax(); | 595 | cpu_relax(); |
576 | if (timeout == 0) { | 596 | if (timeout == 0) { |
@@ -580,7 +600,7 @@ static void talitos_error(unsigned long data, u32 isr, u32 isr_lo) | |||
580 | } | 600 | } |
581 | } | 601 | } |
582 | } | 602 | } |
583 | if (reset_dev || isr & ~TALITOS_ISR_CHERR || isr_lo) { | 603 | if (reset_dev || isr & ~TALITOS_ISR_4CHERR || isr_lo) { |
584 | dev_err(dev, "done overflow, internal time out, or rngu error: " | 604 | dev_err(dev, "done overflow, internal time out, or rngu error: " |
585 | "ISR 0x%08x_%08x\n", isr, isr_lo); | 605 | "ISR 0x%08x_%08x\n", isr, isr_lo); |
586 | 606 | ||
@@ -593,30 +613,35 @@ static void talitos_error(unsigned long data, u32 isr, u32 isr_lo) | |||
593 | } | 613 | } |
594 | } | 614 | } |
595 | 615 | ||
596 | static irqreturn_t talitos_interrupt(int irq, void *data) | 616 | #define DEF_TALITOS_INTERRUPT(name, ch_done_mask, ch_err_mask, tlet) \ |
597 | { | 617 | static irqreturn_t talitos_interrupt_##name(int irq, void *data) \ |
598 | struct device *dev = data; | 618 | { \ |
599 | struct talitos_private *priv = dev_get_drvdata(dev); | 619 | struct device *dev = data; \ |
600 | u32 isr, isr_lo; | 620 | struct talitos_private *priv = dev_get_drvdata(dev); \ |
601 | 621 | u32 isr, isr_lo; \ | |
602 | isr = in_be32(priv->reg + TALITOS_ISR); | 622 | \ |
603 | isr_lo = in_be32(priv->reg + TALITOS_ISR_LO); | 623 | isr = in_be32(priv->reg + TALITOS_ISR); \ |
604 | /* Acknowledge interrupt */ | 624 | isr_lo = in_be32(priv->reg + TALITOS_ISR_LO); \ |
605 | out_be32(priv->reg + TALITOS_ICR, isr); | 625 | /* Acknowledge interrupt */ \ |
606 | out_be32(priv->reg + TALITOS_ICR_LO, isr_lo); | 626 | out_be32(priv->reg + TALITOS_ICR, isr & (ch_done_mask | ch_err_mask)); \ |
607 | 627 | out_be32(priv->reg + TALITOS_ICR_LO, isr_lo); \ | |
608 | if (unlikely((isr & ~TALITOS_ISR_CHDONE) || isr_lo)) | 628 | \ |
609 | talitos_error((unsigned long)data, isr, isr_lo); | 629 | if (unlikely((isr & ~TALITOS_ISR_4CHDONE) & ch_err_mask || isr_lo)) \ |
610 | else | 630 | talitos_error(dev, isr, isr_lo); \ |
611 | if (likely(isr & TALITOS_ISR_CHDONE)) { | 631 | else \ |
612 | /* mask further done interrupts. */ | 632 | if (likely(isr & ch_done_mask)) { \ |
613 | clrbits32(priv->reg + TALITOS_IMR, TALITOS_IMR_DONE); | 633 | /* mask further done interrupts. */ \ |
614 | /* done_task will unmask done interrupts at exit */ | 634 | clrbits32(priv->reg + TALITOS_IMR, ch_done_mask); \ |
615 | tasklet_schedule(&priv->done_task); | 635 | /* done_task will unmask done interrupts at exit */ \ |
616 | } | 636 | tasklet_schedule(&priv->done_task[tlet]); \ |
617 | 637 | } \ | |
618 | return (isr || isr_lo) ? IRQ_HANDLED : IRQ_NONE; | 638 | \ |
639 | return (isr & (ch_done_mask | ch_err_mask) || isr_lo) ? IRQ_HANDLED : \ | ||
640 | IRQ_NONE; \ | ||
619 | } | 641 | } |
642 | DEF_TALITOS_INTERRUPT(4ch, TALITOS_ISR_4CHDONE, TALITOS_ISR_4CHERR, 0) | ||
643 | DEF_TALITOS_INTERRUPT(ch0_2, TALITOS_ISR_CH_0_2_DONE, TALITOS_ISR_CH_0_2_ERR, 0) | ||
644 | DEF_TALITOS_INTERRUPT(ch1_3, TALITOS_ISR_CH_1_3_DONE, TALITOS_ISR_CH_1_3_ERR, 1) | ||
620 | 645 | ||
621 | /* | 646 | /* |
622 | * hwrng | 647 | * hwrng |
@@ -1874,6 +1899,97 @@ static int ahash_digest(struct ahash_request *areq) | |||
1874 | return ahash_process_req(areq, areq->nbytes); | 1899 | return ahash_process_req(areq, areq->nbytes); |
1875 | } | 1900 | } |
1876 | 1901 | ||
1902 | struct keyhash_result { | ||
1903 | struct completion completion; | ||
1904 | int err; | ||
1905 | }; | ||
1906 | |||
1907 | static void keyhash_complete(struct crypto_async_request *req, int err) | ||
1908 | { | ||
1909 | struct keyhash_result *res = req->data; | ||
1910 | |||
1911 | if (err == -EINPROGRESS) | ||
1912 | return; | ||
1913 | |||
1914 | res->err = err; | ||
1915 | complete(&res->completion); | ||
1916 | } | ||
1917 | |||
1918 | static int keyhash(struct crypto_ahash *tfm, const u8 *key, unsigned int keylen, | ||
1919 | u8 *hash) | ||
1920 | { | ||
1921 | struct talitos_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm)); | ||
1922 | |||
1923 | struct scatterlist sg[1]; | ||
1924 | struct ahash_request *req; | ||
1925 | struct keyhash_result hresult; | ||
1926 | int ret; | ||
1927 | |||
1928 | init_completion(&hresult.completion); | ||
1929 | |||
1930 | req = ahash_request_alloc(tfm, GFP_KERNEL); | ||
1931 | if (!req) | ||
1932 | return -ENOMEM; | ||
1933 | |||
1934 | /* Keep tfm keylen == 0 during hash of the long key */ | ||
1935 | ctx->keylen = 0; | ||
1936 | ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG, | ||
1937 | keyhash_complete, &hresult); | ||
1938 | |||
1939 | sg_init_one(&sg[0], key, keylen); | ||
1940 | |||
1941 | ahash_request_set_crypt(req, sg, hash, keylen); | ||
1942 | ret = crypto_ahash_digest(req); | ||
1943 | switch (ret) { | ||
1944 | case 0: | ||
1945 | break; | ||
1946 | case -EINPROGRESS: | ||
1947 | case -EBUSY: | ||
1948 | ret = wait_for_completion_interruptible( | ||
1949 | &hresult.completion); | ||
1950 | if (!ret) | ||
1951 | ret = hresult.err; | ||
1952 | break; | ||
1953 | default: | ||
1954 | break; | ||
1955 | } | ||
1956 | ahash_request_free(req); | ||
1957 | |||
1958 | return ret; | ||
1959 | } | ||
1960 | |||
1961 | static int ahash_setkey(struct crypto_ahash *tfm, const u8 *key, | ||
1962 | unsigned int keylen) | ||
1963 | { | ||
1964 | struct talitos_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm)); | ||
1965 | unsigned int blocksize = | ||
1966 | crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm)); | ||
1967 | unsigned int digestsize = crypto_ahash_digestsize(tfm); | ||
1968 | unsigned int keysize = keylen; | ||
1969 | u8 hash[SHA512_DIGEST_SIZE]; | ||
1970 | int ret; | ||
1971 | |||
1972 | if (keylen <= blocksize) | ||
1973 | memcpy(ctx->key, key, keysize); | ||
1974 | else { | ||
1975 | /* Must get the hash of the long key */ | ||
1976 | ret = keyhash(tfm, key, keylen, hash); | ||
1977 | |||
1978 | if (ret) { | ||
1979 | crypto_ahash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN); | ||
1980 | return -EINVAL; | ||
1981 | } | ||
1982 | |||
1983 | keysize = digestsize; | ||
1984 | memcpy(ctx->key, hash, digestsize); | ||
1985 | } | ||
1986 | |||
1987 | ctx->keylen = keysize; | ||
1988 | |||
1989 | return 0; | ||
1990 | } | ||
1991 | |||
1992 | |||
1877 | struct talitos_alg_template { | 1993 | struct talitos_alg_template { |
1878 | u32 type; | 1994 | u32 type; |
1879 | union { | 1995 | union { |
@@ -2217,6 +2333,138 @@ static struct talitos_alg_template driver_algs[] = { | |||
2217 | DESC_HDR_SEL0_MDEUB | | 2333 | DESC_HDR_SEL0_MDEUB | |
2218 | DESC_HDR_MODE0_MDEUB_SHA512, | 2334 | DESC_HDR_MODE0_MDEUB_SHA512, |
2219 | }, | 2335 | }, |
2336 | { .type = CRYPTO_ALG_TYPE_AHASH, | ||
2337 | .alg.hash = { | ||
2338 | .init = ahash_init, | ||
2339 | .update = ahash_update, | ||
2340 | .final = ahash_final, | ||
2341 | .finup = ahash_finup, | ||
2342 | .digest = ahash_digest, | ||
2343 | .setkey = ahash_setkey, | ||
2344 | .halg.digestsize = MD5_DIGEST_SIZE, | ||
2345 | .halg.base = { | ||
2346 | .cra_name = "hmac(md5)", | ||
2347 | .cra_driver_name = "hmac-md5-talitos", | ||
2348 | .cra_blocksize = MD5_BLOCK_SIZE, | ||
2349 | .cra_flags = CRYPTO_ALG_TYPE_AHASH | | ||
2350 | CRYPTO_ALG_ASYNC, | ||
2351 | .cra_type = &crypto_ahash_type | ||
2352 | } | ||
2353 | }, | ||
2354 | .desc_hdr_template = DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU | | ||
2355 | DESC_HDR_SEL0_MDEUA | | ||
2356 | DESC_HDR_MODE0_MDEU_MD5, | ||
2357 | }, | ||
2358 | { .type = CRYPTO_ALG_TYPE_AHASH, | ||
2359 | .alg.hash = { | ||
2360 | .init = ahash_init, | ||
2361 | .update = ahash_update, | ||
2362 | .final = ahash_final, | ||
2363 | .finup = ahash_finup, | ||
2364 | .digest = ahash_digest, | ||
2365 | .setkey = ahash_setkey, | ||
2366 | .halg.digestsize = SHA1_DIGEST_SIZE, | ||
2367 | .halg.base = { | ||
2368 | .cra_name = "hmac(sha1)", | ||
2369 | .cra_driver_name = "hmac-sha1-talitos", | ||
2370 | .cra_blocksize = SHA1_BLOCK_SIZE, | ||
2371 | .cra_flags = CRYPTO_ALG_TYPE_AHASH | | ||
2372 | CRYPTO_ALG_ASYNC, | ||
2373 | .cra_type = &crypto_ahash_type | ||
2374 | } | ||
2375 | }, | ||
2376 | .desc_hdr_template = DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU | | ||
2377 | DESC_HDR_SEL0_MDEUA | | ||
2378 | DESC_HDR_MODE0_MDEU_SHA1, | ||
2379 | }, | ||
2380 | { .type = CRYPTO_ALG_TYPE_AHASH, | ||
2381 | .alg.hash = { | ||
2382 | .init = ahash_init, | ||
2383 | .update = ahash_update, | ||
2384 | .final = ahash_final, | ||
2385 | .finup = ahash_finup, | ||
2386 | .digest = ahash_digest, | ||
2387 | .setkey = ahash_setkey, | ||
2388 | .halg.digestsize = SHA224_DIGEST_SIZE, | ||
2389 | .halg.base = { | ||
2390 | .cra_name = "hmac(sha224)", | ||
2391 | .cra_driver_name = "hmac-sha224-talitos", | ||
2392 | .cra_blocksize = SHA224_BLOCK_SIZE, | ||
2393 | .cra_flags = CRYPTO_ALG_TYPE_AHASH | | ||
2394 | CRYPTO_ALG_ASYNC, | ||
2395 | .cra_type = &crypto_ahash_type | ||
2396 | } | ||
2397 | }, | ||
2398 | .desc_hdr_template = DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU | | ||
2399 | DESC_HDR_SEL0_MDEUA | | ||
2400 | DESC_HDR_MODE0_MDEU_SHA224, | ||
2401 | }, | ||
2402 | { .type = CRYPTO_ALG_TYPE_AHASH, | ||
2403 | .alg.hash = { | ||
2404 | .init = ahash_init, | ||
2405 | .update = ahash_update, | ||
2406 | .final = ahash_final, | ||
2407 | .finup = ahash_finup, | ||
2408 | .digest = ahash_digest, | ||
2409 | .setkey = ahash_setkey, | ||
2410 | .halg.digestsize = SHA256_DIGEST_SIZE, | ||
2411 | .halg.base = { | ||
2412 | .cra_name = "hmac(sha256)", | ||
2413 | .cra_driver_name = "hmac-sha256-talitos", | ||
2414 | .cra_blocksize = SHA256_BLOCK_SIZE, | ||
2415 | .cra_flags = CRYPTO_ALG_TYPE_AHASH | | ||
2416 | CRYPTO_ALG_ASYNC, | ||
2417 | .cra_type = &crypto_ahash_type | ||
2418 | } | ||
2419 | }, | ||
2420 | .desc_hdr_template = DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU | | ||
2421 | DESC_HDR_SEL0_MDEUA | | ||
2422 | DESC_HDR_MODE0_MDEU_SHA256, | ||
2423 | }, | ||
2424 | { .type = CRYPTO_ALG_TYPE_AHASH, | ||
2425 | .alg.hash = { | ||
2426 | .init = ahash_init, | ||
2427 | .update = ahash_update, | ||
2428 | .final = ahash_final, | ||
2429 | .finup = ahash_finup, | ||
2430 | .digest = ahash_digest, | ||
2431 | .setkey = ahash_setkey, | ||
2432 | .halg.digestsize = SHA384_DIGEST_SIZE, | ||
2433 | .halg.base = { | ||
2434 | .cra_name = "hmac(sha384)", | ||
2435 | .cra_driver_name = "hmac-sha384-talitos", | ||
2436 | .cra_blocksize = SHA384_BLOCK_SIZE, | ||
2437 | .cra_flags = CRYPTO_ALG_TYPE_AHASH | | ||
2438 | CRYPTO_ALG_ASYNC, | ||
2439 | .cra_type = &crypto_ahash_type | ||
2440 | } | ||
2441 | }, | ||
2442 | .desc_hdr_template = DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU | | ||
2443 | DESC_HDR_SEL0_MDEUB | | ||
2444 | DESC_HDR_MODE0_MDEUB_SHA384, | ||
2445 | }, | ||
2446 | { .type = CRYPTO_ALG_TYPE_AHASH, | ||
2447 | .alg.hash = { | ||
2448 | .init = ahash_init, | ||
2449 | .update = ahash_update, | ||
2450 | .final = ahash_final, | ||
2451 | .finup = ahash_finup, | ||
2452 | .digest = ahash_digest, | ||
2453 | .setkey = ahash_setkey, | ||
2454 | .halg.digestsize = SHA512_DIGEST_SIZE, | ||
2455 | .halg.base = { | ||
2456 | .cra_name = "hmac(sha512)", | ||
2457 | .cra_driver_name = "hmac-sha512-talitos", | ||
2458 | .cra_blocksize = SHA512_BLOCK_SIZE, | ||
2459 | .cra_flags = CRYPTO_ALG_TYPE_AHASH | | ||
2460 | CRYPTO_ALG_ASYNC, | ||
2461 | .cra_type = &crypto_ahash_type | ||
2462 | } | ||
2463 | }, | ||
2464 | .desc_hdr_template = DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU | | ||
2465 | DESC_HDR_SEL0_MDEUB | | ||
2466 | DESC_HDR_MODE0_MDEUB_SHA512, | ||
2467 | } | ||
2220 | }; | 2468 | }; |
2221 | 2469 | ||
2222 | struct talitos_crypto_alg { | 2470 | struct talitos_crypto_alg { |
@@ -2331,12 +2579,15 @@ static int talitos_remove(struct platform_device *ofdev) | |||
2331 | 2579 | ||
2332 | kfree(priv->chan); | 2580 | kfree(priv->chan); |
2333 | 2581 | ||
2334 | if (priv->irq != NO_IRQ) { | 2582 | for (i = 0; i < 2; i++) |
2335 | free_irq(priv->irq, dev); | 2583 | if (priv->irq[i]) { |
2336 | irq_dispose_mapping(priv->irq); | 2584 | free_irq(priv->irq[i], dev); |
2337 | } | 2585 | irq_dispose_mapping(priv->irq[i]); |
2586 | } | ||
2338 | 2587 | ||
2339 | tasklet_kill(&priv->done_task); | 2588 | tasklet_kill(&priv->done_task[0]); |
2589 | if (priv->irq[1]) | ||
2590 | tasklet_kill(&priv->done_task[1]); | ||
2340 | 2591 | ||
2341 | iounmap(priv->reg); | 2592 | iounmap(priv->reg); |
2342 | 2593 | ||
@@ -2373,8 +2624,14 @@ static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev, | |||
2373 | case CRYPTO_ALG_TYPE_AHASH: | 2624 | case CRYPTO_ALG_TYPE_AHASH: |
2374 | alg = &t_alg->algt.alg.hash.halg.base; | 2625 | alg = &t_alg->algt.alg.hash.halg.base; |
2375 | alg->cra_init = talitos_cra_init_ahash; | 2626 | alg->cra_init = talitos_cra_init_ahash; |
2627 | if (!(priv->features & TALITOS_FTR_HMAC_OK) && | ||
2628 | !strncmp(alg->cra_name, "hmac", 4)) { | ||
2629 | kfree(t_alg); | ||
2630 | return ERR_PTR(-ENOTSUPP); | ||
2631 | } | ||
2376 | if (!(priv->features & TALITOS_FTR_SHA224_HWINIT) && | 2632 | if (!(priv->features & TALITOS_FTR_SHA224_HWINIT) && |
2377 | !strcmp(alg->cra_name, "sha224")) { | 2633 | (!strcmp(alg->cra_name, "sha224") || |
2634 | !strcmp(alg->cra_name, "hmac(sha224)"))) { | ||
2378 | t_alg->algt.alg.hash.init = ahash_init_sha224_swinit; | 2635 | t_alg->algt.alg.hash.init = ahash_init_sha224_swinit; |
2379 | t_alg->algt.desc_hdr_template = | 2636 | t_alg->algt.desc_hdr_template = |
2380 | DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU | | 2637 | DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU | |
@@ -2397,6 +2654,54 @@ static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev, | |||
2397 | return t_alg; | 2654 | return t_alg; |
2398 | } | 2655 | } |
2399 | 2656 | ||
2657 | static int talitos_probe_irq(struct platform_device *ofdev) | ||
2658 | { | ||
2659 | struct device *dev = &ofdev->dev; | ||
2660 | struct device_node *np = ofdev->dev.of_node; | ||
2661 | struct talitos_private *priv = dev_get_drvdata(dev); | ||
2662 | int err; | ||
2663 | |||
2664 | priv->irq[0] = irq_of_parse_and_map(np, 0); | ||
2665 | if (!priv->irq[0]) { | ||
2666 | dev_err(dev, "failed to map irq\n"); | ||
2667 | return -EINVAL; | ||
2668 | } | ||
2669 | |||
2670 | priv->irq[1] = irq_of_parse_and_map(np, 1); | ||
2671 | |||
2672 | /* get the primary irq line */ | ||
2673 | if (!priv->irq[1]) { | ||
2674 | err = request_irq(priv->irq[0], talitos_interrupt_4ch, 0, | ||
2675 | dev_driver_string(dev), dev); | ||
2676 | goto primary_out; | ||
2677 | } | ||
2678 | |||
2679 | err = request_irq(priv->irq[0], talitos_interrupt_ch0_2, 0, | ||
2680 | dev_driver_string(dev), dev); | ||
2681 | if (err) | ||
2682 | goto primary_out; | ||
2683 | |||
2684 | /* get the secondary irq line */ | ||
2685 | err = request_irq(priv->irq[1], talitos_interrupt_ch1_3, 0, | ||
2686 | dev_driver_string(dev), dev); | ||
2687 | if (err) { | ||
2688 | dev_err(dev, "failed to request secondary irq\n"); | ||
2689 | irq_dispose_mapping(priv->irq[1]); | ||
2690 | priv->irq[1] = 0; | ||
2691 | } | ||
2692 | |||
2693 | return err; | ||
2694 | |||
2695 | primary_out: | ||
2696 | if (err) { | ||
2697 | dev_err(dev, "failed to request primary irq\n"); | ||
2698 | irq_dispose_mapping(priv->irq[0]); | ||
2699 | priv->irq[0] = 0; | ||
2700 | } | ||
2701 | |||
2702 | return err; | ||
2703 | } | ||
2704 | |||
2400 | static int talitos_probe(struct platform_device *ofdev) | 2705 | static int talitos_probe(struct platform_device *ofdev) |
2401 | { | 2706 | { |
2402 | struct device *dev = &ofdev->dev; | 2707 | struct device *dev = &ofdev->dev; |
@@ -2413,28 +2718,22 @@ static int talitos_probe(struct platform_device *ofdev) | |||
2413 | 2718 | ||
2414 | priv->ofdev = ofdev; | 2719 | priv->ofdev = ofdev; |
2415 | 2720 | ||
2416 | tasklet_init(&priv->done_task, talitos_done, (unsigned long)dev); | 2721 | err = talitos_probe_irq(ofdev); |
2417 | 2722 | if (err) | |
2418 | INIT_LIST_HEAD(&priv->alg_list); | ||
2419 | |||
2420 | priv->irq = irq_of_parse_and_map(np, 0); | ||
2421 | |||
2422 | if (priv->irq == NO_IRQ) { | ||
2423 | dev_err(dev, "failed to map irq\n"); | ||
2424 | err = -EINVAL; | ||
2425 | goto err_out; | 2723 | goto err_out; |
2426 | } | ||
2427 | 2724 | ||
2428 | /* get the irq line */ | 2725 | if (!priv->irq[1]) { |
2429 | err = request_irq(priv->irq, talitos_interrupt, 0, | 2726 | tasklet_init(&priv->done_task[0], talitos_done_4ch, |
2430 | dev_driver_string(dev), dev); | 2727 | (unsigned long)dev); |
2431 | if (err) { | 2728 | } else { |
2432 | dev_err(dev, "failed to request irq %d\n", priv->irq); | 2729 | tasklet_init(&priv->done_task[0], talitos_done_ch0_2, |
2433 | irq_dispose_mapping(priv->irq); | 2730 | (unsigned long)dev); |
2434 | priv->irq = NO_IRQ; | 2731 | tasklet_init(&priv->done_task[1], talitos_done_ch1_3, |
2435 | goto err_out; | 2732 | (unsigned long)dev); |
2436 | } | 2733 | } |
2437 | 2734 | ||
2735 | INIT_LIST_HEAD(&priv->alg_list); | ||
2736 | |||
2438 | priv->reg = of_iomap(np, 0); | 2737 | priv->reg = of_iomap(np, 0); |
2439 | if (!priv->reg) { | 2738 | if (!priv->reg) { |
2440 | dev_err(dev, "failed to of_iomap\n"); | 2739 | dev_err(dev, "failed to of_iomap\n"); |
@@ -2471,7 +2770,8 @@ static int talitos_probe(struct platform_device *ofdev) | |||
2471 | 2770 | ||
2472 | if (of_device_is_compatible(np, "fsl,sec2.1")) | 2771 | if (of_device_is_compatible(np, "fsl,sec2.1")) |
2473 | priv->features |= TALITOS_FTR_HW_AUTH_CHECK | | 2772 | priv->features |= TALITOS_FTR_HW_AUTH_CHECK | |
2474 | TALITOS_FTR_SHA224_HWINIT; | 2773 | TALITOS_FTR_SHA224_HWINIT | |
2774 | TALITOS_FTR_HMAC_OK; | ||
2475 | 2775 | ||
2476 | priv->chan = kzalloc(sizeof(struct talitos_channel) * | 2776 | priv->chan = kzalloc(sizeof(struct talitos_channel) * |
2477 | priv->num_channels, GFP_KERNEL); | 2777 | priv->num_channels, GFP_KERNEL); |
@@ -2482,6 +2782,12 @@ static int talitos_probe(struct platform_device *ofdev) | |||
2482 | } | 2782 | } |
2483 | 2783 | ||
2484 | for (i = 0; i < priv->num_channels; i++) { | 2784 | for (i = 0; i < priv->num_channels; i++) { |
2785 | priv->chan[i].reg = priv->reg + TALITOS_CH_STRIDE * (i + 1); | ||
2786 | if (!priv->irq[1] || !(i & 1)) | ||
2787 | priv->chan[i].reg += TALITOS_CH_BASE_OFFSET; | ||
2788 | } | ||
2789 | |||
2790 | for (i = 0; i < priv->num_channels; i++) { | ||
2485 | spin_lock_init(&priv->chan[i].head_lock); | 2791 | spin_lock_init(&priv->chan[i].head_lock); |
2486 | spin_lock_init(&priv->chan[i].tail_lock); | 2792 | spin_lock_init(&priv->chan[i].tail_lock); |
2487 | } | 2793 | } |
@@ -2530,6 +2836,8 @@ static int talitos_probe(struct platform_device *ofdev) | |||
2530 | t_alg = talitos_alg_alloc(dev, &driver_algs[i]); | 2836 | t_alg = talitos_alg_alloc(dev, &driver_algs[i]); |
2531 | if (IS_ERR(t_alg)) { | 2837 | if (IS_ERR(t_alg)) { |
2532 | err = PTR_ERR(t_alg); | 2838 | err = PTR_ERR(t_alg); |
2839 | if (err == -ENOTSUPP) | ||
2840 | continue; | ||
2533 | goto err_out; | 2841 | goto err_out; |
2534 | } | 2842 | } |
2535 | 2843 | ||
@@ -2551,12 +2859,13 @@ static int talitos_probe(struct platform_device *ofdev) | |||
2551 | dev_err(dev, "%s alg registration failed\n", | 2859 | dev_err(dev, "%s alg registration failed\n", |
2552 | name); | 2860 | name); |
2553 | kfree(t_alg); | 2861 | kfree(t_alg); |
2554 | } else { | 2862 | } else |
2555 | list_add_tail(&t_alg->entry, &priv->alg_list); | 2863 | list_add_tail(&t_alg->entry, &priv->alg_list); |
2556 | dev_info(dev, "%s\n", name); | ||
2557 | } | ||
2558 | } | 2864 | } |
2559 | } | 2865 | } |
2866 | if (!list_empty(&priv->alg_list)) | ||
2867 | dev_info(dev, "%s algorithms registered in /proc/crypto\n", | ||
2868 | (char *)of_get_property(np, "compatible", NULL)); | ||
2560 | 2869 | ||
2561 | return 0; | 2870 | return 0; |
2562 | 2871 | ||
@@ -2584,17 +2893,7 @@ static struct platform_driver talitos_driver = { | |||
2584 | .remove = talitos_remove, | 2893 | .remove = talitos_remove, |
2585 | }; | 2894 | }; |
2586 | 2895 | ||
2587 | static int __init talitos_init(void) | 2896 | module_platform_driver(talitos_driver); |
2588 | { | ||
2589 | return platform_driver_register(&talitos_driver); | ||
2590 | } | ||
2591 | module_init(talitos_init); | ||
2592 | |||
2593 | static void __exit talitos_exit(void) | ||
2594 | { | ||
2595 | platform_driver_unregister(&talitos_driver); | ||
2596 | } | ||
2597 | module_exit(talitos_exit); | ||
2598 | 2897 | ||
2599 | MODULE_LICENSE("GPL"); | 2898 | MODULE_LICENSE("GPL"); |
2600 | MODULE_AUTHOR("Kim Phillips <kim.phillips@freescale.com>"); | 2899 | MODULE_AUTHOR("Kim Phillips <kim.phillips@freescale.com>"); |
diff --git a/drivers/crypto/talitos.h b/drivers/crypto/talitos.h index 0b746aca4587..3c173954ef29 100644 --- a/drivers/crypto/talitos.h +++ b/drivers/crypto/talitos.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Freescale SEC (talitos) device register and descriptor header defines | 2 | * Freescale SEC (talitos) device register and descriptor header defines |
3 | * | 3 | * |
4 | * Copyright (c) 2006-2010 Freescale Semiconductor, Inc. | 4 | * Copyright (c) 2006-2011 Freescale Semiconductor, Inc. |
5 | * | 5 | * |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions | 7 | * modification, are permitted provided that the following conditions |
@@ -34,28 +34,37 @@ | |||
34 | 34 | ||
35 | /* global register offset addresses */ | 35 | /* global register offset addresses */ |
36 | #define TALITOS_MCR 0x1030 /* master control register */ | 36 | #define TALITOS_MCR 0x1030 /* master control register */ |
37 | #define TALITOS_MCR_LO 0x1038 | 37 | #define TALITOS_MCR_RCA0 (1 << 15) /* remap channel 0 */ |
38 | #define TALITOS_MCR_RCA1 (1 << 14) /* remap channel 1 */ | ||
39 | #define TALITOS_MCR_RCA2 (1 << 13) /* remap channel 2 */ | ||
40 | #define TALITOS_MCR_RCA3 (1 << 12) /* remap channel 3 */ | ||
38 | #define TALITOS_MCR_SWR 0x1 /* s/w reset */ | 41 | #define TALITOS_MCR_SWR 0x1 /* s/w reset */ |
42 | #define TALITOS_MCR_LO 0x1034 | ||
39 | #define TALITOS_IMR 0x1008 /* interrupt mask register */ | 43 | #define TALITOS_IMR 0x1008 /* interrupt mask register */ |
40 | #define TALITOS_IMR_INIT 0x100ff /* enable channel IRQs */ | 44 | #define TALITOS_IMR_INIT 0x100ff /* enable channel IRQs */ |
41 | #define TALITOS_IMR_DONE 0x00055 /* done IRQs */ | 45 | #define TALITOS_IMR_DONE 0x00055 /* done IRQs */ |
42 | #define TALITOS_IMR_LO 0x100C | 46 | #define TALITOS_IMR_LO 0x100C |
43 | #define TALITOS_IMR_LO_INIT 0x20000 /* allow RNGU error IRQs */ | 47 | #define TALITOS_IMR_LO_INIT 0x20000 /* allow RNGU error IRQs */ |
44 | #define TALITOS_ISR 0x1010 /* interrupt status register */ | 48 | #define TALITOS_ISR 0x1010 /* interrupt status register */ |
45 | #define TALITOS_ISR_CHERR 0xaa /* channel errors mask */ | 49 | #define TALITOS_ISR_4CHERR 0xaa /* 4 channel errors mask */ |
46 | #define TALITOS_ISR_CHDONE 0x55 /* channel done mask */ | 50 | #define TALITOS_ISR_4CHDONE 0x55 /* 4 channel done mask */ |
51 | #define TALITOS_ISR_CH_0_2_ERR 0x22 /* channels 0, 2 errors mask */ | ||
52 | #define TALITOS_ISR_CH_0_2_DONE 0x11 /* channels 0, 2 done mask */ | ||
53 | #define TALITOS_ISR_CH_1_3_ERR 0x88 /* channels 1, 3 errors mask */ | ||
54 | #define TALITOS_ISR_CH_1_3_DONE 0x44 /* channels 1, 3 done mask */ | ||
47 | #define TALITOS_ISR_LO 0x1014 | 55 | #define TALITOS_ISR_LO 0x1014 |
48 | #define TALITOS_ICR 0x1018 /* interrupt clear register */ | 56 | #define TALITOS_ICR 0x1018 /* interrupt clear register */ |
49 | #define TALITOS_ICR_LO 0x101C | 57 | #define TALITOS_ICR_LO 0x101C |
50 | 58 | ||
51 | /* channel register address stride */ | 59 | /* channel register address stride */ |
60 | #define TALITOS_CH_BASE_OFFSET 0x1000 /* default channel map base */ | ||
52 | #define TALITOS_CH_STRIDE 0x100 | 61 | #define TALITOS_CH_STRIDE 0x100 |
53 | 62 | ||
54 | /* channel configuration register */ | 63 | /* channel configuration register */ |
55 | #define TALITOS_CCCR(ch) (ch * TALITOS_CH_STRIDE + 0x1108) | 64 | #define TALITOS_CCCR 0x8 |
56 | #define TALITOS_CCCR_CONT 0x2 /* channel continue */ | 65 | #define TALITOS_CCCR_CONT 0x2 /* channel continue */ |
57 | #define TALITOS_CCCR_RESET 0x1 /* channel reset */ | 66 | #define TALITOS_CCCR_RESET 0x1 /* channel reset */ |
58 | #define TALITOS_CCCR_LO(ch) (ch * TALITOS_CH_STRIDE + 0x110c) | 67 | #define TALITOS_CCCR_LO 0xc |
59 | #define TALITOS_CCCR_LO_IWSE 0x80 /* chan. ICCR writeback enab. */ | 68 | #define TALITOS_CCCR_LO_IWSE 0x80 /* chan. ICCR writeback enab. */ |
60 | #define TALITOS_CCCR_LO_EAE 0x20 /* extended address enable */ | 69 | #define TALITOS_CCCR_LO_EAE 0x20 /* extended address enable */ |
61 | #define TALITOS_CCCR_LO_CDWE 0x10 /* chan. done writeback enab. */ | 70 | #define TALITOS_CCCR_LO_CDWE 0x10 /* chan. done writeback enab. */ |
@@ -63,8 +72,8 @@ | |||
63 | #define TALITOS_CCCR_LO_CDIE 0x2 /* channel done IRQ enable */ | 72 | #define TALITOS_CCCR_LO_CDIE 0x2 /* channel done IRQ enable */ |
64 | 73 | ||
65 | /* CCPSR: channel pointer status register */ | 74 | /* CCPSR: channel pointer status register */ |
66 | #define TALITOS_CCPSR(ch) (ch * TALITOS_CH_STRIDE + 0x1110) | 75 | #define TALITOS_CCPSR 0x10 |
67 | #define TALITOS_CCPSR_LO(ch) (ch * TALITOS_CH_STRIDE + 0x1114) | 76 | #define TALITOS_CCPSR_LO 0x14 |
68 | #define TALITOS_CCPSR_LO_DOF 0x8000 /* double FF write oflow error */ | 77 | #define TALITOS_CCPSR_LO_DOF 0x8000 /* double FF write oflow error */ |
69 | #define TALITOS_CCPSR_LO_SOF 0x4000 /* single FF write oflow error */ | 78 | #define TALITOS_CCPSR_LO_SOF 0x4000 /* single FF write oflow error */ |
70 | #define TALITOS_CCPSR_LO_MDTE 0x2000 /* master data transfer error */ | 79 | #define TALITOS_CCPSR_LO_MDTE 0x2000 /* master data transfer error */ |
@@ -79,24 +88,24 @@ | |||
79 | #define TALITOS_CCPSR_LO_SRL 0x0010 /* scatter return/length error */ | 88 | #define TALITOS_CCPSR_LO_SRL 0x0010 /* scatter return/length error */ |
80 | 89 | ||
81 | /* channel fetch fifo register */ | 90 | /* channel fetch fifo register */ |
82 | #define TALITOS_FF(ch) (ch * TALITOS_CH_STRIDE + 0x1148) | 91 | #define TALITOS_FF 0x48 |
83 | #define TALITOS_FF_LO(ch) (ch * TALITOS_CH_STRIDE + 0x114c) | 92 | #define TALITOS_FF_LO 0x4c |
84 | 93 | ||
85 | /* current descriptor pointer register */ | 94 | /* current descriptor pointer register */ |
86 | #define TALITOS_CDPR(ch) (ch * TALITOS_CH_STRIDE + 0x1140) | 95 | #define TALITOS_CDPR 0x40 |
87 | #define TALITOS_CDPR_LO(ch) (ch * TALITOS_CH_STRIDE + 0x1144) | 96 | #define TALITOS_CDPR_LO 0x44 |
88 | 97 | ||
89 | /* descriptor buffer register */ | 98 | /* descriptor buffer register */ |
90 | #define TALITOS_DESCBUF(ch) (ch * TALITOS_CH_STRIDE + 0x1180) | 99 | #define TALITOS_DESCBUF 0x80 |
91 | #define TALITOS_DESCBUF_LO(ch) (ch * TALITOS_CH_STRIDE + 0x1184) | 100 | #define TALITOS_DESCBUF_LO 0x84 |
92 | 101 | ||
93 | /* gather link table */ | 102 | /* gather link table */ |
94 | #define TALITOS_GATHER(ch) (ch * TALITOS_CH_STRIDE + 0x11c0) | 103 | #define TALITOS_GATHER 0xc0 |
95 | #define TALITOS_GATHER_LO(ch) (ch * TALITOS_CH_STRIDE + 0x11c4) | 104 | #define TALITOS_GATHER_LO 0xc4 |
96 | 105 | ||
97 | /* scatter link table */ | 106 | /* scatter link table */ |
98 | #define TALITOS_SCATTER(ch) (ch * TALITOS_CH_STRIDE + 0x11e0) | 107 | #define TALITOS_SCATTER 0xe0 |
99 | #define TALITOS_SCATTER_LO(ch) (ch * TALITOS_CH_STRIDE + 0x11e4) | 108 | #define TALITOS_SCATTER_LO 0xe4 |
100 | 109 | ||
101 | /* execution unit interrupt status registers */ | 110 | /* execution unit interrupt status registers */ |
102 | #define TALITOS_DEUISR 0x2030 /* DES unit */ | 111 | #define TALITOS_DEUISR 0x2030 /* DES unit */ |