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authorLee Nipper <lee.nipper@freescale.com>2008-07-03 07:08:46 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2008-07-10 08:35:17 -0400
commit70bcaca75389a6c011ddc866eb1743b070a838b0 (patch)
tree531601ecc27517eca37c745be54c5fc6bb67337a /drivers/crypto/talitos.h
parentb43e726b32b85713c7c56b6545cf71c2b02b5e1a (diff)
crypto: talitos - Add support for 3des
This patch adds support for authenc(hmac(sha1),cbc(des3_ede)) to the talitos crypto driver for the Freescale Security Engine. Some adjustments were made to the scatterlist to link table conversion to make 3des work for ping -s 1439..1446. Signed-off-by: Lee Nipper <lee.nipper@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/talitos.h')
-rw-r--r--drivers/crypto/talitos.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/crypto/talitos.h b/drivers/crypto/talitos.h
index de0e37734af5..c48a405abf70 100644
--- a/drivers/crypto/talitos.h
+++ b/drivers/crypto/talitos.h
@@ -144,11 +144,10 @@
144#define DESC_HDR_SEL0_CRCU __constant_cpu_to_be32(0x80000000) 144#define DESC_HDR_SEL0_CRCU __constant_cpu_to_be32(0x80000000)
145 145
146/* primary execution unit mode (MODE0) and derivatives */ 146/* primary execution unit mode (MODE0) and derivatives */
147#define DESC_HDR_MODE0_ENCRYPT __constant_cpu_to_be32(0x00100000)
147#define DESC_HDR_MODE0_AESU_CBC __constant_cpu_to_be32(0x00200000) 148#define DESC_HDR_MODE0_AESU_CBC __constant_cpu_to_be32(0x00200000)
148#define DESC_HDR_MODE0_AESU_ENC __constant_cpu_to_be32(0x00100000)
149#define DESC_HDR_MODE0_DEU_CBC __constant_cpu_to_be32(0x00400000) 149#define DESC_HDR_MODE0_DEU_CBC __constant_cpu_to_be32(0x00400000)
150#define DESC_HDR_MODE0_DEU_3DES __constant_cpu_to_be32(0x00200000) 150#define DESC_HDR_MODE0_DEU_3DES __constant_cpu_to_be32(0x00200000)
151#define DESC_HDR_MODE0_DEU_ENC __constant_cpu_to_be32(0x00100000)
152#define DESC_HDR_MODE0_MDEU_INIT __constant_cpu_to_be32(0x01000000) 151#define DESC_HDR_MODE0_MDEU_INIT __constant_cpu_to_be32(0x01000000)
153#define DESC_HDR_MODE0_MDEU_HMAC __constant_cpu_to_be32(0x00800000) 152#define DESC_HDR_MODE0_MDEU_HMAC __constant_cpu_to_be32(0x00800000)
154#define DESC_HDR_MODE0_MDEU_PAD __constant_cpu_to_be32(0x00400000) 153#define DESC_HDR_MODE0_MDEU_PAD __constant_cpu_to_be32(0x00400000)