crypto: talitos - add hash algorithms

Add the following alorithms to talitos:
    md5,
    sha1,
    sha256,
    sha384,
    sha512.
These are all type ahash.

Signed-off-by: Lee Nipper <lee.nipper@gmail.com>
Acked-By: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

1 files changed, 8 insertions, 0 deletions

diff --git a/drivers/crypto/talitos.h b/drivers/crypto/talitos.h
index ff5a1450e145..05c57b730e99 100644
--- a/drivers/crypto/talitos.h
+++ b/drivers/crypto/talitos.h
@@ -130,6 +130,9 @@
 #define TALITOS_CRCUISR                 0xf030 /* cyclic redundancy check unit*/
 #define TALITOS_CRCUISR_LO              0xf034
 
+#define TALITOS_MDEU_CONTEXT_SIZE_MD5_SHA1_SHA256       0x28
+#define TALITOS_MDEU_CONTEXT_SIZE_SHA384_SHA512         0x48
+
 /*
  * talitos descriptor header (hdr) bits
  */
@@ -157,12 +160,15 @@
 #define DESC_HDR_MODE0_AESU_CBC         cpu_to_be32(0x00200000)
 #define DESC_HDR_MODE0_DEU_CBC          cpu_to_be32(0x00400000)
 #define DESC_HDR_MODE0_DEU_3DES         cpu_to_be32(0x00200000)
+#define DESC_HDR_MODE0_MDEU_CONT        cpu_to_be32(0x08000000)
 #define DESC_HDR_MODE0_MDEU_INIT        cpu_to_be32(0x01000000)
 #define DESC_HDR_MODE0_MDEU_HMAC        cpu_to_be32(0x00800000)
 #define DESC_HDR_MODE0_MDEU_PAD         cpu_to_be32(0x00400000)
 #define DESC_HDR_MODE0_MDEU_MD5         cpu_to_be32(0x00200000)
 #define DESC_HDR_MODE0_MDEU_SHA256      cpu_to_be32(0x00100000)
 #define DESC_HDR_MODE0_MDEU_SHA1        cpu_to_be32(0x00000000)
+#define DESC_HDR_MODE0_MDEUB_SHA384     cpu_to_be32(0x00000000)
+#define DESC_HDR_MODE0_MDEUB_SHA512     cpu_to_be32(0x00200000)
 #define DESC_HDR_MODE0_MDEU_MD5_HMAC    (DESC_HDR_MODE0_MDEU_MD5 | \
                                          DESC_HDR_MODE0_MDEU_HMAC)
 #define DESC_HDR_MODE0_MDEU_SHA256_HMAC (DESC_HDR_MODE0_MDEU_SHA256 | \
@@ -184,6 +190,8 @@
 #define DESC_HDR_MODE1_MDEU_MD5         cpu_to_be32(0x00000200)
 #define DESC_HDR_MODE1_MDEU_SHA256      cpu_to_be32(0x00000100)
 #define DESC_HDR_MODE1_MDEU_SHA1        cpu_to_be32(0x00000000)
+#define DESC_HDR_MODE1_MDEUB_SHA384     cpu_to_be32(0x00000000)
+#define DESC_HDR_MODE1_MDEUB_SHA512     cpu_to_be32(0x00000200)
 #define DESC_HDR_MODE1_MDEU_MD5_HMAC    (DESC_HDR_MODE1_MDEU_MD5 | \
                                          DESC_HDR_MODE1_MDEU_HMAC)
 #define DESC_HDR_MODE1_MDEU_SHA256_HMAC (DESC_HDR_MODE1_MDEU_SHA256 | \