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authorDmitry Kasatkin <dmitry.kasatkin@nokia.com>2010-11-30 03:13:27 -0500
committerHerbert Xu <herbert@gondor.apana.org.au>2010-12-02 03:37:05 -0500
commit3bd2e2216bc82a83fc5048f8e61d2d22dd5d9cda (patch)
tree4497403992937d9a531c04baad17de046948d845 /drivers/crypto/omap-aes.c
parentc920fa6051c1e7eb3733eaefd01e5bcdddb3d4c8 (diff)
crypto: omap-aes - DMA initialization fixes for OMAP off mode
DMA parameters for constant data were initialized during driver probe(). It seems that those settings sometimes are lost when devices goes to off mode. This patch makes DMA initialization just before use. It solves off mode problems. Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/omap-aes.c')
-rw-r--r--drivers/crypto/omap-aes.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 799ca517c121..41c91f3c7f14 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -339,18 +339,6 @@ static int omap_aes_dma_init(struct omap_aes_dev *dd)
339 goto err_dma_out; 339 goto err_dma_out;
340 } 340 }
341 341
342 omap_set_dma_dest_params(dd->dma_lch_in, 0, OMAP_DMA_AMODE_CONSTANT,
343 dd->phys_base + AES_REG_DATA, 0, 4);
344
345 omap_set_dma_dest_burst_mode(dd->dma_lch_in, OMAP_DMA_DATA_BURST_4);
346 omap_set_dma_src_burst_mode(dd->dma_lch_in, OMAP_DMA_DATA_BURST_4);
347
348 omap_set_dma_src_params(dd->dma_lch_out, 0, OMAP_DMA_AMODE_CONSTANT,
349 dd->phys_base + AES_REG_DATA, 0, 4);
350
351 omap_set_dma_src_burst_mode(dd->dma_lch_out, OMAP_DMA_DATA_BURST_4);
352 omap_set_dma_dest_burst_mode(dd->dma_lch_out, OMAP_DMA_DATA_BURST_4);
353
354 return 0; 342 return 0;
355 343
356err_dma_out: 344err_dma_out:
@@ -443,6 +431,12 @@ static int omap_aes_crypt_dma(struct crypto_tfm *tfm, dma_addr_t dma_addr_in,
443 len32 = DIV_ROUND_UP(length, sizeof(u32)); 431 len32 = DIV_ROUND_UP(length, sizeof(u32));
444 432
445 /* IN */ 433 /* IN */
434 omap_set_dma_dest_params(dd->dma_lch_in, 0, OMAP_DMA_AMODE_CONSTANT,
435 dd->phys_base + AES_REG_DATA, 0, 4);
436
437 omap_set_dma_dest_burst_mode(dd->dma_lch_in, OMAP_DMA_DATA_BURST_4);
438 omap_set_dma_src_burst_mode(dd->dma_lch_in, OMAP_DMA_DATA_BURST_4);
439
446 omap_set_dma_transfer_params(dd->dma_lch_in, OMAP_DMA_DATA_TYPE_S32, 440 omap_set_dma_transfer_params(dd->dma_lch_in, OMAP_DMA_DATA_TYPE_S32,
447 len32, 1, OMAP_DMA_SYNC_PACKET, dd->dma_in, 441 len32, 1, OMAP_DMA_SYNC_PACKET, dd->dma_in,
448 OMAP_DMA_DST_SYNC); 442 OMAP_DMA_DST_SYNC);
@@ -451,6 +445,12 @@ static int omap_aes_crypt_dma(struct crypto_tfm *tfm, dma_addr_t dma_addr_in,
451 dma_addr_in, 0, 0); 445 dma_addr_in, 0, 0);
452 446
453 /* OUT */ 447 /* OUT */
448 omap_set_dma_src_params(dd->dma_lch_out, 0, OMAP_DMA_AMODE_CONSTANT,
449 dd->phys_base + AES_REG_DATA, 0, 4);
450
451 omap_set_dma_src_burst_mode(dd->dma_lch_out, OMAP_DMA_DATA_BURST_4);
452 omap_set_dma_dest_burst_mode(dd->dma_lch_out, OMAP_DMA_DATA_BURST_4);
453
454 omap_set_dma_transfer_params(dd->dma_lch_out, OMAP_DMA_DATA_TYPE_S32, 454 omap_set_dma_transfer_params(dd->dma_lch_out, OMAP_DMA_DATA_TYPE_S32,
455 len32, 1, OMAP_DMA_SYNC_PACKET, 455 len32, 1, OMAP_DMA_SYNC_PACKET,
456 dd->dma_out, OMAP_DMA_SRC_SYNC); 456 dd->dma_out, OMAP_DMA_SRC_SYNC);