aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/crypto/ccp/ccp-dev.h
diff options
context:
space:
mode:
authorTom Lendacky <thomas.lendacky@amd.com>2015-02-03 14:07:05 -0500
committerHerbert Xu <herbert@gondor.apana.org.au>2015-02-27 04:48:47 -0500
commit8db8846754767bc955eaf7e28db8a94787d12ce6 (patch)
tree2ddbaa25a8e6213f05e7d8cd0bfbbc6ddf62307a /drivers/crypto/ccp/ccp-dev.h
parent2ecc1e95ec70923e642fa481ee7f7ad443798f2a (diff)
crypto: ccp - Updates for checkpatch warnings/errors
Changes to address warnings and errors reported by the checkpatch script. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/ccp/ccp-dev.h')
-rw-r--r--drivers/crypto/ccp/ccp-dev.h12
1 files changed, 4 insertions, 8 deletions
diff --git a/drivers/crypto/ccp/ccp-dev.h b/drivers/crypto/ccp/ccp-dev.h
index 62ff35a6b9ec..6ff89031fb96 100644
--- a/drivers/crypto/ccp/ccp-dev.h
+++ b/drivers/crypto/ccp/ccp-dev.h
@@ -21,7 +21,7 @@
21#include <linux/wait.h> 21#include <linux/wait.h>
22#include <linux/dmapool.h> 22#include <linux/dmapool.h>
23#include <linux/hw_random.h> 23#include <linux/hw_random.h>
24 24#include <linux/bitops.h>
25 25
26#define MAX_DMAPOOL_NAME_LEN 32 26#define MAX_DMAPOOL_NAME_LEN 32
27 27
@@ -33,7 +33,6 @@
33#define CACHE_NONE 0x00 33#define CACHE_NONE 0x00
34#define CACHE_WB_NO_ALLOC 0xb7 34#define CACHE_WB_NO_ALLOC 0xb7
35 35
36
37/****** Register Mappings ******/ 36/****** Register Mappings ******/
38#define Q_MASK_REG 0x000 37#define Q_MASK_REG 0x000
39#define TRNG_OUT_REG 0x00c 38#define TRNG_OUT_REG 0x00c
@@ -54,8 +53,8 @@
54#define CMD_Q_CACHE_BASE 0x228 53#define CMD_Q_CACHE_BASE 0x228
55#define CMD_Q_CACHE_INC 0x20 54#define CMD_Q_CACHE_INC 0x20
56 55
57#define CMD_Q_ERROR(__qs) ((__qs) & 0x0000003f); 56#define CMD_Q_ERROR(__qs) ((__qs) & 0x0000003f)
58#define CMD_Q_DEPTH(__qs) (((__qs) >> 12) & 0x0000000f); 57#define CMD_Q_DEPTH(__qs) (((__qs) >> 12) & 0x0000000f)
59 58
60/****** REQ0 Related Values ******/ 59/****** REQ0 Related Values ******/
61#define REQ0_WAIT_FOR_WRITE 0x00000004 60#define REQ0_WAIT_FOR_WRITE 0x00000004
@@ -103,7 +102,6 @@
103/****** REQ6 Related Values ******/ 102/****** REQ6 Related Values ******/
104#define REQ6_MEMTYPE_SHIFT 16 103#define REQ6_MEMTYPE_SHIFT 16
105 104
106
107/****** Key Storage Block ******/ 105/****** Key Storage Block ******/
108#define KSB_START 77 106#define KSB_START 77
109#define KSB_END 127 107#define KSB_END 127
@@ -114,7 +112,7 @@
114#define CCP_JOBID_MASK 0x0000003f 112#define CCP_JOBID_MASK 0x0000003f
115 113
116#define CCP_DMAPOOL_MAX_SIZE 64 114#define CCP_DMAPOOL_MAX_SIZE 64
117#define CCP_DMAPOOL_ALIGN (1 << 5) 115#define CCP_DMAPOOL_ALIGN BIT(5)
118 116
119#define CCP_REVERSE_BUF_SIZE 64 117#define CCP_REVERSE_BUF_SIZE 64
120 118
@@ -142,7 +140,6 @@
142#define CCP_ECC_RESULT_OFFSET 60 140#define CCP_ECC_RESULT_OFFSET 60
143#define CCP_ECC_RESULT_SUCCESS 0x0001 141#define CCP_ECC_RESULT_SUCCESS 0x0001
144 142
145
146struct ccp_device; 143struct ccp_device;
147struct ccp_cmd; 144struct ccp_cmd;
148 145
@@ -261,7 +258,6 @@ struct ccp_device {
261 unsigned int axcache; 258 unsigned int axcache;
262}; 259};
263 260
264
265int ccp_pci_init(void); 261int ccp_pci_init(void);
266void ccp_pci_exit(void); 262void ccp_pci_exit(void);
267 263