crypto: atmel-sha - add support for latest release of the IP (0x410)

Updates from IP release 0x320 to 0x400:
 - add DMA support (previous IP revision use PDC)
 - add DMA double input buffer support
 - add SHA224 support

Update from IP release 0x400 to 0x410:
 - add SHA384 and SHA512 support

Signed-off-by: Nicolas Royer <nicolas@eukrea.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Eric Bénard <eric@eukrea.com>
Tested-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

1 files changed, 6 insertions, 1 deletions

diff --git a/drivers/crypto/atmel-sha-regs.h b/drivers/crypto/atmel-sha-regs.h
index dc53a20d7da1..83b2d7425666 100644
--- a/drivers/crypto/atmel-sha-regs.h
+++ b/drivers/crypto/atmel-sha-regs.h
@@ -14,10 +14,13 @@
 #define SHA_MR_MODE_MANUAL              0x0
 #define SHA_MR_MODE_AUTO                0x1
 #define SHA_MR_MODE_PDC                 0x2
-#define SHA_MR_DUALBUFF                 (1 << 3)
 #define SHA_MR_PROCDLY                  (1 << 4)
 #define SHA_MR_ALGO_SHA1                (0 << 8)
 #define SHA_MR_ALGO_SHA256              (1 << 8)
+#define SHA_MR_ALGO_SHA384              (2 << 8)
+#define SHA_MR_ALGO_SHA512              (3 << 8)
+#define SHA_MR_ALGO_SHA224              (4 << 8)
+#define SHA_MR_DUALBUFF                 (1 << 16)
 
 #define SHA_IER                         0x10
 #define SHA_IDR                         0x14
@@ -33,6 +36,8 @@
 #define SHA_ISR_URAT_MR                 (0x2 << 12)
 #define SHA_ISR_URAT_WO                 (0x5 << 12)
 
+#define SHA_HW_VERSION          0xFC
+
 #define SHA_TPR                         0x108
 #define SHA_TCR                         0x10C
 #define SHA_TNPR                        0x118