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authorArnd Bergmann <arnd@arndb.de>2014-09-25 11:42:57 -0400
committerArnd Bergmann <arnd@arndb.de>2014-09-25 11:42:57 -0400
commite36087998a3b01f3c6c93fa9465e40103f427315 (patch)
tree029c1db87eb84dc72e796174455f0c453885fa74 /drivers/cpuidle
parent3b8f5030ddcf51112542e1e6ef27da237642069d (diff)
parent8097171e19bb69f3e2226827440b71ececa5d74f (diff)
Merge tag 'zynq-cleanup-for-3.18' of git://git.xilinx.com/linux-xlnx into next/soc
Pull "arm: Xilinx Zynq cleanup patches for v3.18" from Michal Simek: - PM support - Fix L2 useless setting Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'zynq-cleanup-for-3.18' of git://git.xilinx.com/linux-xlnx: ARM: zynq: Remove useless L2C AUX setting ARM: zynq: Rename 'zynq_platform_cpu_die' ARM: zynq: Remove hotplug.c ARM: zynq: Synchronise zynq_cpu_die/kill ARM: zynq: cpuidle: Remove pointless code ARM: zynq: Remove invalidate cache for cpu die ARM: zynq: PM: Enable DDR clock stop ARM: zynq: DT: Add DDRC node Documentation: devicetree: Add binding for Synopsys DDR controller ARM: zynq: PM: Enable A9 internal clock gating feature
Diffstat (limited to 'drivers/cpuidle')
-rw-r--r--drivers/cpuidle/cpuidle-zynq.c10
1 files changed, 1 insertions, 9 deletions
diff --git a/drivers/cpuidle/cpuidle-zynq.c b/drivers/cpuidle/cpuidle-zynq.c
index aded75928028..c61b8b2a7c77 100644
--- a/drivers/cpuidle/cpuidle-zynq.c
+++ b/drivers/cpuidle/cpuidle-zynq.c
@@ -26,7 +26,6 @@
26 */ 26 */
27 27
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/cpu_pm.h>
30#include <linux/cpuidle.h> 29#include <linux/cpuidle.h>
31#include <linux/platform_device.h> 30#include <linux/platform_device.h>
32#include <asm/proc-fns.h> 31#include <asm/proc-fns.h>
@@ -38,15 +37,9 @@
38static int zynq_enter_idle(struct cpuidle_device *dev, 37static int zynq_enter_idle(struct cpuidle_device *dev,
39 struct cpuidle_driver *drv, int index) 38 struct cpuidle_driver *drv, int index)
40{ 39{
41 /* Devices must be stopped here */
42 cpu_pm_enter();
43
44 /* Add code for DDR self refresh start */ 40 /* Add code for DDR self refresh start */
45 cpu_do_idle(); 41 cpu_do_idle();
46 42
47 /* Add code for DDR self refresh stop */
48 cpu_pm_exit();
49
50 return index; 43 return index;
51} 44}
52 45
@@ -59,8 +52,7 @@ static struct cpuidle_driver zynq_idle_driver = {
59 .enter = zynq_enter_idle, 52 .enter = zynq_enter_idle,
60 .exit_latency = 10, 53 .exit_latency = 10,
61 .target_residency = 10000, 54 .target_residency = 10000,
62 .flags = CPUIDLE_FLAG_TIME_VALID | 55 .flags = CPUIDLE_FLAG_TIME_VALID,
63 CPUIDLE_FLAG_TIMER_STOP,
64 .name = "RAM_SR", 56 .name = "RAM_SR",
65 .desc = "WFI and RAM Self Refresh", 57 .desc = "WFI and RAM Self Refresh",
66 }, 58 },