aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/cpufreq/speedstep-centrino.c
diff options
context:
space:
mode:
authorViresh Kumar <viresh.kumar@linaro.org>2013-03-30 06:55:15 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-06-04 08:25:59 -0400
commit5070158804b5339c71809f5e673cea1cfacd804d (patch)
tree42256e81e326af4e568a179787e66d434a0b1ffc /drivers/cpufreq/speedstep-centrino.c
parent2361be23666232dbb4851a527f466c4cbf5340fc (diff)
cpufreq: rename index as driver_data in cpufreq_frequency_table
The "index" field of struct cpufreq_frequency_table was never an index and isn't used at all by the cpufreq core. It only is useful for cpufreq drivers for their internal purposes. Many people nowadays blindly set it in ascending order with the assumption that the core will use it, which is a mistake. Rename it to "driver_data" as that's what its purpose is. All of its users are updated accordingly. [rjw: Changelog] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/cpufreq/speedstep-centrino.c')
-rw-r--r--drivers/cpufreq/speedstep-centrino.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/cpufreq/speedstep-centrino.c b/drivers/cpufreq/speedstep-centrino.c
index 618e6f417b1c..0915e712fbdc 100644
--- a/drivers/cpufreq/speedstep-centrino.c
+++ b/drivers/cpufreq/speedstep-centrino.c
@@ -79,11 +79,11 @@ static struct cpufreq_driver centrino_driver;
79 79
80/* Computes the correct form for IA32_PERF_CTL MSR for a particular 80/* Computes the correct form for IA32_PERF_CTL MSR for a particular
81 frequency/voltage operating point; frequency in MHz, volts in mV. 81 frequency/voltage operating point; frequency in MHz, volts in mV.
82 This is stored as "index" in the structure. */ 82 This is stored as "driver_data" in the structure. */
83#define OP(mhz, mv) \ 83#define OP(mhz, mv) \
84 { \ 84 { \
85 .frequency = (mhz) * 1000, \ 85 .frequency = (mhz) * 1000, \
86 .index = (((mhz)/100) << 8) | ((mv - 700) / 16) \ 86 .driver_data = (((mhz)/100) << 8) | ((mv - 700) / 16) \
87 } 87 }
88 88
89/* 89/*
@@ -307,7 +307,7 @@ static unsigned extract_clock(unsigned msr, unsigned int cpu, int failsafe)
307 per_cpu(centrino_model, cpu)->op_points[i].frequency 307 per_cpu(centrino_model, cpu)->op_points[i].frequency
308 != CPUFREQ_TABLE_END; 308 != CPUFREQ_TABLE_END;
309 i++) { 309 i++) {
310 if (msr == per_cpu(centrino_model, cpu)->op_points[i].index) 310 if (msr == per_cpu(centrino_model, cpu)->op_points[i].driver_data)
311 return per_cpu(centrino_model, cpu)-> 311 return per_cpu(centrino_model, cpu)->
312 op_points[i].frequency; 312 op_points[i].frequency;
313 } 313 }
@@ -501,7 +501,7 @@ static int centrino_target (struct cpufreq_policy *policy,
501 break; 501 break;
502 } 502 }
503 503
504 msr = per_cpu(centrino_model, cpu)->op_points[newstate].index; 504 msr = per_cpu(centrino_model, cpu)->op_points[newstate].driver_data;
505 505
506 if (first_cpu) { 506 if (first_cpu) {
507 rdmsr_on_cpu(good_cpu, MSR_IA32_PERF_CTL, &oldmsr, &h); 507 rdmsr_on_cpu(good_cpu, MSR_IA32_PERF_CTL, &oldmsr, &h);