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authorDinh Nguyen <dinguyen@altera.com>2014-03-13 17:08:01 -0400
committerMike Turquette <mturquette@linaro.org>2014-03-19 02:42:35 -0400
commit95bb9f515f5d8428a447b3afc131a99ddbdf4e8b (patch)
treef4a48d9596e29958e6de6e58023e09de44c192d2 /drivers/clk
parent06fa5ab32a1b246bf151edddf9aa5580d4021d92 (diff)
clk: socfpga: Fix section mismatch warning
WARNING: drivers/clk/socfpga/built-in.o(.data+0xc0): Section mismatch in reference from the variable socfpga_child_clocks to the function .init.text:socfpga_pll_init() The variable socfpga_child_clocks references the function __init socfpga_pll_init() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console WARNING: drivers/clk/socfpga/built-in.o(.data+0x184): Section mismatch in reference from the variable socfpga_child_clocks to the function .init.text:socfpga_periph_init() The variable socfpga_child_clocks references the function __init socfpga_periph_init() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console WARNING: drivers/clk/socfpga/built-in.o(.data+0x248): Section mismatch in reference from the variable socfpga_child_clocks to the function .init.text:socfpga_gate_init() The variable socfpga_child_clocks references the function __init socfpga_gate_init() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console Reported-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/socfpga/clk.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/socfpga/clk.c b/drivers/clk/socfpga/clk.c
index 6217d5dc6644..35a960a993f9 100644
--- a/drivers/clk/socfpga/clk.c
+++ b/drivers/clk/socfpga/clk.c
@@ -28,7 +28,7 @@
28 28
29void __iomem *clk_mgr_base_addr; 29void __iomem *clk_mgr_base_addr;
30 30
31static struct of_device_id socfpga_child_clocks[] = { 31static const struct of_device_id socfpga_child_clocks[] __initconst = {
32 { .compatible = "altr,socfpga-pll-clock", socfpga_pll_init, }, 32 { .compatible = "altr,socfpga-pll-clock", socfpga_pll_init, },
33 { .compatible = "altr,socfpga-perip-clk", socfpga_periph_init, }, 33 { .compatible = "altr,socfpga-perip-clk", socfpga_periph_init, },
34 { .compatible = "altr,socfpga-gate-clk", socfpga_gate_init, }, 34 { .compatible = "altr,socfpga-gate-clk", socfpga_gate_init, },