clk: rockchip: fix parent for spdif_8ch_frac on rk3288

The parent should be spdif_8ch_pre not spdif_8ch_src, which doesn't
exist and looks to be a typo.  The TRM also confirms this.

Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 23278291da44..e41ae1f4cd29 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -325,7 +325,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
         COMPOSITE_NOMUX(0, "spdif_8ch_pre", "spdif_src", 0,
                         RK3288_CLKSEL_CON(40), 0, 7, DFLAGS,
                         RK3288_CLKGATE_CON(4), 7, GFLAGS),
-        COMPOSITE_FRAC(0, "spdif_8ch_frac", "spdif_8ch_src", 0,
+        COMPOSITE_FRAC(0, "spdif_8ch_frac", "spdif_8ch_pre", 0,
                         RK3288_CLKSEL_CON(41), 0,
                         RK3288_CLKGATE_CON(4), 8, GFLAGS),
         COMPOSITE_NODIV(SCLK_SPDIF8CH, "sclk_spdif_8ch", mux_spdif_8ch_p, 0,