diff options
author | Marek Szyprowski <m.szyprowski@samsung.com> | 2014-07-01 04:10:05 -0400 |
---|---|---|
committer | Tomasz Figa <tomasz.figa@gmail.com> | 2014-09-22 08:31:14 -0400 |
commit | 4676f0aab9dc4f9aa729d5a5b75d20f824d77742 (patch) | |
tree | 7135e85844ca283531492e07103211580fda8526 /drivers/clk | |
parent | c14254300131f5dcb3fe18a1ff6eee163c2bc9b4 (diff) |
clk: samsung: exynos4: add support for MOUT_HDMI and MOUT_MIXER clocks
This patch adds support for exporting mout_hdmi and mout_mixer to device
tree. Access to those clocks is required to correctly setup HDMI module
on Exynos 4210 and 4x12 SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
CC: Mike Turquette <mturquette@linaro.org>
CC: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/samsung/clk-exynos4.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 12a7cc3b5953..1b0dd73636c0 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c | |||
@@ -535,7 +535,7 @@ static struct samsung_fixed_factor_clock exynos4x12_fixed_factor_clks[] __initda | |||
535 | static struct samsung_mux_clock exynos4_mux_clks[] __initdata = { | 535 | static struct samsung_mux_clock exynos4_mux_clks[] __initdata = { |
536 | MUX_FA(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, | 536 | MUX_FA(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, |
537 | CLK_SET_RATE_PARENT, 0, "mout_apll"), | 537 | CLK_SET_RATE_PARENT, 0, "mout_apll"), |
538 | MUX(0, "mout_hdmi", mout_hdmi_p, SRC_TV, 0, 1), | 538 | MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_TV, 0, 1), |
539 | MUX(0, "mout_mfc1", sclk_evpll_p, SRC_MFC, 4, 1), | 539 | MUX(0, "mout_mfc1", sclk_evpll_p, SRC_MFC, 4, 1), |
540 | MUX(0, "mout_mfc", mout_mfc_p, SRC_MFC, 8, 1), | 540 | MUX(0, "mout_mfc", mout_mfc_p, SRC_MFC, 8, 1), |
541 | MUX_F(CLK_MOUT_G3D1, "mout_g3d1", sclk_evpll_p, SRC_G3D, 4, 1, | 541 | MUX_F(CLK_MOUT_G3D1, "mout_g3d1", sclk_evpll_p, SRC_G3D, 4, 1, |
@@ -569,7 +569,7 @@ static struct samsung_mux_clock exynos4210_mux_clks[] __initdata = { | |||
569 | MUX(0, "mout_aclk100", sclk_ampll_p4210, SRC_TOP0, 16, 1), | 569 | MUX(0, "mout_aclk100", sclk_ampll_p4210, SRC_TOP0, 16, 1), |
570 | MUX(0, "mout_aclk160", sclk_ampll_p4210, SRC_TOP0, 20, 1), | 570 | MUX(0, "mout_aclk160", sclk_ampll_p4210, SRC_TOP0, 20, 1), |
571 | MUX(0, "mout_aclk133", sclk_ampll_p4210, SRC_TOP0, 24, 1), | 571 | MUX(0, "mout_aclk133", sclk_ampll_p4210, SRC_TOP0, 24, 1), |
572 | MUX(0, "mout_mixer", mout_mixer_p4210, SRC_TV, 4, 1), | 572 | MUX(CLK_MOUT_MIXER, "mout_mixer", mout_mixer_p4210, SRC_TV, 4, 1), |
573 | MUX(0, "mout_dac", mout_dac_p4210, SRC_TV, 8, 1), | 573 | MUX(0, "mout_dac", mout_dac_p4210, SRC_TV, 8, 1), |
574 | MUX(0, "mout_g2d0", sclk_ampll_p4210, E4210_SRC_IMAGE, 0, 1), | 574 | MUX(0, "mout_g2d0", sclk_ampll_p4210, E4210_SRC_IMAGE, 0, 1), |
575 | MUX(0, "mout_g2d1", sclk_evpll_p, E4210_SRC_IMAGE, 4, 1), | 575 | MUX(0, "mout_g2d1", sclk_evpll_p, E4210_SRC_IMAGE, 4, 1), |