diff options
author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2015-03-27 12:27:10 -0400 |
---|---|---|
committer | Michael Turquette <mturquette@linaro.org> | 2015-04-12 23:58:54 -0400 |
commit | 3a9e9cb65be84d6c64fbe9c69a73c15d59f29454 (patch) | |
tree | baebf33f5a21848fb0bf9ad5727f73826e4ca288 /drivers/clk | |
parent | 692d8328e8c039f9497eb862c6cf835de922c061 (diff) |
clk: samsung: exynos4: Disable ARMCLK down feature on Exynos4210 SoC
Commit 42773b28e71d ("clk: samsung: exynos4: Enable ARMCLK
down feature") enabled ARMCLK down feature on all Exynos4
SoCs. Unfortunately on Exynos4210 SoC ARMCLK down feature
causes a lockup when ondemand cpufreq governor is used.
Fix it by limiting ARMCLK down feature to Exynos4x12 SoCs.
This patch was tested on:
- Exynos4210 SoC based Trats board
- Exynos4210 SoC based Origen board
- Exynos4412 SoC based Trats2 board
- Exynos4412 SoC based Odroid-U3 board
Cc: Daniel Drake <drake@endlessm.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Kukjin Kim <kgene@kernel.org>
Fixes: 42773b28e71d ("clk: samsung: exynos4: Enable ARMCLK down feature")
Cc: <stable@vger.kernel.org> # v3.17+
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/samsung/clk-exynos4.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 51462e85675f..714d6ba782c8 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c | |||
@@ -1354,7 +1354,7 @@ static struct samsung_pll_clock exynos4x12_plls[nr_plls] __initdata = { | |||
1354 | VPLL_LOCK, VPLL_CON0, NULL), | 1354 | VPLL_LOCK, VPLL_CON0, NULL), |
1355 | }; | 1355 | }; |
1356 | 1356 | ||
1357 | static void __init exynos4_core_down_clock(enum exynos4_soc soc) | 1357 | static void __init exynos4x12_core_down_clock(void) |
1358 | { | 1358 | { |
1359 | unsigned int tmp; | 1359 | unsigned int tmp; |
1360 | 1360 | ||
@@ -1373,11 +1373,9 @@ static void __init exynos4_core_down_clock(enum exynos4_soc soc) | |||
1373 | __raw_writel(tmp, reg_base + PWR_CTRL1); | 1373 | __raw_writel(tmp, reg_base + PWR_CTRL1); |
1374 | 1374 | ||
1375 | /* | 1375 | /* |
1376 | * Disable the clock up feature on Exynos4x12, in case it was | 1376 | * Disable the clock up feature in case it was enabled by bootloader. |
1377 | * enabled by bootloader. | ||
1378 | */ | 1377 | */ |
1379 | if (exynos4_soc == EXYNOS4X12) | 1378 | __raw_writel(0x0, reg_base + E4X12_PWR_CTRL2); |
1380 | __raw_writel(0x0, reg_base + E4X12_PWR_CTRL2); | ||
1381 | } | 1379 | } |
1382 | 1380 | ||
1383 | /* register exynos4 clocks */ | 1381 | /* register exynos4 clocks */ |
@@ -1474,7 +1472,8 @@ static void __init exynos4_clk_init(struct device_node *np, | |||
1474 | samsung_clk_register_alias(ctx, exynos4_aliases, | 1472 | samsung_clk_register_alias(ctx, exynos4_aliases, |
1475 | ARRAY_SIZE(exynos4_aliases)); | 1473 | ARRAY_SIZE(exynos4_aliases)); |
1476 | 1474 | ||
1477 | exynos4_core_down_clock(soc); | 1475 | if (soc == EXYNOS4X12) |
1476 | exynos4x12_core_down_clock(); | ||
1478 | exynos4_clk_sleep_init(); | 1477 | exynos4_clk_sleep_init(); |
1479 | 1478 | ||
1480 | samsung_clk_of_add_provider(np, ctx); | 1479 | samsung_clk_of_add_provider(np, ctx); |