diff options
author | Georgi Djakov <georgi.djakov@linaro.org> | 2015-04-07 10:14:51 -0400 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-04-08 14:07:38 -0400 |
commit | 2f272e7b015c6d0f308d1a03e71557c962b10ce9 (patch) | |
tree | c645bf0a63cd61177557da56697224cc3b79ddb9 /drivers/clk | |
parent | 3937567ded412bd03b327b596a21eb4bb6377702 (diff) |
clk: qcom: Fix parent_map translations
When we introduced the parent_map tables, we missed to update
some of the functions where mapping is translated. Fix this.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Tested-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/qcom/clk-rcg.c | 26 | ||||
-rw-r--r-- | drivers/clk/qcom/clk-rcg2.c | 20 |
2 files changed, 35 insertions, 11 deletions
diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c index 8f2f48071a7a..7b3d62674203 100644 --- a/drivers/clk/qcom/clk-rcg.c +++ b/drivers/clk/qcom/clk-rcg.c | |||
@@ -319,7 +319,7 @@ static int clk_dyn_rcg_set_parent(struct clk_hw *hw, u8 index) | |||
319 | if (banked_p) | 319 | if (banked_p) |
320 | f.pre_div = ns_to_pre_div(&rcg->p[bank], ns) + 1; | 320 | f.pre_div = ns_to_pre_div(&rcg->p[bank], ns) + 1; |
321 | 321 | ||
322 | f.src = index; | 322 | f.src = qcom_find_src_index(hw, rcg->s[bank].parent_map, index); |
323 | return configure_bank(rcg, &f); | 323 | return configure_bank(rcg, &f); |
324 | } | 324 | } |
325 | 325 | ||
@@ -407,17 +407,23 @@ clk_dyn_rcg_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) | |||
407 | static long _freq_tbl_determine_rate(struct clk_hw *hw, | 407 | static long _freq_tbl_determine_rate(struct clk_hw *hw, |
408 | const struct freq_tbl *f, unsigned long rate, | 408 | const struct freq_tbl *f, unsigned long rate, |
409 | unsigned long min_rate, unsigned long max_rate, | 409 | unsigned long min_rate, unsigned long max_rate, |
410 | unsigned long *p_rate, struct clk_hw **p_hw) | 410 | unsigned long *p_rate, struct clk_hw **p_hw, |
411 | const struct parent_map *parent_map) | ||
411 | { | 412 | { |
412 | unsigned long clk_flags; | 413 | unsigned long clk_flags; |
413 | struct clk *p; | 414 | struct clk *p; |
415 | int index; | ||
414 | 416 | ||
415 | f = qcom_find_freq(f, rate); | 417 | f = qcom_find_freq(f, rate); |
416 | if (!f) | 418 | if (!f) |
417 | return -EINVAL; | 419 | return -EINVAL; |
418 | 420 | ||
421 | index = qcom_find_src_index(hw, parent_map, f->src); | ||
422 | if (index < 0) | ||
423 | return index; | ||
424 | |||
419 | clk_flags = __clk_get_flags(hw->clk); | 425 | clk_flags = __clk_get_flags(hw->clk); |
420 | p = clk_get_parent_by_index(hw->clk, f->src); | 426 | p = clk_get_parent_by_index(hw->clk, index); |
421 | if (clk_flags & CLK_SET_RATE_PARENT) { | 427 | if (clk_flags & CLK_SET_RATE_PARENT) { |
422 | rate = rate * f->pre_div; | 428 | rate = rate * f->pre_div; |
423 | if (f->n) { | 429 | if (f->n) { |
@@ -442,7 +448,7 @@ static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate, | |||
442 | struct clk_rcg *rcg = to_clk_rcg(hw); | 448 | struct clk_rcg *rcg = to_clk_rcg(hw); |
443 | 449 | ||
444 | return _freq_tbl_determine_rate(hw, rcg->freq_tbl, rate, min_rate, | 450 | return _freq_tbl_determine_rate(hw, rcg->freq_tbl, rate, min_rate, |
445 | max_rate, p_rate, p); | 451 | max_rate, p_rate, p, rcg->s.parent_map); |
446 | } | 452 | } |
447 | 453 | ||
448 | static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate, | 454 | static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate, |
@@ -450,9 +456,16 @@ static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate, | |||
450 | unsigned long *p_rate, struct clk_hw **p) | 456 | unsigned long *p_rate, struct clk_hw **p) |
451 | { | 457 | { |
452 | struct clk_dyn_rcg *rcg = to_clk_dyn_rcg(hw); | 458 | struct clk_dyn_rcg *rcg = to_clk_dyn_rcg(hw); |
459 | u32 reg; | ||
460 | int bank; | ||
461 | struct src_sel *s; | ||
462 | |||
463 | regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); | ||
464 | bank = reg_to_bank(rcg, reg); | ||
465 | s = &rcg->s[bank]; | ||
453 | 466 | ||
454 | return _freq_tbl_determine_rate(hw, rcg->freq_tbl, rate, min_rate, | 467 | return _freq_tbl_determine_rate(hw, rcg->freq_tbl, rate, min_rate, |
455 | max_rate, p_rate, p); | 468 | max_rate, p_rate, p, s->parent_map); |
456 | } | 469 | } |
457 | 470 | ||
458 | static long clk_rcg_bypass_determine_rate(struct clk_hw *hw, unsigned long rate, | 471 | static long clk_rcg_bypass_determine_rate(struct clk_hw *hw, unsigned long rate, |
@@ -462,8 +475,9 @@ static long clk_rcg_bypass_determine_rate(struct clk_hw *hw, unsigned long rate, | |||
462 | struct clk_rcg *rcg = to_clk_rcg(hw); | 475 | struct clk_rcg *rcg = to_clk_rcg(hw); |
463 | const struct freq_tbl *f = rcg->freq_tbl; | 476 | const struct freq_tbl *f = rcg->freq_tbl; |
464 | struct clk *p; | 477 | struct clk *p; |
478 | int index = qcom_find_src_index(hw, rcg->s.parent_map, f->src); | ||
465 | 479 | ||
466 | p = clk_get_parent_by_index(hw->clk, f->src); | 480 | p = clk_get_parent_by_index(hw->clk, index); |
467 | *p_hw = __clk_get_hw(p); | 481 | *p_hw = __clk_get_hw(p); |
468 | *p_rate = __clk_round_rate(p, rate); | 482 | *p_rate = __clk_round_rate(p, rate); |
469 | 483 | ||
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index 416becce4170..b95d17fbb8d7 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c | |||
@@ -182,13 +182,19 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw, | |||
182 | { | 182 | { |
183 | unsigned long clk_flags; | 183 | unsigned long clk_flags; |
184 | struct clk *p; | 184 | struct clk *p; |
185 | struct clk_rcg2 *rcg = to_clk_rcg2(hw); | ||
186 | int index; | ||
185 | 187 | ||
186 | f = qcom_find_freq(f, rate); | 188 | f = qcom_find_freq(f, rate); |
187 | if (!f) | 189 | if (!f) |
188 | return -EINVAL; | 190 | return -EINVAL; |
189 | 191 | ||
192 | index = qcom_find_src_index(hw, rcg->parent_map, f->src); | ||
193 | if (index < 0) | ||
194 | return index; | ||
195 | |||
190 | clk_flags = __clk_get_flags(hw->clk); | 196 | clk_flags = __clk_get_flags(hw->clk); |
191 | p = clk_get_parent_by_index(hw->clk, f->src); | 197 | p = clk_get_parent_by_index(hw->clk, index); |
192 | if (clk_flags & CLK_SET_RATE_PARENT) { | 198 | if (clk_flags & CLK_SET_RATE_PARENT) { |
193 | if (f->pre_div) { | 199 | if (f->pre_div) { |
194 | rate /= 2; | 200 | rate /= 2; |
@@ -381,9 +387,10 @@ static long clk_edp_pixel_determine_rate(struct clk_hw *hw, unsigned long rate, | |||
381 | s64 request; | 387 | s64 request; |
382 | u32 mask = BIT(rcg->hid_width) - 1; | 388 | u32 mask = BIT(rcg->hid_width) - 1; |
383 | u32 hid_div; | 389 | u32 hid_div; |
390 | int index = qcom_find_src_index(hw, rcg->parent_map, f->src); | ||
384 | 391 | ||
385 | /* Force the correct parent */ | 392 | /* Force the correct parent */ |
386 | *p = __clk_get_hw(clk_get_parent_by_index(hw->clk, f->src)); | 393 | *p = __clk_get_hw(clk_get_parent_by_index(hw->clk, index)); |
387 | 394 | ||
388 | if (src_rate == 810000000) | 395 | if (src_rate == 810000000) |
389 | frac = frac_table_810m; | 396 | frac = frac_table_810m; |
@@ -427,6 +434,7 @@ static long clk_byte_determine_rate(struct clk_hw *hw, unsigned long rate, | |||
427 | { | 434 | { |
428 | struct clk_rcg2 *rcg = to_clk_rcg2(hw); | 435 | struct clk_rcg2 *rcg = to_clk_rcg2(hw); |
429 | const struct freq_tbl *f = rcg->freq_tbl; | 436 | const struct freq_tbl *f = rcg->freq_tbl; |
437 | int index = qcom_find_src_index(hw, rcg->parent_map, f->src); | ||
430 | unsigned long parent_rate, div; | 438 | unsigned long parent_rate, div; |
431 | u32 mask = BIT(rcg->hid_width) - 1; | 439 | u32 mask = BIT(rcg->hid_width) - 1; |
432 | struct clk *p; | 440 | struct clk *p; |
@@ -434,7 +442,7 @@ static long clk_byte_determine_rate(struct clk_hw *hw, unsigned long rate, | |||
434 | if (rate == 0) | 442 | if (rate == 0) |
435 | return -EINVAL; | 443 | return -EINVAL; |
436 | 444 | ||
437 | p = clk_get_parent_by_index(hw->clk, f->src); | 445 | p = clk_get_parent_by_index(hw->clk, index); |
438 | *p_hw = __clk_get_hw(p); | 446 | *p_hw = __clk_get_hw(p); |
439 | *p_rate = parent_rate = __clk_round_rate(p, rate); | 447 | *p_rate = parent_rate = __clk_round_rate(p, rate); |
440 | 448 | ||
@@ -496,7 +504,8 @@ static long clk_pixel_determine_rate(struct clk_hw *hw, unsigned long rate, | |||
496 | int delta = 100000; | 504 | int delta = 100000; |
497 | const struct freq_tbl *f = rcg->freq_tbl; | 505 | const struct freq_tbl *f = rcg->freq_tbl; |
498 | const struct frac_entry *frac = frac_table_pixel; | 506 | const struct frac_entry *frac = frac_table_pixel; |
499 | struct clk *parent = clk_get_parent_by_index(hw->clk, f->src); | 507 | int index = qcom_find_src_index(hw, rcg->parent_map, f->src); |
508 | struct clk *parent = clk_get_parent_by_index(hw->clk, index); | ||
500 | 509 | ||
501 | *p = __clk_get_hw(parent); | 510 | *p = __clk_get_hw(parent); |
502 | 511 | ||
@@ -525,7 +534,8 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate, | |||
525 | int delta = 100000; | 534 | int delta = 100000; |
526 | u32 mask = BIT(rcg->hid_width) - 1; | 535 | u32 mask = BIT(rcg->hid_width) - 1; |
527 | u32 hid_div; | 536 | u32 hid_div; |
528 | struct clk *parent = clk_get_parent_by_index(hw->clk, f.src); | 537 | int index = qcom_find_src_index(hw, rcg->parent_map, f.src); |
538 | struct clk *parent = clk_get_parent_by_index(hw->clk, index); | ||
529 | 539 | ||
530 | for (; frac->num; frac++) { | 540 | for (; frac->num; frac++) { |
531 | request = (rate * frac->den) / frac->num; | 541 | request = (rate * frac->den) / frac->num; |