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authorStephen Boyd <sboyd@codeaurora.org>2015-01-29 18:38:11 -0500
committerMichael Turquette <mturquette@linaro.org>2015-02-25 15:08:38 -0500
commit7dd47b8ef54c301ecde58cecf2f3e29ff3f48d4a (patch)
tree7853b29ec1f180878d1f788edc65846b9d03839f /drivers/clk
parent03208cc69fc16a8d46de49f51f49964666e4a694 (diff)
clk: qcom: Fix slimbus n and m val offsets
These shifts were copy/pasted from the pcm which is a different size RCG. Use the correct offsets so that slimbus rates are correct. Fixes: b82875ee07e5 "clk: qcom: Add MSM8960/APQ8064 LPASS clock controller (LCC) driver" Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/qcom/lcc-msm8960.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/qcom/lcc-msm8960.c b/drivers/clk/qcom/lcc-msm8960.c
index a75a408cfccd..705e4d5bb6c7 100644
--- a/drivers/clk/qcom/lcc-msm8960.c
+++ b/drivers/clk/qcom/lcc-msm8960.c
@@ -417,8 +417,8 @@ static struct clk_rcg slimbus_src = {
417 .mnctr_en_bit = 8, 417 .mnctr_en_bit = 8,
418 .mnctr_reset_bit = 7, 418 .mnctr_reset_bit = 7,
419 .mnctr_mode_shift = 5, 419 .mnctr_mode_shift = 5,
420 .n_val_shift = 16, 420 .n_val_shift = 24,
421 .m_val_shift = 16, 421 .m_val_shift = 8,
422 .width = 8, 422 .width = 8,
423 }, 423 },
424 .p = { 424 .p = {