Merge tag 'tegra-for-3.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren:
ARM: tegra: core SoC support enhancements

This branch contains fixes and enhancement for core Tegra Soc support:
* CPU hotplug support for Tegra114.
* Some preliminary work on Tegra114 CPU sleep modes.
* Minor fix for EMC table DT parsing.

* tag 'tegra-for-3.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra: don't pass CPU ID to tegra_{set,clear}_cpu_in_lp2
  ARM: tegra: cpuidle: using IS_ENABLED for multi SoCs management in init func
  ARM: tegra: hook tegra_tear_down_cpu function in the PM suspend init function
  ARM: tegra: cpuidle: move the init function behind the suspend init function
  ARM: tegra: remove ifdef in the tegra_resume
  ARM: tegra: add cpu_disable for hotplug
  ARM: tegra114: add CPU hotplug support
  clk: tegra114: implement wait_for_reset and disable_clock for tegra_cpu_car_ops
  ARM: tegra114: add power up sequence for warm boot CPU
  ARM: tegra: make tegra_resume can work for Tegra114
  ARM: tegra: skip SCU and PL310 code when CPU is not Cortex-A9
  ARM: tegra: add an assembly marco to check Tegra SoC ID
  ARM: tegra: emc: correction of ram-code parsing from dt

Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 22 insertions, 1 deletions

diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index d78e16ee161c..40d939d091bf 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -250,6 +250,9 @@
 #define CLK_SOURCE_XUSB_DEV_SRC 0x60c
 #define CLK_SOURCE_EMC 0x19c
 
+/* Tegra CPU clock and reset control regs */
+#define CLK_RST_CONTROLLER_CPU_CMPLX_STATUS     0x470
+
 static int periph_clk_enb_refcnt[CLK_OUT_ENB_NUM * 32];
 
 static void __iomem *clk_base;
@@ -2000,7 +2003,25 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base)
         }
 }
 
-static struct tegra_cpu_car_ops tegra114_cpu_car_ops;
+/* Tegra114 CPU clock and reset control functions */
+static void tegra114_wait_cpu_in_reset(u32 cpu)
+{
+        unsigned int reg;
+
+        do {
+                reg = readl(clk_base + CLK_RST_CONTROLLER_CPU_CMPLX_STATUS);
+                cpu_relax();
+        } while (!(reg & (1 << cpu)));  /* check CPU been reset or not */
+}
+static void tegra114_disable_cpu_clock(u32 cpu)
+{
+        /* flow controller would take care in the power sequence. */
+}
+
+static struct tegra_cpu_car_ops tegra114_cpu_car_ops = {
+        .wait_for_reset = tegra114_wait_cpu_in_reset,
+        .disable_clock  = tegra114_disable_cpu_clock,
+};
 
 static const struct of_device_id pmc_match[] __initconst = {
         { .compatible = "nvidia,tegra114-pmc" },