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authorTakashi Iwai <tiwai@suse.de>2014-05-27 11:38:08 -0400
committerTakashi Iwai <tiwai@suse.de>2014-05-27 11:38:08 -0400
commita58bdba749b36069ec372da9c9fd16017b6c0b47 (patch)
tree95c79448427425d1c05712a7c7fb98ed42e41539 /drivers/clk
parent00a6d7b6762c27d441e9ac8faff36384bc0fc180 (diff)
parent51fa31d462f32e1ffdf957802dcab1dc20d2f243 (diff)
Merge branch 'topic/firewire' into for-next
This is a merge of big firewire audio stack updates by Takashi Sakamoto.
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/bcm/clk-kona-setup.c33
-rw-r--r--drivers/clk/bcm/clk-kona.c64
-rw-r--r--drivers/clk/bcm/clk-kona.h28
-rw-r--r--drivers/clk/clk-divider.c37
-rw-r--r--drivers/clk/clk.c74
-rw-r--r--drivers/clk/shmobile/clk-mstp.c9
-rw-r--r--drivers/clk/socfpga/clk-pll.c7
-rw-r--r--drivers/clk/socfpga/clk.c23
-rw-r--r--drivers/clk/tegra/clk-pll.c2
9 files changed, 150 insertions, 127 deletions
diff --git a/drivers/clk/bcm/clk-kona-setup.c b/drivers/clk/bcm/clk-kona-setup.c
index c7607feb18dd..54a06526f64f 100644
--- a/drivers/clk/bcm/clk-kona-setup.c
+++ b/drivers/clk/bcm/clk-kona-setup.c
@@ -27,7 +27,7 @@ LIST_HEAD(ccu_list); /* The list of set up CCUs */
27 27
28static bool clk_requires_trigger(struct kona_clk *bcm_clk) 28static bool clk_requires_trigger(struct kona_clk *bcm_clk)
29{ 29{
30 struct peri_clk_data *peri = bcm_clk->peri; 30 struct peri_clk_data *peri = bcm_clk->u.peri;
31 struct bcm_clk_sel *sel; 31 struct bcm_clk_sel *sel;
32 struct bcm_clk_div *div; 32 struct bcm_clk_div *div;
33 33
@@ -63,7 +63,7 @@ static bool peri_clk_data_offsets_valid(struct kona_clk *bcm_clk)
63 u32 limit; 63 u32 limit;
64 64
65 BUG_ON(bcm_clk->type != bcm_clk_peri); 65 BUG_ON(bcm_clk->type != bcm_clk_peri);
66 peri = bcm_clk->peri; 66 peri = bcm_clk->u.peri;
67 name = bcm_clk->name; 67 name = bcm_clk->name;
68 range = bcm_clk->ccu->range; 68 range = bcm_clk->ccu->range;
69 69
@@ -81,19 +81,19 @@ static bool peri_clk_data_offsets_valid(struct kona_clk *bcm_clk)
81 81
82 div = &peri->div; 82 div = &peri->div;
83 if (divider_exists(div)) { 83 if (divider_exists(div)) {
84 if (div->offset > limit) { 84 if (div->u.s.offset > limit) {
85 pr_err("%s: bad divider offset for %s (%u > %u)\n", 85 pr_err("%s: bad divider offset for %s (%u > %u)\n",
86 __func__, name, div->offset, limit); 86 __func__, name, div->u.s.offset, limit);
87 return false; 87 return false;
88 } 88 }
89 } 89 }
90 90
91 div = &peri->pre_div; 91 div = &peri->pre_div;
92 if (divider_exists(div)) { 92 if (divider_exists(div)) {
93 if (div->offset > limit) { 93 if (div->u.s.offset > limit) {
94 pr_err("%s: bad pre-divider offset for %s " 94 pr_err("%s: bad pre-divider offset for %s "
95 "(%u > %u)\n", 95 "(%u > %u)\n",
96 __func__, name, div->offset, limit); 96 __func__, name, div->u.s.offset, limit);
97 return false; 97 return false;
98 } 98 }
99 } 99 }
@@ -249,21 +249,22 @@ static bool div_valid(struct bcm_clk_div *div, const char *field_name,
249{ 249{
250 if (divider_is_fixed(div)) { 250 if (divider_is_fixed(div)) {
251 /* Any fixed divider value but 0 is OK */ 251 /* Any fixed divider value but 0 is OK */
252 if (div->fixed == 0) { 252 if (div->u.fixed == 0) {
253 pr_err("%s: bad %s fixed value 0 for %s\n", __func__, 253 pr_err("%s: bad %s fixed value 0 for %s\n", __func__,
254 field_name, clock_name); 254 field_name, clock_name);
255 return false; 255 return false;
256 } 256 }
257 return true; 257 return true;
258 } 258 }
259 if (!bitfield_valid(div->shift, div->width, field_name, clock_name)) 259 if (!bitfield_valid(div->u.s.shift, div->u.s.width,
260 field_name, clock_name))
260 return false; 261 return false;
261 262
262 if (divider_has_fraction(div)) 263 if (divider_has_fraction(div))
263 if (div->frac_width > div->width) { 264 if (div->u.s.frac_width > div->u.s.width) {
264 pr_warn("%s: bad %s fraction width for %s (%u > %u)\n", 265 pr_warn("%s: bad %s fraction width for %s (%u > %u)\n",
265 __func__, field_name, clock_name, 266 __func__, field_name, clock_name,
266 div->frac_width, div->width); 267 div->u.s.frac_width, div->u.s.width);
267 return false; 268 return false;
268 } 269 }
269 270
@@ -278,7 +279,7 @@ static bool div_valid(struct bcm_clk_div *div, const char *field_name,
278 */ 279 */
279static bool kona_dividers_valid(struct kona_clk *bcm_clk) 280static bool kona_dividers_valid(struct kona_clk *bcm_clk)
280{ 281{
281 struct peri_clk_data *peri = bcm_clk->peri; 282 struct peri_clk_data *peri = bcm_clk->u.peri;
282 struct bcm_clk_div *div; 283 struct bcm_clk_div *div;
283 struct bcm_clk_div *pre_div; 284 struct bcm_clk_div *pre_div;
284 u32 limit; 285 u32 limit;
@@ -295,7 +296,7 @@ static bool kona_dividers_valid(struct kona_clk *bcm_clk)
295 296
296 limit = BITS_PER_BYTE * sizeof(u32); 297 limit = BITS_PER_BYTE * sizeof(u32);
297 298
298 return div->frac_width + pre_div->frac_width <= limit; 299 return div->u.s.frac_width + pre_div->u.s.frac_width <= limit;
299} 300}
300 301
301 302
@@ -328,7 +329,7 @@ peri_clk_data_valid(struct kona_clk *bcm_clk)
328 if (!peri_clk_data_offsets_valid(bcm_clk)) 329 if (!peri_clk_data_offsets_valid(bcm_clk))
329 return false; 330 return false;
330 331
331 peri = bcm_clk->peri; 332 peri = bcm_clk->u.peri;
332 name = bcm_clk->name; 333 name = bcm_clk->name;
333 gate = &peri->gate; 334 gate = &peri->gate;
334 if (gate_exists(gate) && !gate_valid(gate, "gate", name)) 335 if (gate_exists(gate) && !gate_valid(gate, "gate", name))
@@ -588,12 +589,12 @@ static void bcm_clk_teardown(struct kona_clk *bcm_clk)
588{ 589{
589 switch (bcm_clk->type) { 590 switch (bcm_clk->type) {
590 case bcm_clk_peri: 591 case bcm_clk_peri:
591 peri_clk_teardown(bcm_clk->data, &bcm_clk->init_data); 592 peri_clk_teardown(bcm_clk->u.data, &bcm_clk->init_data);
592 break; 593 break;
593 default: 594 default:
594 break; 595 break;
595 } 596 }
596 bcm_clk->data = NULL; 597 bcm_clk->u.data = NULL;
597 bcm_clk->type = bcm_clk_none; 598 bcm_clk->type = bcm_clk_none;
598} 599}
599 600
@@ -644,7 +645,7 @@ struct clk *kona_clk_setup(struct ccu_data *ccu, const char *name,
644 break; 645 break;
645 } 646 }
646 bcm_clk->type = type; 647 bcm_clk->type = type;
647 bcm_clk->data = data; 648 bcm_clk->u.data = data;
648 649
649 /* Make sure everything makes sense before we set it up */ 650 /* Make sure everything makes sense before we set it up */
650 if (!kona_clk_valid(bcm_clk)) { 651 if (!kona_clk_valid(bcm_clk)) {
diff --git a/drivers/clk/bcm/clk-kona.c b/drivers/clk/bcm/clk-kona.c
index e3d339e08309..db11a87449f2 100644
--- a/drivers/clk/bcm/clk-kona.c
+++ b/drivers/clk/bcm/clk-kona.c
@@ -61,7 +61,7 @@ u64 do_div_round_closest(u64 dividend, unsigned long divisor)
61/* Convert a divider into the scaled divisor value it represents. */ 61/* Convert a divider into the scaled divisor value it represents. */
62static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div) 62static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div)
63{ 63{
64 return (u64)reg_div + ((u64)1 << div->frac_width); 64 return (u64)reg_div + ((u64)1 << div->u.s.frac_width);
65} 65}
66 66
67/* 67/*
@@ -77,7 +77,7 @@ u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, u32 billionths)
77 BUG_ON(billionths >= BILLION); 77 BUG_ON(billionths >= BILLION);
78 78
79 combined = (u64)div_value * BILLION + billionths; 79 combined = (u64)div_value * BILLION + billionths;
80 combined <<= div->frac_width; 80 combined <<= div->u.s.frac_width;
81 81
82 return do_div_round_closest(combined, BILLION); 82 return do_div_round_closest(combined, BILLION);
83} 83}
@@ -87,7 +87,7 @@ static inline u64
87scaled_div_min(struct bcm_clk_div *div) 87scaled_div_min(struct bcm_clk_div *div)
88{ 88{
89 if (divider_is_fixed(div)) 89 if (divider_is_fixed(div))
90 return (u64)div->fixed; 90 return (u64)div->u.fixed;
91 91
92 return scaled_div_value(div, 0); 92 return scaled_div_value(div, 0);
93} 93}
@@ -98,9 +98,9 @@ u64 scaled_div_max(struct bcm_clk_div *div)
98 u32 reg_div; 98 u32 reg_div;
99 99
100 if (divider_is_fixed(div)) 100 if (divider_is_fixed(div))
101 return (u64)div->fixed; 101 return (u64)div->u.fixed;
102 102
103 reg_div = ((u32)1 << div->width) - 1; 103 reg_div = ((u32)1 << div->u.s.width) - 1;
104 104
105 return scaled_div_value(div, reg_div); 105 return scaled_div_value(div, reg_div);
106} 106}
@@ -115,7 +115,7 @@ divider(struct bcm_clk_div *div, u64 scaled_div)
115 BUG_ON(scaled_div < scaled_div_min(div)); 115 BUG_ON(scaled_div < scaled_div_min(div));
116 BUG_ON(scaled_div > scaled_div_max(div)); 116 BUG_ON(scaled_div > scaled_div_max(div));
117 117
118 return (u32)(scaled_div - ((u64)1 << div->frac_width)); 118 return (u32)(scaled_div - ((u64)1 << div->u.s.frac_width));
119} 119}
120 120
121/* Return a rate scaled for use when dividing by a scaled divisor. */ 121/* Return a rate scaled for use when dividing by a scaled divisor. */
@@ -125,7 +125,7 @@ scale_rate(struct bcm_clk_div *div, u32 rate)
125 if (divider_is_fixed(div)) 125 if (divider_is_fixed(div))
126 return (u64)rate; 126 return (u64)rate;
127 127
128 return (u64)rate << div->frac_width; 128 return (u64)rate << div->u.s.frac_width;
129} 129}
130 130
131/* CCU access */ 131/* CCU access */
@@ -398,14 +398,14 @@ static u64 divider_read_scaled(struct ccu_data *ccu, struct bcm_clk_div *div)
398 u32 reg_div; 398 u32 reg_div;
399 399
400 if (divider_is_fixed(div)) 400 if (divider_is_fixed(div))
401 return (u64)div->fixed; 401 return (u64)div->u.fixed;
402 402
403 flags = ccu_lock(ccu); 403 flags = ccu_lock(ccu);
404 reg_val = __ccu_read(ccu, div->offset); 404 reg_val = __ccu_read(ccu, div->u.s.offset);
405 ccu_unlock(ccu, flags); 405 ccu_unlock(ccu, flags);
406 406
407 /* Extract the full divider field from the register value */ 407 /* Extract the full divider field from the register value */
408 reg_div = bitfield_extract(reg_val, div->shift, div->width); 408 reg_div = bitfield_extract(reg_val, div->u.s.shift, div->u.s.width);
409 409
410 /* Return the scaled divisor value it represents */ 410 /* Return the scaled divisor value it represents */
411 return scaled_div_value(div, reg_div); 411 return scaled_div_value(div, reg_div);
@@ -433,16 +433,17 @@ static int __div_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate,
433 * state was defined in the device tree, we just find out 433 * state was defined in the device tree, we just find out
434 * what its current value is rather than updating it. 434 * what its current value is rather than updating it.
435 */ 435 */
436 if (div->scaled_div == BAD_SCALED_DIV_VALUE) { 436 if (div->u.s.scaled_div == BAD_SCALED_DIV_VALUE) {
437 reg_val = __ccu_read(ccu, div->offset); 437 reg_val = __ccu_read(ccu, div->u.s.offset);
438 reg_div = bitfield_extract(reg_val, div->shift, div->width); 438 reg_div = bitfield_extract(reg_val, div->u.s.shift,
439 div->scaled_div = scaled_div_value(div, reg_div); 439 div->u.s.width);
440 div->u.s.scaled_div = scaled_div_value(div, reg_div);
440 441
441 return 0; 442 return 0;
442 } 443 }
443 444
444 /* Convert the scaled divisor to the value we need to record */ 445 /* Convert the scaled divisor to the value we need to record */
445 reg_div = divider(div, div->scaled_div); 446 reg_div = divider(div, div->u.s.scaled_div);
446 447
447 /* Clock needs to be enabled before changing the rate */ 448 /* Clock needs to be enabled before changing the rate */
448 enabled = __is_clk_gate_enabled(ccu, gate); 449 enabled = __is_clk_gate_enabled(ccu, gate);
@@ -452,9 +453,10 @@ static int __div_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate,
452 } 453 }
453 454
454 /* Replace the divider value and record the result */ 455 /* Replace the divider value and record the result */
455 reg_val = __ccu_read(ccu, div->offset); 456 reg_val = __ccu_read(ccu, div->u.s.offset);
456 reg_val = bitfield_replace(reg_val, div->shift, div->width, reg_div); 457 reg_val = bitfield_replace(reg_val, div->u.s.shift, div->u.s.width,
457 __ccu_write(ccu, div->offset, reg_val); 458 reg_div);
459 __ccu_write(ccu, div->u.s.offset, reg_val);
458 460
459 /* If the trigger fails we still want to disable the gate */ 461 /* If the trigger fails we still want to disable the gate */
460 if (!__clk_trigger(ccu, trig)) 462 if (!__clk_trigger(ccu, trig))
@@ -490,11 +492,11 @@ static int divider_write(struct ccu_data *ccu, struct bcm_clk_gate *gate,
490 492
491 BUG_ON(divider_is_fixed(div)); 493 BUG_ON(divider_is_fixed(div));
492 494
493 previous = div->scaled_div; 495 previous = div->u.s.scaled_div;
494 if (previous == scaled_div) 496 if (previous == scaled_div)
495 return 0; /* No change */ 497 return 0; /* No change */
496 498
497 div->scaled_div = scaled_div; 499 div->u.s.scaled_div = scaled_div;
498 500
499 flags = ccu_lock(ccu); 501 flags = ccu_lock(ccu);
500 __ccu_write_enable(ccu); 502 __ccu_write_enable(ccu);
@@ -505,7 +507,7 @@ static int divider_write(struct ccu_data *ccu, struct bcm_clk_gate *gate,
505 ccu_unlock(ccu, flags); 507 ccu_unlock(ccu, flags);
506 508
507 if (ret) 509 if (ret)
508 div->scaled_div = previous; /* Revert the change */ 510 div->u.s.scaled_div = previous; /* Revert the change */
509 511
510 return ret; 512 return ret;
511 513
@@ -802,7 +804,7 @@ static int selector_write(struct ccu_data *ccu, struct bcm_clk_gate *gate,
802static int kona_peri_clk_enable(struct clk_hw *hw) 804static int kona_peri_clk_enable(struct clk_hw *hw)
803{ 805{
804 struct kona_clk *bcm_clk = to_kona_clk(hw); 806 struct kona_clk *bcm_clk = to_kona_clk(hw);
805 struct bcm_clk_gate *gate = &bcm_clk->peri->gate; 807 struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate;
806 808
807 return clk_gate(bcm_clk->ccu, bcm_clk->name, gate, true); 809 return clk_gate(bcm_clk->ccu, bcm_clk->name, gate, true);
808} 810}
@@ -810,7 +812,7 @@ static int kona_peri_clk_enable(struct clk_hw *hw)
810static void kona_peri_clk_disable(struct clk_hw *hw) 812static void kona_peri_clk_disable(struct clk_hw *hw)
811{ 813{
812 struct kona_clk *bcm_clk = to_kona_clk(hw); 814 struct kona_clk *bcm_clk = to_kona_clk(hw);
813 struct bcm_clk_gate *gate = &bcm_clk->peri->gate; 815 struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate;
814 816
815 (void)clk_gate(bcm_clk->ccu, bcm_clk->name, gate, false); 817 (void)clk_gate(bcm_clk->ccu, bcm_clk->name, gate, false);
816} 818}
@@ -818,7 +820,7 @@ static void kona_peri_clk_disable(struct clk_hw *hw)
818static int kona_peri_clk_is_enabled(struct clk_hw *hw) 820static int kona_peri_clk_is_enabled(struct clk_hw *hw)
819{ 821{
820 struct kona_clk *bcm_clk = to_kona_clk(hw); 822 struct kona_clk *bcm_clk = to_kona_clk(hw);
821 struct bcm_clk_gate *gate = &bcm_clk->peri->gate; 823 struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate;
822 824
823 return is_clk_gate_enabled(bcm_clk->ccu, gate) ? 1 : 0; 825 return is_clk_gate_enabled(bcm_clk->ccu, gate) ? 1 : 0;
824} 826}
@@ -827,7 +829,7 @@ static unsigned long kona_peri_clk_recalc_rate(struct clk_hw *hw,
827 unsigned long parent_rate) 829 unsigned long parent_rate)
828{ 830{
829 struct kona_clk *bcm_clk = to_kona_clk(hw); 831 struct kona_clk *bcm_clk = to_kona_clk(hw);
830 struct peri_clk_data *data = bcm_clk->peri; 832 struct peri_clk_data *data = bcm_clk->u.peri;
831 833
832 return clk_recalc_rate(bcm_clk->ccu, &data->div, &data->pre_div, 834 return clk_recalc_rate(bcm_clk->ccu, &data->div, &data->pre_div,
833 parent_rate); 835 parent_rate);
@@ -837,20 +839,20 @@ static long kona_peri_clk_round_rate(struct clk_hw *hw, unsigned long rate,
837 unsigned long *parent_rate) 839 unsigned long *parent_rate)
838{ 840{
839 struct kona_clk *bcm_clk = to_kona_clk(hw); 841 struct kona_clk *bcm_clk = to_kona_clk(hw);
840 struct bcm_clk_div *div = &bcm_clk->peri->div; 842 struct bcm_clk_div *div = &bcm_clk->u.peri->div;
841 843
842 if (!divider_exists(div)) 844 if (!divider_exists(div))
843 return __clk_get_rate(hw->clk); 845 return __clk_get_rate(hw->clk);
844 846
845 /* Quietly avoid a zero rate */ 847 /* Quietly avoid a zero rate */
846 return round_rate(bcm_clk->ccu, div, &bcm_clk->peri->pre_div, 848 return round_rate(bcm_clk->ccu, div, &bcm_clk->u.peri->pre_div,
847 rate ? rate : 1, *parent_rate, NULL); 849 rate ? rate : 1, *parent_rate, NULL);
848} 850}
849 851
850static int kona_peri_clk_set_parent(struct clk_hw *hw, u8 index) 852static int kona_peri_clk_set_parent(struct clk_hw *hw, u8 index)
851{ 853{
852 struct kona_clk *bcm_clk = to_kona_clk(hw); 854 struct kona_clk *bcm_clk = to_kona_clk(hw);
853 struct peri_clk_data *data = bcm_clk->peri; 855 struct peri_clk_data *data = bcm_clk->u.peri;
854 struct bcm_clk_sel *sel = &data->sel; 856 struct bcm_clk_sel *sel = &data->sel;
855 struct bcm_clk_trig *trig; 857 struct bcm_clk_trig *trig;
856 int ret; 858 int ret;
@@ -884,7 +886,7 @@ static int kona_peri_clk_set_parent(struct clk_hw *hw, u8 index)
884static u8 kona_peri_clk_get_parent(struct clk_hw *hw) 886static u8 kona_peri_clk_get_parent(struct clk_hw *hw)
885{ 887{
886 struct kona_clk *bcm_clk = to_kona_clk(hw); 888 struct kona_clk *bcm_clk = to_kona_clk(hw);
887 struct peri_clk_data *data = bcm_clk->peri; 889 struct peri_clk_data *data = bcm_clk->u.peri;
888 u8 index; 890 u8 index;
889 891
890 index = selector_read_index(bcm_clk->ccu, &data->sel); 892 index = selector_read_index(bcm_clk->ccu, &data->sel);
@@ -897,7 +899,7 @@ static int kona_peri_clk_set_rate(struct clk_hw *hw, unsigned long rate,
897 unsigned long parent_rate) 899 unsigned long parent_rate)
898{ 900{
899 struct kona_clk *bcm_clk = to_kona_clk(hw); 901 struct kona_clk *bcm_clk = to_kona_clk(hw);
900 struct peri_clk_data *data = bcm_clk->peri; 902 struct peri_clk_data *data = bcm_clk->u.peri;
901 struct bcm_clk_div *div = &data->div; 903 struct bcm_clk_div *div = &data->div;
902 u64 scaled_div = 0; 904 u64 scaled_div = 0;
903 int ret; 905 int ret;
@@ -958,7 +960,7 @@ struct clk_ops kona_peri_clk_ops = {
958static bool __peri_clk_init(struct kona_clk *bcm_clk) 960static bool __peri_clk_init(struct kona_clk *bcm_clk)
959{ 961{
960 struct ccu_data *ccu = bcm_clk->ccu; 962 struct ccu_data *ccu = bcm_clk->ccu;
961 struct peri_clk_data *peri = bcm_clk->peri; 963 struct peri_clk_data *peri = bcm_clk->u.peri;
962 const char *name = bcm_clk->name; 964 const char *name = bcm_clk->name;
963 struct bcm_clk_trig *trig; 965 struct bcm_clk_trig *trig;
964 966
diff --git a/drivers/clk/bcm/clk-kona.h b/drivers/clk/bcm/clk-kona.h
index 5e139adc3dc5..dee690951bb6 100644
--- a/drivers/clk/bcm/clk-kona.h
+++ b/drivers/clk/bcm/clk-kona.h
@@ -57,7 +57,7 @@
57#define divider_exists(div) FLAG_TEST(div, DIV, EXISTS) 57#define divider_exists(div) FLAG_TEST(div, DIV, EXISTS)
58#define divider_is_fixed(div) FLAG_TEST(div, DIV, FIXED) 58#define divider_is_fixed(div) FLAG_TEST(div, DIV, FIXED)
59#define divider_has_fraction(div) (!divider_is_fixed(div) && \ 59#define divider_has_fraction(div) (!divider_is_fixed(div) && \
60 (div)->frac_width > 0) 60 (div)->u.s.frac_width > 0)
61 61
62#define selector_exists(sel) ((sel)->width != 0) 62#define selector_exists(sel) ((sel)->width != 0)
63#define trigger_exists(trig) FLAG_TEST(trig, TRIG, EXISTS) 63#define trigger_exists(trig) FLAG_TEST(trig, TRIG, EXISTS)
@@ -244,9 +244,9 @@ struct bcm_clk_div {
244 u32 frac_width; /* field fraction width */ 244 u32 frac_width; /* field fraction width */
245 245
246 u64 scaled_div; /* scaled divider value */ 246 u64 scaled_div; /* scaled divider value */
247 }; 247 } s;
248 u32 fixed; /* non-zero fixed divider value */ 248 u32 fixed; /* non-zero fixed divider value */
249 }; 249 } u;
250 u32 flags; /* BCM_CLK_DIV_FLAGS_* below */ 250 u32 flags; /* BCM_CLK_DIV_FLAGS_* below */
251}; 251};
252 252
@@ -263,28 +263,28 @@ struct bcm_clk_div {
263/* A fixed (non-zero) divider */ 263/* A fixed (non-zero) divider */
264#define FIXED_DIVIDER(_value) \ 264#define FIXED_DIVIDER(_value) \
265 { \ 265 { \
266 .fixed = (_value), \ 266 .u.fixed = (_value), \
267 .flags = FLAG(DIV, EXISTS)|FLAG(DIV, FIXED), \ 267 .flags = FLAG(DIV, EXISTS)|FLAG(DIV, FIXED), \
268 } 268 }
269 269
270/* A divider with an integral divisor */ 270/* A divider with an integral divisor */
271#define DIVIDER(_offset, _shift, _width) \ 271#define DIVIDER(_offset, _shift, _width) \
272 { \ 272 { \
273 .offset = (_offset), \ 273 .u.s.offset = (_offset), \
274 .shift = (_shift), \ 274 .u.s.shift = (_shift), \
275 .width = (_width), \ 275 .u.s.width = (_width), \
276 .scaled_div = BAD_SCALED_DIV_VALUE, \ 276 .u.s.scaled_div = BAD_SCALED_DIV_VALUE, \
277 .flags = FLAG(DIV, EXISTS), \ 277 .flags = FLAG(DIV, EXISTS), \
278 } 278 }
279 279
280/* A divider whose divisor has an integer and fractional part */ 280/* A divider whose divisor has an integer and fractional part */
281#define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ 281#define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \
282 { \ 282 { \
283 .offset = (_offset), \ 283 .u.s.offset = (_offset), \
284 .shift = (_shift), \ 284 .u.s.shift = (_shift), \
285 .width = (_width), \ 285 .u.s.width = (_width), \
286 .frac_width = (_frac_width), \ 286 .u.s.frac_width = (_frac_width), \
287 .scaled_div = BAD_SCALED_DIV_VALUE, \ 287 .u.s.scaled_div = BAD_SCALED_DIV_VALUE, \
288 .flags = FLAG(DIV, EXISTS), \ 288 .flags = FLAG(DIV, EXISTS), \
289 } 289 }
290 290
@@ -380,7 +380,7 @@ struct kona_clk {
380 union { 380 union {
381 void *data; 381 void *data;
382 struct peri_clk_data *peri; 382 struct peri_clk_data *peri;
383 }; 383 } u;
384}; 384};
385#define to_kona_clk(_hw) \ 385#define to_kona_clk(_hw) \
386 container_of(_hw, struct kona_clk, hw) 386 container_of(_hw, struct kona_clk, hw)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index ec22112e569f..4637697c139f 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -144,6 +144,37 @@ static bool _is_valid_div(struct clk_divider *divider, unsigned int div)
144 return true; 144 return true;
145} 145}
146 146
147static int _round_up_table(const struct clk_div_table *table, int div)
148{
149 const struct clk_div_table *clkt;
150 int up = _get_table_maxdiv(table);
151
152 for (clkt = table; clkt->div; clkt++) {
153 if (clkt->div == div)
154 return clkt->div;
155 else if (clkt->div < div)
156 continue;
157
158 if ((clkt->div - div) < (up - div))
159 up = clkt->div;
160 }
161
162 return up;
163}
164
165static int _div_round_up(struct clk_divider *divider,
166 unsigned long parent_rate, unsigned long rate)
167{
168 int div = DIV_ROUND_UP(parent_rate, rate);
169
170 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
171 div = __roundup_pow_of_two(div);
172 if (divider->table)
173 div = _round_up_table(divider->table, div);
174
175 return div;
176}
177
147static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate, 178static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
148 unsigned long *best_parent_rate) 179 unsigned long *best_parent_rate)
149{ 180{
@@ -159,7 +190,7 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
159 190
160 if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) { 191 if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
161 parent_rate = *best_parent_rate; 192 parent_rate = *best_parent_rate;
162 bestdiv = DIV_ROUND_UP(parent_rate, rate); 193 bestdiv = _div_round_up(divider, parent_rate, rate);
163 bestdiv = bestdiv == 0 ? 1 : bestdiv; 194 bestdiv = bestdiv == 0 ? 1 : bestdiv;
164 bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv; 195 bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
165 return bestdiv; 196 return bestdiv;
@@ -219,6 +250,10 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
219 u32 val; 250 u32 val;
220 251
221 div = DIV_ROUND_UP(parent_rate, rate); 252 div = DIV_ROUND_UP(parent_rate, rate);
253
254 if (!_is_valid_div(divider, div))
255 return -EINVAL;
256
222 value = _get_val(divider, div); 257 value = _get_val(divider, div);
223 258
224 if (value > div_mask(divider)) 259 if (value > div_mask(divider))
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index dff0373f53c1..7cf2c093cc54 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1984,9 +1984,28 @@ struct clk *__clk_register(struct device *dev, struct clk_hw *hw)
1984} 1984}
1985EXPORT_SYMBOL_GPL(__clk_register); 1985EXPORT_SYMBOL_GPL(__clk_register);
1986 1986
1987static int _clk_register(struct device *dev, struct clk_hw *hw, struct clk *clk) 1987/**
1988 * clk_register - allocate a new clock, register it and return an opaque cookie
1989 * @dev: device that is registering this clock
1990 * @hw: link to hardware-specific clock data
1991 *
1992 * clk_register is the primary interface for populating the clock tree with new
1993 * clock nodes. It returns a pointer to the newly allocated struct clk which
1994 * cannot be dereferenced by driver code but may be used in conjuction with the
1995 * rest of the clock API. In the event of an error clk_register will return an
1996 * error code; drivers must test for an error code after calling clk_register.
1997 */
1998struct clk *clk_register(struct device *dev, struct clk_hw *hw)
1988{ 1999{
1989 int i, ret; 2000 int i, ret;
2001 struct clk *clk;
2002
2003 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2004 if (!clk) {
2005 pr_err("%s: could not allocate clk\n", __func__);
2006 ret = -ENOMEM;
2007 goto fail_out;
2008 }
1990 2009
1991 clk->name = kstrdup(hw->init->name, GFP_KERNEL); 2010 clk->name = kstrdup(hw->init->name, GFP_KERNEL);
1992 if (!clk->name) { 2011 if (!clk->name) {
@@ -2026,7 +2045,7 @@ static int _clk_register(struct device *dev, struct clk_hw *hw, struct clk *clk)
2026 2045
2027 ret = __clk_init(dev, clk); 2046 ret = __clk_init(dev, clk);
2028 if (!ret) 2047 if (!ret)
2029 return 0; 2048 return clk;
2030 2049
2031fail_parent_names_copy: 2050fail_parent_names_copy:
2032 while (--i >= 0) 2051 while (--i >= 0)
@@ -2035,36 +2054,6 @@ fail_parent_names_copy:
2035fail_parent_names: 2054fail_parent_names:
2036 kfree(clk->name); 2055 kfree(clk->name);
2037fail_name: 2056fail_name:
2038 return ret;
2039}
2040
2041/**
2042 * clk_register - allocate a new clock, register it and return an opaque cookie
2043 * @dev: device that is registering this clock
2044 * @hw: link to hardware-specific clock data
2045 *
2046 * clk_register is the primary interface for populating the clock tree with new
2047 * clock nodes. It returns a pointer to the newly allocated struct clk which
2048 * cannot be dereferenced by driver code but may be used in conjuction with the
2049 * rest of the clock API. In the event of an error clk_register will return an
2050 * error code; drivers must test for an error code after calling clk_register.
2051 */
2052struct clk *clk_register(struct device *dev, struct clk_hw *hw)
2053{
2054 int ret;
2055 struct clk *clk;
2056
2057 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2058 if (!clk) {
2059 pr_err("%s: could not allocate clk\n", __func__);
2060 ret = -ENOMEM;
2061 goto fail_out;
2062 }
2063
2064 ret = _clk_register(dev, hw, clk);
2065 if (!ret)
2066 return clk;
2067
2068 kfree(clk); 2057 kfree(clk);
2069fail_out: 2058fail_out:
2070 return ERR_PTR(ret); 2059 return ERR_PTR(ret);
@@ -2151,9 +2140,10 @@ void clk_unregister(struct clk *clk)
2151 2140
2152 if (!hlist_empty(&clk->children)) { 2141 if (!hlist_empty(&clk->children)) {
2153 struct clk *child; 2142 struct clk *child;
2143 struct hlist_node *t;
2154 2144
2155 /* Reparent all children to the orphan list. */ 2145 /* Reparent all children to the orphan list. */
2156 hlist_for_each_entry(child, &clk->children, child_node) 2146 hlist_for_each_entry_safe(child, t, &clk->children, child_node)
2157 clk_set_parent(child, NULL); 2147 clk_set_parent(child, NULL);
2158 } 2148 }
2159 2149
@@ -2173,7 +2163,7 @@ EXPORT_SYMBOL_GPL(clk_unregister);
2173 2163
2174static void devm_clk_release(struct device *dev, void *res) 2164static void devm_clk_release(struct device *dev, void *res)
2175{ 2165{
2176 clk_unregister(res); 2166 clk_unregister(*(struct clk **)res);
2177} 2167}
2178 2168
2179/** 2169/**
@@ -2188,18 +2178,18 @@ static void devm_clk_release(struct device *dev, void *res)
2188struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) 2178struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2189{ 2179{
2190 struct clk *clk; 2180 struct clk *clk;
2191 int ret; 2181 struct clk **clkp;
2192 2182
2193 clk = devres_alloc(devm_clk_release, sizeof(*clk), GFP_KERNEL); 2183 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2194 if (!clk) 2184 if (!clkp)
2195 return ERR_PTR(-ENOMEM); 2185 return ERR_PTR(-ENOMEM);
2196 2186
2197 ret = _clk_register(dev, hw, clk); 2187 clk = clk_register(dev, hw);
2198 if (!ret) { 2188 if (!IS_ERR(clk)) {
2199 devres_add(dev, clk); 2189 *clkp = clk;
2190 devres_add(dev, clkp);
2200 } else { 2191 } else {
2201 devres_free(clk); 2192 devres_free(clkp);
2202 clk = ERR_PTR(ret);
2203 } 2193 }
2204 2194
2205 return clk; 2195 return clk;
diff --git a/drivers/clk/shmobile/clk-mstp.c b/drivers/clk/shmobile/clk-mstp.c
index 2e5810c88d11..1f6324e29a80 100644
--- a/drivers/clk/shmobile/clk-mstp.c
+++ b/drivers/clk/shmobile/clk-mstp.c
@@ -156,6 +156,7 @@ cpg_mstp_clock_register(const char *name, const char *parent_name,
156static void __init cpg_mstp_clocks_init(struct device_node *np) 156static void __init cpg_mstp_clocks_init(struct device_node *np)
157{ 157{
158 struct mstp_clock_group *group; 158 struct mstp_clock_group *group;
159 const char *idxname;
159 struct clk **clks; 160 struct clk **clks;
160 unsigned int i; 161 unsigned int i;
161 162
@@ -184,6 +185,11 @@ static void __init cpg_mstp_clocks_init(struct device_node *np)
184 for (i = 0; i < MSTP_MAX_CLOCKS; ++i) 185 for (i = 0; i < MSTP_MAX_CLOCKS; ++i)
185 clks[i] = ERR_PTR(-ENOENT); 186 clks[i] = ERR_PTR(-ENOENT);
186 187
188 if (of_find_property(np, "clock-indices", &i))
189 idxname = "clock-indices";
190 else
191 idxname = "renesas,clock-indices";
192
187 for (i = 0; i < MSTP_MAX_CLOCKS; ++i) { 193 for (i = 0; i < MSTP_MAX_CLOCKS; ++i) {
188 const char *parent_name; 194 const char *parent_name;
189 const char *name; 195 const char *name;
@@ -197,8 +203,7 @@ static void __init cpg_mstp_clocks_init(struct device_node *np)
197 continue; 203 continue;
198 204
199 parent_name = of_clk_get_parent_name(np, i); 205 parent_name = of_clk_get_parent_name(np, i);
200 ret = of_property_read_u32_index(np, "renesas,clock-indices", i, 206 ret = of_property_read_u32_index(np, idxname, i, &clkidx);
201 &clkidx);
202 if (parent_name == NULL || ret < 0) 207 if (parent_name == NULL || ret < 0)
203 break; 208 break;
204 209
diff --git a/drivers/clk/socfpga/clk-pll.c b/drivers/clk/socfpga/clk-pll.c
index 88dafb5e9627..de6da957a09d 100644
--- a/drivers/clk/socfpga/clk-pll.c
+++ b/drivers/clk/socfpga/clk-pll.c
@@ -20,6 +20,7 @@
20#include <linux/clk-provider.h> 20#include <linux/clk-provider.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/of.h> 22#include <linux/of.h>
23#include <linux/of_address.h>
23 24
24#include "clk.h" 25#include "clk.h"
25 26
@@ -43,6 +44,8 @@
43 44
44#define to_socfpga_clk(p) container_of(p, struct socfpga_pll, hw.hw) 45#define to_socfpga_clk(p) container_of(p, struct socfpga_pll, hw.hw)
45 46
47void __iomem *clk_mgr_base_addr;
48
46static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk, 49static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk,
47 unsigned long parent_rate) 50 unsigned long parent_rate)
48{ 51{
@@ -87,6 +90,7 @@ static __init struct clk *__socfpga_pll_init(struct device_node *node,
87 const char *clk_name = node->name; 90 const char *clk_name = node->name;
88 const char *parent_name[SOCFPGA_MAX_PARENTS]; 91 const char *parent_name[SOCFPGA_MAX_PARENTS];
89 struct clk_init_data init; 92 struct clk_init_data init;
93 struct device_node *clkmgr_np;
90 int rc; 94 int rc;
91 int i = 0; 95 int i = 0;
92 96
@@ -96,6 +100,9 @@ static __init struct clk *__socfpga_pll_init(struct device_node *node,
96 if (WARN_ON(!pll_clk)) 100 if (WARN_ON(!pll_clk))
97 return NULL; 101 return NULL;
98 102
103 clkmgr_np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr");
104 clk_mgr_base_addr = of_iomap(clkmgr_np, 0);
105 BUG_ON(!clk_mgr_base_addr);
99 pll_clk->hw.reg = clk_mgr_base_addr + reg; 106 pll_clk->hw.reg = clk_mgr_base_addr + reg;
100 107
101 of_property_read_string(node, "clock-output-names", &clk_name); 108 of_property_read_string(node, "clock-output-names", &clk_name);
diff --git a/drivers/clk/socfpga/clk.c b/drivers/clk/socfpga/clk.c
index 35a960a993f9..43db947e5f0e 100644
--- a/drivers/clk/socfpga/clk.c
+++ b/drivers/clk/socfpga/clk.c
@@ -17,28 +17,11 @@
17 * You should have received a copy of the GNU General Public License 17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */ 19 */
20#include <linux/clk.h>
21#include <linux/clkdev.h>
22#include <linux/clk-provider.h>
23#include <linux/io.h>
24#include <linux/of.h> 20#include <linux/of.h>
25#include <linux/of_address.h>
26 21
27#include "clk.h" 22#include "clk.h"
28 23
29void __iomem *clk_mgr_base_addr; 24CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock", socfpga_pll_init);
30 25CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk", socfpga_periph_init);
31static const struct of_device_id socfpga_child_clocks[] __initconst = { 26CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk", socfpga_gate_init);
32 { .compatible = "altr,socfpga-pll-clock", socfpga_pll_init, },
33 { .compatible = "altr,socfpga-perip-clk", socfpga_periph_init, },
34 { .compatible = "altr,socfpga-gate-clk", socfpga_gate_init, },
35 {},
36};
37
38static void __init socfpga_clkmgr_init(struct device_node *node)
39{
40 clk_mgr_base_addr = of_iomap(node, 0);
41 of_clk_init(socfpga_child_clocks);
42}
43CLK_OF_DECLARE(socfpga_mgr, "altr,clk-mgr", socfpga_clkmgr_init);
44 27
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index 0d20241e0770..e1769addf435 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -1718,7 +1718,7 @@ struct clk *tegra_clk_register_plle_tegra114(const char *name,
1718 "pll_re_vco"); 1718 "pll_re_vco");
1719 } else { 1719 } else {
1720 val_aux &= ~(PLLE_AUX_PLLRE_SEL | PLLE_AUX_PLLP_SEL); 1720 val_aux &= ~(PLLE_AUX_PLLRE_SEL | PLLE_AUX_PLLP_SEL);
1721 pll_writel(val, pll_params->aux_reg, pll); 1721 pll_writel(val_aux, pll_params->aux_reg, pll);
1722 } 1722 }
1723 1723
1724 clk = _tegra_clk_register_pll(pll, name, parent_name, flags, 1724 clk = _tegra_clk_register_pll(pll, name, parent_name, flags,